JPH04195022A - Liquid crystal display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like.

[Prior Art 1] An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so the active method has better contrast than the so-called simple matrix method, which uses a time-division drive method, especially for color LCDs. It is becoming an indispensable technology for display devices. A typical switching element is a thin film transistor (TPT).
).

The liquid crystal display section (liquid crystal display panel) consists of a lower transparent glass substrate on which a thin film transistor, a transparent pixel electrode, a protective film for the thin film transistor, and a lower alignment film for setting the orientation of liquid crystal molecules are sequentially provided on a lower transparent glass substrate with the liquid crystal layer as a reference. and an upper substrate, in which a black matrix, a color filter, a protective film for the color filter, a common transparent pixel electrode, and an upper alignment film are sequentially provided on an upper transparent glass substrate, are stacked so that the alignment films face each other, and a double plate is formed. A liquid crystal is sealed between each of the alignment films, and the liquid crystal is sealed with a sealing material placed around the substrate. Note that a backlight is arranged on the lower substrate side.

Note that an active matrix type liquid crystal display device using thin film transistors is described, for example, in ``12.5-inch active matrix type color liquid crystal display J with redundant configuration,'' Nikkei Electronics, pp. 193-2.
10, December 15, 1986, published by Nikkei McGraw-Hill. - [f@Akira's problem to be solved] However, in the conventional liquid crystal display device as described above, only an upper alignment film exists on the common transparent pixel electrode of the upper transparent glass substrate, whereas On the transparent pixel electrode of the lower transparent glass substrate, there is a protective film for a thin film transistor made of, for example, a silicon nitride film with a thickness of about 1 μm and a lower alignment film with a thickness of about 0.1 μm, resulting in a vertically asymmetrical structure between the upper substrate side and the lower substrate side. It becomes. For this reason, when displaying an image, there is a problem in that an afterimage called burn-in occurs due to the electric charge that accumulates on the protective film of the lower transparent glass substrate.

Note that if the protective film only on the transparent pixel electrode of the lower transparent glass substrate is removed, an afterimage called burn-in will occur in the same way as above due to the charge that is accumulated on the protective film that exists on the drain line of the thin film transistor. .

In addition, if the protective film on the transparent pixel electrode of the lower transparent glass substrate is formed with a thin organic film of, for example, 0.5 μm, this protective film may be crushed by foreign matter, and the common pixel electrode of the upper transparent glass substrate and the lower transparent glass Contact with the drain line of the substrate may cause a short circuit, resulting in line defects on the displayed image.

Furthermore, although there is only an upper alignment film on the common transparent pixel electrode of the upper transparent glass substrate, when forming a large screen panel, cracks will appear in the common pixel electrode when the upper and lower substrates are combined. Sometimes.

The present invention was made to solve the above problems,
The purpose is to provide a liquid crystal display device that can suppress the occurrence of afterimages called burn-in.

Another object of the present invention is to provide a liquid crystal display device that can suppress the occurrence of line defects due to contact and short circuit between the common transparent pixel electrode of the upper transparent glass substrate and the drain line of the lower transparent glass substrate.

Still another object of the present invention is to provide a liquid crystal display device that can suppress the occurrence of cracks in a common transparent pixel electrode.

[Means for Solving the Problems j] In order to achieve the above problems, the present invention provides a lower transparent substrate provided with a thin film transistor, a drain line, a lower transparent pixel electrode, and a lower alignment film, an upper common transparent pixel electrode, and an upper alignment film. In a liquid crystal display device in which an upper transparent substrate provided with a transparent substrate is stacked so that their alignment films face each other, and a liquid crystal is sealed and sealed between both substrates, at least between the drain line and the lower alignment film, and a protective film is vertically symmetrically provided between the upper common transparent pixel electrode and the upper alignment film, and between the lower transparent pixel electrode and the lower alignment film and at a location corresponding to the lower transparent pixel electrode. The protective film is not present between the upper common transparent pixel electrode and the upper alignment film.

The present invention also provides a method for stacking a lower transparent substrate provided with a lower transparent pixel electrode and a lower alignment film and an upper transparent substrate provided with an upper transparent pixel electrode and an upper alignment film so that their alignment films face each other. In a liquid crystal display device in which a liquid crystal is enclosed and sealed between substrates, there is electrical connection between the upper lower transparent pixel electrode and the lower alignment film, and between the upper transparent pixel electrode and the upper alignment film. It is characterized by having membranes made of the same material arranged vertically symmetrically.

[Function] In the liquid crystal display device of the present invention, a protective film is vertically symmetrically provided at least between the drain line and the lower alignment film and between the upper common transparent pixel electrode and the upper alignment film, and between the lower transparent pixel electrode and the lower alignment film;
And since the protective film is not present between the upper common transparent pixel electrode and the upper alignment film at the location corresponding to the lower transparent pixel electrode, the protective film is not present on the lower transparent substrate side and the upper transparent substrate side. Because it is formed vertically symmetrically,
It is possible to suppress the occurrence of charging, and it is possible to suppress the occurrence of an afterimage called burn-in on the display screen. In addition, since the protective film is vertically symmetrical between at least the drain line and the lower alignment film and between the upper common transparent pixel electrode and the upper alignment film, it is possible to avoid the possibility of foreign particles It is possible to prevent line defects from occurring due to the contact between the drain line of the lower transparent substrate and the upper common transparent pixel electrode of the upper transparent substrate due to the protective film being crushed, resulting in a short circuit.

Furthermore, films made of electrically the same material are vertically symmetrically provided between each transparent pixel electrode and each alignment film of the F section transparent substrate and the upper transparent substrate, thereby preventing the occurrence of charging due to the vertically asymmetric structure. Moreover, since the film is provided between the transparent pixel electrode and the alignment film, it is possible to suppress the occurrence of line defects due to contact and short circuit between the drain line and the upper common transparent pixel electrode.
It is possible to suppress the occurrence of cracks in transparent pixel electrodes.

[Example] An active matrix color liquid crystal display device to which the present invention is applied will be described below.

Note that in all the figures for explaining the liquid crystal display device, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

Embodiment 1 FIG. 1A is a schematic cross-sectional view showing a liquid crystal display device according to a first embodiment of the present invention (a cross-sectional view taken along the line IIB-nB in FIG. 2A and a cross-section near the seal portion of the display panel) , FIG. 2A is a plan view showing one pixel and its surroundings of a liquid crystal display device according to a first embodiment of the present invention.

In FIG. 1A, 5UBI is the lower transparent glass substrate, T
FTl is a thin film transistor, GT is a gate electrode, GI is a gate insulating film, SDI, SD2 is a source/drain electrode of a thin film transistor, ITOI is a lower transparent pixel electrode (hereinafter referred to as transparent pixel electrode), PSVI is a protective film of a thin film transistor, 0RII is the lower alignment film. LC is a liquid crystal, 5UB2 is an upper transparent glass substrate, BM is a black matrix, FIL is a color filter, PSV2 is a protective film of the color filter, IrO2 (COM) is an upper common transparent pixel electrode (hereinafter referred to as common transparent pixel electrode), ○RI2 is an upper alignment film.

In FIG. 2A, GL is a gate line and DL is a drain line.

In this embodiment, at least between the drain line DL and the lower alignment film 0RII (in this embodiment, the thin film transistor TF
In order to protect T, between the thin film transistor TFT and the lower alignment film 0RII, and between the gate line GL and the lower alignment film 0RI
A protective film PSVI is vertically symmetrically provided between the common transparent pixel electrode ITO2 and the upper alignment film ○RT2, and between the transparent pixel electrode JT(] and the lower alignment film ○R11, and the transparent There is no protective film PSV1 between the common transparent pixel electrode ITO2 and the two-part alignment film RI2 at a location corresponding to the pixel electrode IT○1.

In this way, in this embodiment, the lower transparent glass substrate SUB
Protective film PSVI on l side and upper transparent glass substrate 5UB2 side
Since it has a vertically symmetrical structure, it is possible to suppress the occurrence of charging, and it is possible to suppress the occurrence of an afterimage called burn-in on the display screen.

In addition, since the protective film PSVI exists vertically symmetrically between the drain line DL and the lower alignment film OR-1 and between the common transparent pixel electrode IT○2 and the upper alignment film OR-2, it is possible to It is possible to prevent the protective film PSVI from being crushed by a foreign object, causing the drain line DL of the lower transparent glass substrate 5UBI to come into contact with the common transparent pixel electrode IT○2 of the upper transparent glass substrate 5UB2, resulting in a short circuit and generation of a line defect.

The upper and lower protective films PSVI are formed of, for example, a silicon oxide film or a silicon nitride film formed using a plasma CVD apparatus, and are formed to have a thickness of about 500 [A].

In addition, organic PAS (phenol curing epoxy resin)
When using a thin film transistor T on a lower transparent glass substrate 5UBI, the resin is applied with a spin coater, baked (120°C, 1 hour), and then a resist is applied.
After forming a pattern covering PT, drain line DL, and gate line GL, a pattern of an organic film (protective film PSVI) is formed using oxygen asher.

Furthermore, when the material of the organic film contains a photosensitive group such as a negative resist, pattern formation can be performed only by development and post-baking, and the process can be streamlined.

Also on the upper transparent glass substrate 5UB2, after completing the pattern formation of the common transparent pixel electrode IT○2, a protective film P S Vl is formed vertically symmetrically with the protective film P S V 1 of the lower transparent glass substrate SUB1.

Note that the formation location of the protective film PSVI in this example coincides with the formation location of the black matrix BM, which will be described in detail later. Therefore, by forming the protective film PSVI with an opaque film with light-shielding properties, it can be used as a black matrix BM. The manufacturing process can be simplified since it is possible to provide functions and there is no need to form a black matrix BM.

Example 2 In FIG. 1B, PSVI is located between the pixel electrode ITOI and the lower alignment film 0RII, and between the common transparent pixel electrode IT○
2 and the upper alignment film RI2, these are films made of electrically equivalent material and provided vertically symmetrically. PSVI may be an organic film or an inorganic film.

For example, it is formed in the same manner as the PSVI of the first embodiment. The film thickness is the same for the upper and lower substrates, and is formed to have a film thickness of, for example, about 8000 [A].

In this way, in this embodiment, the lower transparent glass substrate 5UB
I and each pixel electrode of the upper transparent glass substrate 5UB2 ■To1
．． ■Since the films PSVI made of electrically equivalent material were provided vertically symmetrically between T○2 and each alignment film 0RII, 0RI2,
It is possible to prevent the occurrence of charging due to the vertically asymmetrical structure, and since PSVI is provided between the common transparent pixel electrode ITO2 and the upper alignment film 0RI2, contact and short circuit between the drain line DL and the common transparent pixel electrode ITO2 can be prevented. Furthermore, even if a large screen panel is formed, the occurrence of cracks in the common transparent pixel electrode ITO2 can be suppressed.

Hereinafter, the structure of the present invention will be described together with an embodiment in which the present invention is applied to an active matrix color liquid crystal display device.

In addition, in an attempt to explain the embodiments, parts having the same functions are given the same reference numerals, and repeated explanation thereof will be omitted.

FIG. 2B is a sectional view taken along the NC-NC cutting line in FIG. 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged.

(Pixel Arrangement) As shown in Figure 2A, each pixel is connected to two adjacent scanning signals l1A (gate signal line or horizontal signal line) GL and two adjacent video signal lines (drain signal line or vertical signal line). line) DL (in the area surrounded by four signal lines).

Each pixel has a thin film transistor TPT and a transparent pixel electrode ITO.
I and a storage capacitor element Cadcl. Scanning signal line G
L extends in the column direction, and a plurality of L's are arranged in the row direction.

The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction.

(Overall cross-sectional structure of display section) As shown in FIGS. 1A and 1B, a thin film transistor TPT and a transparent pixel electrode ITOI are formed on the lower transparent glass substrate SUB1 side with respect to the liquid crystal LC, and a transparent pixel electrode ITOI is formed on the upper transparent glass substrate 5UB2 side. Color filter FIL,
Light-shielding film B forming a black matrix pattern for light-shielding
M is formed. The lower transparent glass substrate SUB 1 has a thickness of, for example, about 1.1 [mm].

In addition, a silicon oxide film Sl○ is formed on both sides of the transparent glass substrates 5UBI and 5UB2 by dip treatment or the like.
is provided. For this reason, the transparent glass substrate 5UBl
Even if there is a sharp scratch on the surface of , 5UB2, the sharp scratch can be covered with the silicon oxide film SIO, so that damage to the scanning signal line GL and color filter FIL can be effectively prevented.

The center part of Figures 1A and 1B shows a cross section of one pixel part, and the left side is a transparent glass substrate SUB 1.5U.
The left edge of B2 shows a cross section of the part where the external lead wiring is present, and the right side shows the transparent glass substrates 5UBI and 5UB.
2 shows a cross-section of the right side edge of FIG. 2 where no external lead wiring is present.

The sealing material SL shown on the left and right sides of FIG. 1A and the first BEI, respectively, is configured to seal the liquid crystal LC, and covers the transparent glass substrate SUB 1.5UB2 excluding the liquid crystal sealing opening (not shown). It is formed along the entire edge. The sealing material SL is made of, for example, epoxy resin.

Common transparent pixel electrode IT on the upper transparent glass substrate 5UB2 side
O2 is supplied to the silver paste material SI at least in one place.
L is connected to the external lead wiring formed on the lower transparent glass substrate SUB I side. This external lead wiring includes a gate electrode GT, a source electrode SDI, and a drain electrode SD.
2. They are formed in the same manufacturing process as each of 2.

Alignment film ○R11,0RI2, transparent pixel electrode ITOI, common transparent pixel electrode ITO2, protective film PSVI, PSV2,
Each layer of the insulating film GI is formed inside the sealing material SL. The polarizing plates POLI and POL2 are formed on the outer surfaces of the lower transparent glass substrate 5UBI and the upper transparent glass substrate 5UB2, respectively.

The liquid crystal LC has a lower alignment film 0RI that sets the direction of the liquid crystal molecules.
I and the upper alignment film 0RI2, and the seal part S
It is sealed by L.

The lower alignment film ○RII is formed on the protective film PSVI on the side of the lower transparent glass substrate 5UBI.

The inner surface (liquid crystal LC side) of the upper transparent glass substrate 5UB2 is provided with a light shielding film BM, a color filter FTL, and a protective film P.
SV2, a common transparent pixel electrode ITO2 (COM), and an upper alignment film 0RI2 are sequentially stacked.

This liquid crystal display device has a lower transparent glass substrate SUB l side,
Each layer on the upper transparent glass substrate 5UB2 side is formed separately, and then the upper and lower transparent glass substrates 5L7B1, 5UB
2 are stacked on top of each other and a liquid crystal LC is sealed between the two.

(Thin Film Transistor TPT) The thin film transistor TPT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large.

The thin film transistor TPT of each pixel has two
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI and TFT2. Each of the thin film transistors TFTI and TPT2 has substantially the same size (the same channel length and channel width). This divided thin film transistor TF
Each of TI and TFT2 mainly includes a gate electrode GT, a gate insulating film GI, an l-type semiconductor layer AS made of i-type (intrinsic, not doped with conductivity type determining impurities) amorphous silicon (Sl), It is composed of a pair of source electrode SDI and drain electrode SD2. In addition,
It should be understood that the source and drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarity is reversed during operation, so that the source and drain are interchanged during operation. However, in the following description, for convenience, one side is fixed as a source and the other side is fixed as a drain.

(Gate electrode GT) The gate electrode GT is shown in FIG. 4 (the first conductive film gl in FIG. 2A,
As shown in detail in the plan view depicting only the second conductive film g2 and the l-type semiconductor layer AS, it has a shape that projects vertically from the scanning signal line GL (upward in FIGS. 2A and 4). It is branched (branched into a T-shape).

Gate electrode GT is thin film transistor TFT l, TPT
It is configured to protrude to the respective formation regions of 2. The respective gate electrodes GT of thin film transistors TFTI and TFT2 are integrated (as a common gate electrode).
It is formed continuously with the scanning signal line GL. The gate electrode GT is formed of a single-layer first conductive film g1 so as not to form a large step in the formation region of the thin film transistor TPT. The first conductive film g1 is, for example, a chromium (Cr) film formed by sputtering, and
Formed with a film thickness of about [a person].

As shown in FIGS. 1A, 1B, 2A, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor layer AS (when viewed from below) so as to completely cover the i-type semiconductor layer AS. be done. Therefore, the lower transparent glass substrate S U B
When a backlight BL such as a fluorescent lamp is attached below 1, the gate electrode GT made of opaque or ROM forms a shadow, and the backlight light does not shine on the 1-type semiconductor layer AS, causing a conductive phenomenon due to light irradiation. That is, the thin film transistor T
Deterioration of the PT off-characteristics becomes less likely to occur. Note that the original size of the gate electrode GT is the minimum required size to span between the source electrode SDI and drain electrode SD2 (including the alignment margin between the gate electrode GT, the source electrode SDI, and the drain electrode SD2). ), and its depth and length determine the channel width W. What is the ratio of the distance (channel length) L between the source electrode SDI and the drain electrode SD2, that is, what is the factor W/L that determines the mutual conductance gm? It is determined by

The size of the gate electrode GT in this liquid crystal display device is of course made larger than the original size mentioned above.

Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line GL
may be integrally formed in a single layer, in which case aluminum containing silicon (A1) is used as the opaque conductive material.
．． ), pure aluminum, aluminum containing palladium (Pd), etc. can be selected.

(Scanning Signal Line GL) The scanning signal line GL is constituted by a composite film including a first conductive film g1 and a second conductive film g2 provided above the first conductive film g1. The first conductive film gl of the scanning signal #JGL is formed in the same manufacturing process as the first conductive film g1 of the gate electrode GT, and is configured integrally with the first conductive film g1.

The second conductive film g2 is formed using, for example, an aluminum film formed by sputtering, and has a thickness of about 1000 to 5500 [A]. The second conductive film g2 is configured to reduce the resistance value of the scanning signal Al1GL and increase the signal transmission speed (improve the writing characteristics of pixel information).

Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the width of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape.

(Insulating film GI) The insulating film GI is used as a gate insulating film of each of the thin film transistors TPTI and TFT2. The insulating film GI is formed above the gate electrode GT and the scanning signal AiGL. The insulating film is formed using, for example, a silicon nitride film formed by plasma CVD, and has a thickness of approximately 3000 mm.

(Type 1 semiconductor layer AS) As shown in FIG. 4, the type 3 semiconductor layer AS is used as a channel forming region for each of the thin film transistors TFTI and TPT2 which are divided into a plurality of parts. i-type semiconductor layer A
S is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to a film thickness of about 1800 mm.

This type 1 semiconductor layer AS is made of Si by changing the composition of the supplied gas.
, N, an insulating film G used as a gate insulating film
Subsequently to the formation of 1, it is formed in the same plasma CVD apparatus without exposing the plasma CVD apparatus to the outside. Further, a P-doped N" type semiconductor layer dO (FIGS. 1A and 1B) for ohmic contact is similarly continuously formed to a thickness of about 400 [A]. After that, the lower transparent glass The substrate 5UBl is taken out of the CVD apparatus, and an N + type semiconductor layer d is formed using photo processing technology.
The o- and l-type semiconductor layers AS are shown in FIGS. 1A, 1B, and 2.
As shown in Figure A and Figure 4, it is patterned into independent islands.

As shown in detail in FIGS. 2A and 4, the l-type semiconductor layer AS is also provided between the scanning signal line GL and the video signal line DL at the intersection (gross-over section). The type 1 semiconductor layer AS at this intersection is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection.

(Source electrode SDI, drain electrode 5D2) The source electrode SDI and drain electrode SD2 of each of the thin film transistors TFT1 and TPT2 divided into a plurality of
As shown in detail in FIG. A, FIG. 2B, and FIG. 5 (a plan view depicting only the first to third conductive films d1 to d3 in FIG. 2A), they are spaced apart from each other on the i-type semiconductor layer AS. It is provided.

Each of the source electrode SDI and drain electrode SD2 is
A first conductive film dl, a second conductive film d2, and a third conductive film d3 are sequentially stacked from the lower layer side in contact with the N1 type semiconductor layer do. First conductive film d of source electrode SDI
1. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the first conductive film d1, second conductive film d2, and third conductive film d3 of the drain electrode SD2.

The first conductive film d1 is a chromium film formed by sputtering,
The film thickness is 500 to 1000 [A], and in this liquid crystal display device, it is formed to a film thickness of 600 [A]. The thicker the chromium film is, the greater the stress will be, so
The film thickness is formed within a range of about 0 [to]. The chromium film has good contact with the N0 type semiconductor layer do. The chromium film constitutes a so-called barrier layer that prevents aluminum of the second conductive film d2, which will be described later, from diffusing into the N+ type semiconductor layer dO.

As the first conductive film d1, in addition to the chromium film, a high melting point metal (
Mo, Ti, Ta, W) films, high melting point metal silicide (M
It may be formed using a film (oSi, , TiSi, , TaSi, , WSi,).

After patterning the first conductive film d1 by photo processing, the N+ type semiconductor layer do is removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the N'' type semiconductor layer d remaining on the type 1 semiconductor layer AS
o, the portion other than the first conductive film d1 is removed by self-alignment.

At this time, since the N4'' type semiconductor layer do is etched to remove its entire thickness, the 1 type semiconductor layer AS is also slightly etched at its surface, but the extent can be controlled by the etching time. good.

Thereafter, the second conductive film d2 is formed by aluminum sputtering to a thickness of 3,000 to 5,500 mm (in this liquid crystal display device, the thickness is approximately 3,500 mm).

Aluminum film has less stress than chrome film,
It is possible to form a thick film, and the source electrode SDI,
It is configured to reduce the resistance values of the drain electrode SD2 and the video signal line DL. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive in addition to the aluminum film.

After patterning the second conductive film d2 by photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Indium-
It consists of Tin-Oxide ITO: Nesa film). The film thickness is approximately 1,200 [persons] in this liquid crystal display device. This third conductive film d3 includes a source electrode SDI and a drain electrode SD.
2 and the video signal line DL, and also constitutes the transparent pixel electrode IT○1.

First conductive film d1 of source electrode SDI, drain electrode SD
Each of the two first conductive films di has an upper second conductive film d.
The conductive film d2 and the third conductive film d3 extend inward (into the channel region) to a large extent. In other words, the first conductive film di in these parts is the second conductive film d2 and the third conductive film d.
The structure is such that the channel length of the thin film transistor TPT can be defined independently of 3.

The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SDI has a step shape of the l-type semiconductor layer AS (a step corresponding to the sum of the thickness of the first conductive film g1, the thickness of the N+ type semiconductor layer do, and the thickness of the type 1 semiconductor layer AS). It is structured along the following lines. Specifically, the source electrode SD1 is connected to a first conductive film di formed along the step shape of the i-type semiconductor layer AS, and a transparent pixel electrode ITOI on the upper part of the first conductive film di. A second conductive film d2 whose side is smaller in size, and a third conductive film d2 connected to the first conductive film d1 exposed from the second conductive film d2.
It is composed of a conductive film d3.

The second conductive film d2 of the source electrode SDI cannot be formed thickly because the chromium film of the first conductive film d1 increases stress, and cannot overcome the stepped shape of the L-type semiconductor layer AS.
It is configured to overcome the type semiconductor layer AS. In other words, step coverage is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly, the resistance value of the source electrode SDI (drain electrode S
The same applies to D2 and the video signal line DL). Since the third conductive film d3 cannot overcome the step shape caused by the type 1 semiconductor layer AS of the second conductive film d2, by reducing the size of the second conductive film d2, the exposed first conductive film di configured to connect. The first conductive film dI and the third conductive film d3 not only have good adhesion, but also have a small step shape at the connection between them, so that the source electrode SDI and the transparent pixel electrode IT○1 are reliably connected. be able to.

(Transparent Pixel Electrode TTOI) The transparent pixel electrode IT○1 constitutes one of the pixel electrodes of the liquid crystal display section.

The transparent pixel electrode ITOI is connected to the source electrode SD1 of the thin film transistor TFT1 and the source electrode SDI of the thin film transistor TFT2. Therefore, when a defect occurs in one of the thin film transistors TFTI and TPT2, for example, the thin film transistor TFTI, the thin film transistor T
If the FTI and the video signal line DL are separated, and the thin film transistor TFTI and the transparent pixel electrode ITOI are separated, point defects and line defects will not occur, and defects will rarely occur in the two thin film transistors TFT and TPT2 at the same time. Since there are no point defects, the probability of point defects occurring can be extremely reduced.

(Light-shielding film BM) On the upper transparent glass substrate 5UB2 side, so as to prevent external light (light from above in FIGS. 1A and 1B) from entering the type 1 semiconductor layer AS used as a channel formation region.
A light shielding film BM is provided, and the light shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the third conductive film d3 made of an ITO film, the color filter FIL, and the light shielding film BM in FIG. 2A. The light-shielding film BM is formed of, for example, an aluminum film or a chromium film that has a high light-shielding property, and in this liquid crystal display device, the chromium film is sputtered to
It is formed to have a film thickness of about [A].

Therefore, i of thin film transistors TFT1 and TFT2
The type semiconductor layer AS is sandwiched between the upper and lower light shielding films BM and the thick gate electrode GT, and that portion is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM has two functions: shielding light for the type 1 semiconductor layer AS and serving as a black matrix.

Furthermore, since the portion facing the edge portion on the root side of the transparent pixel electrode ITOI in the rubbing direction (lower right portion in FIG. 2A) is shielded from light by the light shielding film BM, even if a domain is generated in the above portion, the domain is Since it is invisible, display characteristics will not deteriorate.

Note that it is also possible to attach the backlight to the upper transparent glass substrate 5UB2 side and make the lower transparent glass substrate 5UBI the viewing side (externally exposed side).

(Common transparent pixel electrode ITO2) The common transparent pixel electrode IT○2 is connected to the lower transparent glass substrate 5U.
Opposed to the transparent pixel electrode ITOI provided for each pixel on the BI side, the optical state of the liquid crystals ■ and C is determined by each pixel electrode ITO
Potential difference (electric field) between I and common transparent pixel electrode ITO2
changes in response to. The configuration is such that a common voltage V com is applied to this common transparent pixel electrode ITO2.

The common voltage V com is an intermediate potential between the low-level drive voltage V d min and the high-level drive voltage Vdmax applied to the video signal line DL.

(Color Filter FIL) The color filter FIL is constructed by coloring a dyed base material made of a resin material such as an acrylic resin with a dye. The color filter FIL is formed in a stripe shape at a position facing the pixel (Fig. 7) and is colored differently (Fig. In the drawing, each color filter FIL of B, R, and G is 456.135°,
(The hatch of the cross is an alms.) Color filter FIL
As shown in FIG. 6, is formed thick so as to cover the entire transparent pixel electrode IT○1, and the light shielding film BM is formed on the transparent pixel electrode 1 so as to overlap with the color filter FIL and the edge portion of the transparent pixel electrode ITOI. It is formed inside the periphery of 'T Ol.

Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate 5UB2, and the dyed base material other than the red filter forming area is removed using photolithography technology. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing similar steps.

(Protective Film PSV2) The protective film PSV2 is provided to prevent the dyes that have been used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin.

(Whole Equivalent Circuit of Display Device) A wiring diagram of the equivalent circuit of the display matrix section and its peripheral circuits is shown in FIG. Although this figure is a circuit diagram, it is drawn to correspond to the actual geometrical arrangement.

AR is a matrix array in which a plurality of pixels are arranged two-dimensionally.

In the figure, X means a video signal line DL, and subscripts G, B, and R are added corresponding to green, blue, and red pixels, respectively. Y means scanning signal line GL, and subscripts 1, 2, 3 .
..., end are added according to the order of scanning timing.

Video signal lines X (subscript omitted) are alternately placed on the upper side (or odd number)
The video signal drive circuit He is connected to the lower (or even number) video signal drive circuit Ho.

SUP is a power supply circuit that obtains multiple divided and stabilized voltage sources from one voltage source, and information for a CRT (cathode ray tube) from the host (upper processing unit) and information for a TPT liquid crystal display device. This circuit includes the circuit to be replaced.

(Structure of Storage Capacitor Element Cadd) The transparent pixel electrode ITOI is formed so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TPT. As is clear from FIG. 2B, this superposition is caused by the transparent pixel electrode I
T○1 is one electrode PL2, and the adjacent scanning signal line GL
A storage capacitance element (electrostatic capacitance element) Cadd is configured with the other electrode PLI as the other electrode PLI. The dielectric film of this storage capacitor element Cadd is made of the same layer as the insulating film Gl used as the gate insulating film of the thin film transistor TPT.

As is clear from FIG. 4, the storage capacitor element Cadd is formed in the portion of the scanning signal line GL where the width of the first conductive film gl is widened. Note that the first conductive film gl in a portion intersecting with the video signal line DL is made thin in order to reduce the probability of short circuit with the video signal line DL.

In a part between the transparent pixel electrode ITOI and the electrode PLI which are overlapped to form the storage capacitor element Cadd,
Similar to the source electrode SDI, an island region composed of the first conductive film dl and the second conductive film d2 is provided so that the transparent pixel electrode ITOI is not disconnected when going over the step shape. This island region is configured to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode IT○1.

(Equivalent circuit of storage capacitor element Cadd and its operation) 2nd A
FIG. 9 shows an equivalent circuit of the pixel shown in the figure. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT and source electrode SDI of the thin film transistor TPT. The dielectric film of the parasitic capacitance Cgs is an insulating film Gl.

Cpix is a liquid crystal capacitor formed between the transparent pixel electrode ITOI (PrX) and the common transparent pixel electrode IT○2 (COM). The dielectric film of liquid crystal capacitor Cpix is liquid crystal L
C.

They are a protective film PSVI and alignment films ◯RII and ◯RI2. Vlc is a midpoint potential.

The storage capacitor element Cadd has a midpoint potential (pixel electrode potential) Vie when the thin film transistor TPT switches.
It works to reduce the influence of the gate potential change ΔVg on the voltage. This situation can be expressed as the following formula.

ΔV1c= (Cgs/(Cgs+Cadd+Cpix
)) xΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This variation ΔVlc causes a direct current component applied to the liquid crystal LC, but the larger the holding capacitance Cadd is, the smaller its value can be.

Further, the storage capacitor element Cadd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. Reducing the DC component applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching between liquid crystal display screens.

As mentioned above, the gate twlGT is an I-type semiconductor layer AS.
The source electrode SD is enlarged to completely cover the source electrode SD.
I, the overlap area with the drain electrode SD2 increases,
Therefore, the parasitic capacitance Cgs increases, and the midpoint potential Vl
The opposite effect occurs in that c becomes more susceptible to the influence of the gate (scanning) signal Vg.

However, by providing the storage capacitor element Cadd, this disadvantage can also be eliminated.

The storage capacitance of the storage capacitor element Cadd is 4 to 8 times the liquid crystal capacitance Cpix (4・Cpix
<Cadd(8・Cpix), 8 to 32 times the parasitic capacitance Cgs (8・Cgs<Cadd<32・Cgs
).

(Connection method of storage capacitor element Cadd electrode line) First-stage scanning signal line GL (Y) used only as a storage capacitor electrode line.

) is the common transparent pixel electrode IT○2 as shown in FIG.
(Vcom).

As shown in FIGS. 1A and 1B, the common transparent pixel electrode ITO2 is connected to an external wiring at the periphery of the liquid crystal display device using a silver paste material SL. Moreover,
A part of the conductive film (gl and g2) of this external lead wiring is formed in the same manufacturing process as the scanning signal line GL. As a result, the storage capacitor electrode line GL at the final stage can be easily connected to the common transparent pixel electrode IT○2.

The storage capacitor electrode line Y at the first stage is the scanning signal line Y e at the final stage.
nd, connect to a DC potential point (AC grounding point) other than V cam, or add one additional scanning pulse Y from the vertical scanning path circuit V. It may also be connected so that it receives

As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course.

For example, in the above embodiment, an inverted staggered structure is shown in which the gate electrode is formed - the gate insulating film is formed - the semiconductor layer is formed - the source/drain electrode is formed, but the present invention also applies to a staggered structure in which the vertical relationship or the order of formation is reversed. It is valid.

[Effects of the Invention 1] As explained above, in the liquid crystal display device of the present invention, it is possible to suppress the occurrence of charging caused by the protective film having a vertically asymmetrical structure, and it is possible to suppress the occurrence of an afterimage called burn-in on the display screen. . Further, the occurrence of line defects due to contact and short circuit between the drain line and the upper common transparent pixel electrode can be suppressed. moreover,
It is possible to suppress the occurrence of cracks in transparent pixel electrodes.

[Brief explanation of the drawing]

FIG. 1A is a schematic cross-sectional view showing a liquid crystal display device according to a first embodiment of the present invention (a cross-sectional view taken along the line IIB-IIB in FIG. 2A and a cross-section near the seal portion of the display panel), and FIG. 1B 2A is a schematic sectional view similar to FIG. 1A showing a liquid crystal display device according to a second embodiment of the present invention, and FIG. 2A is a part of a liquid crystal display section of an active matrix color liquid crystal display device to which the present invention is applied. 2B is a sectional view taken along the mc-nc cutting line in FIG. 2A; FIG. 3 is a plan view of the main parts of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged; FIG. 6 to 6 are plan views depicting only predetermined layers of the pixel shown in FIG. 2A, and FIG. 7 is a plan view of main parts depicting only the pixel electrode layer, light shielding film, and color filter layer shown in FIG. 3. , FIG. 8 is an equivalent circuit diagram showing a liquid crystal display section of an active matrix type color liquid crystal display device, and FIG. 9 is an equivalent circuit diagram of the pixel shown in FIG. 2A. SUB 1... Lower transparent glass substrate TFTI... Thin film transistor GT... Gate electrode GI... Gate insulating film SDI, SD2... Source/drain electrode of thin film transistor ITOI... Lower transparent pixel electrode PSV l... Protective film ○RII... Lower alignment film LC... Liquid crystal 5UB2... Upper transparent glass substrate BM... Black matrix FIL... Color filter PSV2... Color filter protective film IT○2 (C
OM)...Top common transparent pixel electrode ○RI2...Top alignment film GL...Gate line DL...Drain line

Claims (1)

[Scope of Claims] 1. A lower transparent substrate provided with a thin film transistor, a drain line, a lower transparent pixel electrode, and a lower alignment film, and an upper transparent substrate provided with an upper common transparent pixel electrode and an upper alignment film are connected to each other by alignment films. In a liquid crystal display device in which the substrates are stacked so as to face each other and a liquid crystal is sealed and sealed between the two substrates, at least a space between the drain line and the lower alignment film, and between the upper common transparent pixel electrode and the upper alignment film is provided. A protective film is provided vertically symmetrically between the lower transparent pixel electrode and the lower alignment film, and between the upper common transparent pixel electrode and the upper alignment film at a location corresponding to the lower transparent pixel electrode. A liquid crystal display device characterized in that the above-mentioned protective film does not exist between them. 2. A lower transparent substrate provided with a lower transparent pixel electrode and a lower alignment film and an upper transparent substrate provided with an upper transparent pixel electrode and an upper alignment film are stacked so that the alignment films face each other, and a liquid crystal is placed between the two substrates. In the liquid crystal display device, a film made of an electrically equivalent material is provided between the lower transparent pixel electrode and the lower alignment film, and between the upper transparent pixel electrode and the upper alignment film. A liquid crystal display device characterized by vertically symmetrical arrangement of.