JPH04207412A - Bidirectional current switching and driving circuits - Google Patents

Abstract

PURPOSE:To quicken the stable operating speed more by providing an impedance element to control the on/off timing of complementary switching elements. CONSTITUTION:An NPN transistor(TR) 103, a resistor 108, an NPN TR 104 are connected in series in this order, and an NPN TR 109, a resistor 116, an NPN TR 110 are connected in series in this order. The resistor 108 is used to control the ON delay time of MOSFETs 101, 102, and the quantity of delay time depends on a time constant being a product between an internal inter- electrode capacitance specific to the MOSFETs 101, 102 and the resistance of the added resistor 108. Moreover, the resistor 116 is provided for the similar purpose to the resistor 108. Thus, the short-circuit time between a power supply and GND via an output stage MOSFET is reduced or eliminated at the switching by controlling the ON delay time of the MOSFETs 101, 102 in this way. Thus, the stable operating speed is quickened more.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to bidirectional current switching circuits and drive circuits.

[Conventional technology] FIG. 7 shows a conventional bidirectional current switching circuit.

This is the first inverter (103~105.112~1
13) and a second inverter (lot, 102.109.110) that inverts the output level of the first inverter.
A load 117 is connected between each second inverter.

The first inverter has a so-called phase splitter and a totem pole amplifier connected in cascade, and the second inverter has 9MO3FETs (101, 109) and nMOsFE.
T(102, 110) are vertically connected in series.

With this configuration, the input voltage level of each drive circuit becomes the same as the output voltage level, and an H signal is applied to the input terminal S1, and an L signal is applied to the input terminal S2.
When a signal of 1 is applied, the load current of the load 117 flows from the output terminal Q1 to the output terminal Q2, and on the other hand, when an L signal is applied to the input terminal S and an H signal is applied to the input terminal S2, Load current flows to the output terminal Q2 and also to the pressure terminal Q1. FIG. 8 shows the relationship between the level of voltage applied to the input terminal and the direction of load current.

Next, the level of the input terminal S1 is H, and the input terminal S
From the state where the level of input terminal St is L, the level of input terminal St becomes L.
The operation when the level of the input terminal S2 changes to H at the same time will be described.

When the level of the input terminal Sl changes from H to L, the transistor 105 is turned off. Then, transistor 10
The charge accumulated in the base of transistor 103 is discharged through resistor R1, and before transistor 104 is turned off, the base voltage of transistor 103 rises and transistor 1
03 is ONL, current is supplied to the capacitor CI of the transistor 104 by the transistor 103, and the transistor 1
03 is saturated. Then, with a time constant determined by the saturation resistance of the transistor 103 and the capacitance CI of the transistor 104, the gate voltages of the 9MO3FET 101 and the nMOSFET 102 rise, the pMOsFETlol is turned off, the nMOSFET 102 is turned on, and the output terminal Q1
level becomes L.

On the other hand, when the level of input terminal S2 changes from L to H,
The transistor 113 is turned on, the transistor 111 is turned off, and the transistor 112 is turned on. Then, 9MO3FET 109 and nMOsFET
The gate level of 110 becomes L, so 9MO3F
As ET 109 turns on, nMOSFET 1
10 is OFF, the level of output terminal Q2 becomes H.

Therefore, the load current changes from output terminal Q2 to output terminal Ql.
It will flow to

Note that the operation when the level of input terminal S1 changes from L to H and the level of input terminal S2 changes from H to L is the same as when the level of input terminal S2 changes from L to H, and The operation is essentially the same as when the level of the input terminal S1 changes from H to L, and the only difference is that the direction of the load current is reversed, so the explanation will be omitted.

[Problem to be solved by the invention] However, due to the switching of MO3FET elements, O
Since the delay times when N and OFF are not necessarily equal, problems such as decreased efficiency and inability to operate at high speed have occurred.

As shown in FIG. 9, the level of input terminal SL changes from H to L.
When the voltage changes to , pMOsFETLO1 turns OFF and nMO3FET 102 turns ON. At this time, M
As shown in the figure, the output waveforms of OSFETs 101 and 102 have a longer delay time when they are OFF (cut off) than when they are ON (conducting).

As a result, only the illustrated region 405 has both MOSFETs in a conductive state, that is, the power supply and GND are short-circuited through both MO3FETs.

In the figure, current Iz indicates the source current during such an operation, and indicates how an excessive current Ip flows when the current direction is reversed.

As mentioned above, the durability due to excessive short circuit current Ip,
Problems include decreased reliability, consumption of reactive power, and reduced switching speed limit due to time loss in region 405.

An object of the present invention is to solve the above-mentioned problems and provide a bidirectional current switching circuit and a drive circuit that have faster stable operating speeds.

[Means for Solving the Problems] In order to achieve such an object, the present invention provides a bidirectional current switching circuit configured with complementary switching elements, in which the complementary switching elements are turned on,
It is characterized by providing an impedance element for controlling off timing.

The present invention also provides a first bidirectional current switching circuit having a complementary switching element and an impedance element for controlling on/off timing of the complementary switching element; a second bidirectional current switching circuit that performs a switching operation complementary to the switching circuit; and a load connected between the second bidirectional current switching circuit.

[Function] In the present invention, since the on/off timing of the complementary switching element can be determined by the impedance element, it is possible to prevent an excessive short-circuit current from flowing through the complementary switching element.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the invention. This embodiment differs from the conventional example in the configuration of a so-called totem pole amplifier. That is, in the conventional example, the npn transistors 103 and 104 were connected vertically in series, and the npn transistors 109 and 110 were connected vertically in series, but in this embodiment, the npn transistor 103, the resistor 108,
and npn type transistor 104 are connected vertically in series in this order, npn type transistor 109, resistor 116,
and npn type transistors 110 were connected vertically in series in this order.

The resistor 108 controls the delay time when the MOSFETs 101 and 102 are turned on, and its amount varies depending on each MOSFET.
l0I, is determined by a time constant that is the product of the internal interelectrode capacitance inherent in 102 and the added resistance 108. Also,
Resistor 116 is also provided for the same purpose as resistor 108.

Here, in order to suppress individual variations in each MOSFET element, we combined composite elements, built them into the same package during the manufacturing process, or glued together selected elements with similar characteristics to make the characteristics uniform. High performance is achieved by suppressing changes in characteristics due to thermal bonding.

Next, as in the conventional example, the level of the input terminal S1 is H,
Further, the operation will be described when the level of the input terminal S2 changes from the L level to the level of the input terminal S1 and, at the same time, the level of the input terminal S2 changes to H.

When the level of the input terminal S1 changes from H to L, the transistor 105 is turned off. Then, transistor 10
4 is discharged through the resistor R1, and before the transistor 104 is turned off, the voltage of the transistor 103 rises and the voltage of the transistor 103 increases.
is ONL, transistor 103 causes transistor 10
A current is supplied to the capacitor CI of No. 4, and the transistor 103 is saturated. Then, with a time constant determined by the saturation resistance of the transistor 103, the resistor 108, and the capacitance C1 of the transistor 104, the pMOSFET 101 and the nMOSFET 1 are connected.
The gate voltage of 02 increases and pMOsFETlol becomes O
The nMOSFET 102 is turned on, and the level of the output terminal Ql becomes L.

On the other hand, when the level of input terminal S2 changes from L to H,
The transistor 113 is turned on, the transistor 111 is turned off, and the transistor 112 is turned on.

Then, pMOsFET 109 and nMOsFET 1
The gate level of 10 becomes L, thus pMOsFE
As T 109 turns on, nMOSFET 11
0 is OFF L, and the level of the output terminal Q2 becomes H.

Furthermore, the operation when the level of input terminal S1 changes from L to H and the level of input terminal S2 changes from H to L is, respectively, when the level of input terminal S2 changes from L to H, and When the level of the input terminal S1 changes from H to L, the operation is essentially the same except that the direction of the load current is reversed.

As shown in FIG. 2, the output waveforms of the MOSFETs 10I and 102 are delayed by a region 501 by the resistor 108, and the on and off timings of the MOSFETs 10I and 102 are the same. For this reason, MOSFE
Tl0I and 102 are not rendered conductive at the same time, and it is possible to prevent an excessive current from flowing into the source current Is.

In this example, the first inverter is configured with an npn transistor, and the second inverter is configured with a 9MO3FE transistor.
Although an example has been described in which the inverter is configured using T and nMO3FETs, the present invention is not limited to this example, and each inverter may be configured using MOSFETs, FETs, and bipolar transistors.

As explained above, according to the above embodiment, the MOSFET
By controlling the ON delay time of the element, the short-circuit time between the power supply and GND via the output stage MO5FET during switching can be shortened or eliminated, thereby enabling high-speed switching operation, improving efficiency, and preventing excessive current. It is possible to improve durability and reliability by preventing element destruction due to heat generation.

Further, the present invention brings about excellent effects as a drive circuit for a recording head of an inkjet recording technology using thermal energy, that is, a so-called bubble jet method.

In recent years, for the purpose of improving efficiency, a configuration has been considered in which the ink and the heat generating resistor (heater) are in direct contact without passing through a protective film.In this configuration, when the heater is driven with a DC potential, there is a An electrochemical reaction will occur and the heater will be destroyed.

FIG. 3 shows an example of a drive circuit that solves this problem. This connects the heaters 9H3, . . . , Hrrl as loads to the drive circuits Di, D2, drive circuit D3, . D4,・
. . , input terminals Sl, S2, and input terminals S3, which are driven by drive circuits Dn-1 and Dn. S
4,..., sequentially apply the signals shown in FIG. 4 to the input terminals 5n-1 and Sn,
Load current 1zl to n-1, Iz3゜..., I
This is to prevent the heater from being destroyed due to an electrochemical reaction that occurs between the heater and the ink that comes into contact with it when the heater is driven with direct current by flowing Zn-1. The time during which the drive current is applied is approximately 5 μsec, during which time only 4 to 8 clocks are input.

FIG. 5 shows another example of a drive circuit for a bubble jet recording head. This consists of multiple heaters H1 connected in series,
-, Hn are connected to both ends of the drive circuits Di and Dn, respectively, and a drive circuit D is connected to the nodes of the heaters H1 and H2.
2, drive circuit D3 to the node of heaters H2 and H3,
..., drive circuit D is connected to the node of heaters In-2 and In-1.
n-1 and input terminals Sl, S2 . ..., the signal shown in FIG. 6 is applied to Sn. For example, in order to cause current Izl to flow through heater H1, the signal applied to input terminal Sl and the signal applied to input terminals S2 to Sn are made to have opposite phases. After that, when the signals of the relationship shown in the figure are sequentially applied, Iz2. ..., a drive current of Izrrl flows. Therefore, it is possible to prevent the heater from being destroyed due to the electrochemical reaction that occurs between the heater and the ink that comes into contact with it when the heater is driven by direct current.

Although an example of a bubble jet recording head has been described, the present invention is also applicable to a thermal transfer recording head.

It is also applicable to high-speed bidirectional drive circuits such as stepping motors and linear motors, and high-speed drive circuits for liquid crystals.

(Others) In particular, the present invention is an inkjet recording method that includes a means (for example, an electrothermal converter, a laser beam, etc.) for generating thermal energy as energy used for ejecting ink, This provides excellent effects in recording heads and recording apparatuses that use energy to cause changes in the state of ink. According to such a system, it is possible to achieve high recording density and high definition.

As for typical configurations and principles thereof, it is preferable to use the basic principles disclosed in, for example, US Pat. No. 4,723,129 and US Pat. No. 4,740,796. This method can be applied to both the so-called on-demand type and continuous type, but especially in the case of the on-demand type, it is necessary to arrange the liquid (ink) in accordance with the sheet and liquid path that hold it. The electrothermal converter that is
Generating thermal energy in the electrothermal transducer and producing film boiling on the thermally active surface of the recording head by applying at least one drive signal that corresponds to recorded information and provides a rapid temperature rise above nucleate boiling. As a result, bubbles in the liquid (ink) can be formed in a one-to-one correspondence with this drive signal, which is effective. The growth and contraction of the bubble causes liquid (ink) to be ejected through the ejection opening to form at least one droplet. If this drive signal is in the form of a pulse, bubble growth and contraction will occur immediately and appropriately.
Particularly responsive liquid (ink) ejection can be achieved,
More preferred. This pulse-shaped drive signal is described in U.S. Pat. Nos. 4,463,359 and 4,345,262.
Those described in the specification are suitable. Furthermore, if the conditions described in US Pat. No. 4,313,124 concerning the invention regarding the temperature increase rate of the heat acting surface are adopted, even more excellent recording can be performed.

The configuration of the recording head includes, in addition to the combination configuration of ejection ports, liquid paths, and electrothermal converters (straight liquid flow path or right-angled liquid flow path) as disclosed in the above-mentioned specifications, a heat acting section. The present invention also includes configurations using US Pat. No. 4,558,333 and US Pat. No. 4,459,600, which disclose configurations in which the wafer is placed in a bending region. In addition, Japanese Patent Application Laid-Open No. 1989-5 discloses a configuration in which a common slit is used as a discharge part of a plurality of electrothermal converters.
No. 9-123670 and Japanese Patent Application Laid-Open No. 59/1989 which discloses a configuration in which a discharge portion is made to correspond to an opening that absorbs pressure waves of thermal energy.
The effects of the present invention are also effective even if the structure is based on the publication No.-138461. That is, regardless of the form of the recording head, according to the present invention, recording can be performed reliably and efficiently.

Furthermore, the present invention can be effectively applied to a full-line type recording head having a length corresponding to the maximum width of a recording medium that can be recorded by a recording apparatus.

Such a recording head may have either a configuration in which the length is satisfied by a combination of a plurality of recording heads, or a configuration as a single recording head formed integrally.

In addition, even with the serial type shown above, the recording head is fixed to the device body, or by being attached to the device body, electrical connection to the device body and ink supply from the device body are possible. The present invention is also effective when using a replaceable chip type recording head or a cartridge type recording head in which an ink tank is integrally provided in the recording head itself.

Further, it is preferable to add recovery means for the recording head, preliminary auxiliary means, etc., which are provided as a configuration of the recording apparatus, to the present invention, because the effects of the present invention can be further stabilized. Specifically, these include capping means for the recording head, cleaning means, pressure or suction means, preheating means using an electrothermal transducer or another heating element, or a combination thereof; It is also effective to perform a preliminary ejection mode in which ejection is performed separately from printing in order to perform stable printing.

In addition, regarding the type and number of recording heads installed, for example, in addition to one type that corresponds to single-color ink, there is also a plurality of recording heads that correspond to multiple inks with different recording colors and densities. It may be something that can be done. That is, for example, the recording mode of the recording apparatus is not limited to a recording mode for only a mainstream color such as black, but may also be a recording mode in which the recording head is configured integrally or in a combination of multiple colors, The present invention is also extremely effective for devices equipped with at least one full color by color mixture.

Additionally, in the embodiments of the present invention described above,
Although ink is described as a liquid, it is an ink that solidifies at room temperature or below, but softens or liquefies at room temperature, or in an inkjet method, the ink itself is
Generally, the temperature is adjusted within the range of 0°C or more and 70°C or less so that the viscosity of the ink is within the stable ejection range, so even if the ink is in a liquid state when the recording signal is applied. Bye. In addition, the temperature increase caused by thermal energy can be actively prevented by using the energy to change the state of the ink from a solid state to a liquid state, or ink that solidifies when left standing is used to prevent ink evaporation. In any case, the ink is liquefied by applying thermal energy in accordance with the recording signal, and the liquid ink is ejected, and the ink already begins to solidify by the time it reaches the recording medium. The present invention is also applicable when using ink that is liquefied only by thermal energy. The ink used in this case is
Publication No. 4-56847 or JP-A-60-71260
As described in the above publication, the porous sheet may have a form in which a liquid or solid substance is held in the concave portions or through holes thereof and is opposed to the electrothermal converter. In the present invention, the most effective method for each of the above-mentioned inks is to implement the above-mentioned film boiling method.

In addition, the inkjet recording apparatus of the present invention may take the form of an image output terminal for information processing equipment such as a computer, a copying apparatus combined with a reader, etc., or a facsimile apparatus having a transmitting/receiving function. It may also be something.

[Effects of the Invention] As described above, according to the present invention, since the structure is configured as described above, there is an effect that the stable operation speed can be made faster and at the same time, high efficiency can be realized.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
3 is an explanatory diagram illustrating an example of a heater driving method of a bubble jet recording recording head; FIG. 4 is a timing chart showing an example of timing of each part of the circuit shown in FIG. 3; FIG. . FIG. 5 is an explanatory diagram illustrating another example of a heater driving method for a recording head using the bubble jet recording method, FIG. 6 is a timing chart showing an example of the timing of each part of the circuit shown in FIG. 5, and FIG. 7 is a bidirectional current A circuit diagram showing a conventional example of a switching circuit. Fig. 8 is a diagram showing the relationship between the applied voltage level and the direction of load current in the circuit shown in Fig. 7. Fig. 9 shows an example of the timing of each part of the circuit shown in Fig. 7. This is a timing chart. 101.109...pMOsFET, 102.110
-・-nMOsFET, 103.104,105. il
l, 112, 113-npn transistor, 117.
··load. Figure 1 Figure 3 Sl ------□l
zt - U111 ---- Figure 4 Figure 7

Claims (1)

[Scope of Claims] 1) A bidirectional current switching circuit configured with complementary switching elements, characterized in that an impedance element is provided for controlling on/off timing of the complementary switching elements. Directional current switching circuit. 2) a first bidirectional current switching circuit having a complementary switching element and an impedance element for controlling on/off timing of the complementary switching element; and complementary to the first bidirectional current switching circuit. A drive circuit comprising: a second bidirectional current switching circuit that performs a switching operation; and a load connected between the first and second bidirectional current switching circuits. 3) The load is a heat-generating resistor that causes a state change in the ink due to heat and causes the ink to be ejected from the ink ejection port to form flying droplets based on the state change. 2. The drive circuit according to 2. 4) The drive circuit according to claim 3, wherein the heat generating portion of the heat generating resistor is in direct contact with ink.