JPH042137A - Manufacturing method of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which a fine pattern is formed in a lithography process.

[Conventional technology]

Lithography technology is indispensable in the manufacturing process of semiconductor devices. This lithography technique forms a resist pattern by applying a resist material onto a semiconductor substrate, irradiating the resist with ultraviolet rays through a mask, and developing it. Then, using this resist pattern as a mask, the substrate material is selectively removed to form an integrated circuit.

For example, a resist pattern for forming a gate electrode of a MESFET (Schottky junction field effect transistor) is shown in the plan view of FIG.

The gate electrode is usually formed by dry etching using plasma. In other words, by passing ions only through the vacant space 1 of the resist pattern formed in a linear and elongated manner, the base film such as the silicon nitride film formed under the resist pattern is selectively removed. Then, a gate electrode is formed on the semiconductor substrate exposed in the removed portion along the turns of the resist.

Furthermore, in the nozzle turning performed by the dry etching method, the surface of the semiconductor substrate may be damaged by the impact caused by the collision of ions. Therefore, in order to avoid this damage, a wet etching method using a chemical solution is sometimes applied. In this case, the chemical solution enters only the vacant space 1 of the resist pattern formed into a long and narrow linear shape, thereby selectively removing the base film formed under the resist pattern.

[Problem to be solved by the invention]

However, since the gate length of recent FETs is becoming extremely short due to the demand for high-speed operation, in the conventional wet etching method using a chemical solution, the underlying film can be selectively and accurately removed according to the resist pattern. There was a problem that it wasn't working.

Therefore, many pattern defects occur due to this etching unevenness, and the yield of manufactured semiconductor chips decreases.

For example, in the cross-sectional view of the MESFET gate electrode shown in FIG. 3 during manufacture, the gate length is extremely short, making it difficult for the chemical solution to penetrate into the minute voids 2 of the resist turns.

Therefore, the chemical solution does not sufficiently penetrate into the base film 3 formed under the resist pattern. For this reason, the base film 3
are no longer selectively removed according to the pattern as shown in the figure.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that improves the permeability (wettability) of a chemical solution into a resist pattern and does not cause a decrease in the yield of semiconductor chips.

[Means to solve the problem]

The present invention consists of a first step of forming an extremely fine resist pattern with large area portions at both ends, and a second step of selectively removing a base film formed under the resist pattern using a chemical solution through the resist pattern. 2 steps.

[Effect]

The chemical solution accumulates in large areas formed at both ends of the resist pattern, and the chemical solution accumulated here sufficiently penetrates into the empty spaces of the fine resist nodules due to its osmotic pressure.

〔Example〕

FIG. 2 shows a G a A s M according to an embodiment of the present invention.
A cross-sectional view showing the manufacturing process of an ESFET gate electrode.
FIG. 1 is a plan view of a resist pattern used in this manufacturing process.

A base film 11 such as a silicon nitride film or a silicon oxide film is formed on a semi-insulating semiconductor substrate made of GaAs,
Furthermore, a photosensitive organic polymer (photoresist) solution is dropped onto this base film, and a photoresist film 12 of an appropriate thickness is formed by a spin code method. Then, a photomask is placed on this photoresist film 12, and ultraviolet rays are irradiated for several seconds through this photomask to cause a chemical reaction in the photoresist film 12. The portions of the photoresist film 12 irradiated with ultraviolet rays are turned into solids, and the turned portions are removed with a developer to pattern the photoresist film 12, resulting in the resist shown in FIG. 1(a) or (b). A pattern 13 is formed (see FIG. 2(a)).

This resist pattern 13 is formed extremely thin, for example, so that the width of the pattern line 13a is 0.5 μm or less. Also, large area portions 13b are formed at both ends of this resist turn 13. The large area portion 13b shown in FIG. 1(a) has a substantially rectangular shape, and the large area portion 13b shown in FIG. 1(b) has an approximately triangular shape; The shape is not limited to this, and may be any other shape such as a circle or a polygon.

Thereafter, wet etching is performed using this photoresist film 12 as a mask. At this time, a sufficient amount of the chemical solution accumulates in the large area portion 13b of the resist pattern 13, and the accumulated chemical solution penetrates into the extremely fine pattern lines 13H due to its osmotic pressure. Therefore, the chemical solution for wet etching sufficiently permeates the base film 11 exposed in the vacant areas of the resist pattern 13. Therefore, by this wet etching, the base film 11
is accurately selectively removed in 13 resist patterns (
(See figure (b)).

Next, the electrode metal 14 is deposited on the entire surface of the semiconductor wafer 1 (see figure (c)), and the gate electrode 15 is patterned by peeling off the photoresist film 12 (see figure (d)).
reference).

As described above, according to this embodiment, by providing the large area portions 13b at both ends of the resist pattern 13, the chemical solution for wet etching can sufficiently penetrate into the fine pattern lines 13H, thereby preventing the underlying film from being etched. 11 is selectively removed accurately according to 13 resist patterns. As a result, conventional no-turn defects are reduced, and the resulting FET chip
Yield of whelk improves.

In the above embodiments, the present invention is applied to the manufacturing process of the gate electrode of MESFET, but the present invention is not limited to this and can be applied to the manufacturing process of other fine patterns. This is possible, and even in this case, the same effects as in the above embodiment can be achieved.

〔Effect of the invention〕

As explained above, according to the present invention, the chemical solution accumulates in the large areas formed at both ends of the resist pattern, and the chemical solution accumulated here is sufficiently filled with the fine voids of the resist pattern due to its osmotic pressure. It starts to sink in.

Therefore, the chemical solution sufficiently penetrates into the base film formed under the resist pattern, improving the wettability of the solution, and even if the pattern is extremely fine, the base film can be selectively removed in accordance with the resist pattern. Therefore, it is possible to provide a method for manufacturing a semiconductor device with a high manufacturing yield.

[Brief explanation of drawings]

FIG. 1 is a plan view showing the shape of a resist pattern according to an embodiment of the present invention, FIG. The figure is a cross-sectional view showing an example of a pattern failure that occurs when a device is manufactured using a conventional resist pattern, and FIG. 4 is a plan view showing the shape of a conventional resist pattern. 11... Base film, 12... Photoresist film, 13.
...Resist pattern, 13a...Pattern line, 13
b...Large area portion, 14...Electrode metal, 15.
...Gate electrode. +3b

Claims (1)

[Claims] A first step of forming an extremely fine resist pattern with large area portions at both ends, and a second step of selectively removing the base film formed under this resist pattern with a chemical solution through the resist pattern. A method for manufacturing a semiconductor device, comprising: