JPH04218A - Power control method - Google Patents

Power control method

Info

Publication number
JPH04218A
JPH04218A JP2097668A JP9766890A JPH04218A JP H04218 A JPH04218 A JP H04218A JP 2097668 A JP2097668 A JP 2097668A JP 9766890 A JP9766890 A JP 9766890A JP H04218 A JPH04218 A JP H04218A
Authority
JP
Japan
Prior art keywords
power supply
voltage
stabilized
stabilized power
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2097668A
Other languages
Japanese (ja)
Other versions
JP3153220B2 (en
Inventor
Hiroyasu Miyazaki
宮崎 裕康
Mitsuo Komiya
小宮 充男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Computer Electronics Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Computer Electronics Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Computer Electronics Co Ltd, Hitachi Ltd filed Critical Hitachi Computer Electronics Co Ltd
Priority to JP09766890A priority Critical patent/JP3153220B2/en
Publication of JPH04218A publication Critical patent/JPH04218A/en
Application granted granted Critical
Publication of JP3153220B2 publication Critical patent/JP3153220B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Direct Current Feeding And Distribution (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電子回路を搭載した印刷基板等の受電部と直
流安定化電源と給電ラインより構成される給電システム
における電源制御方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a power supply control method in a power supply system comprising a power receiving unit such as a printed circuit board equipped with an electronic circuit, a DC stabilized power supply, and a power supply line.

〔従来の技術〕[Conventional technology]

従来の技術は1例えば特開昭57−106922号公報
に記載のように、直流安定化電源の出力電圧を監視し、
あらかじめ設定された基準電圧と比較することによって
、比較した絶対値が一定値以上になったときにエラーと
して検出する方法が一般的である。
Conventional techniques include (1) monitoring the output voltage of a DC stabilized power supply, for example, as described in Japanese Patent Application Laid-Open No. 57-106922;
A common method is to compare the voltage with a preset reference voltage and detect an error when the compared absolute value exceeds a certain value.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上記従来技術では、出力電圧異常等が発
生した場合、異常検出ができても、障害発生元が直流安
定化電源部であるのか、供給ライン部であるのかが判明
せず1例えば直流安定化電源を複数含有するような給電
ライン部の複雑な給電システムの場合には、障害発生元
の摘出が容易に行えないという問題があった。
However, in the above conventional technology, when an output voltage abnormality etc. occurs, even if the abnormality can be detected, it is not clear whether the source of the fault is the DC stabilized power supply section or the supply line section. In the case of a power supply system with a complicated power supply line section that includes a plurality of power sources, there is a problem in that it is not easy to identify the source of the failure.

本発明は、前記問題点を解決するためになされたもので
ある。
The present invention has been made to solve the above problems.

本発明の目的は、電源異常部位の切分けを容易にした電
源制御方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a power supply control method that facilitates isolation of power supply abnormalities.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するため、本発明においては、電子回路
を搭載した印刷基板等の受電部と、直流安定化電源と、
該受電部と該直流安定化電源を接続する給電ラインより
構成される給電システムにおいて、前記直流安定化電源
の出力電圧を検出する第1の手段と、前記受電部の電圧
を検出する第2の手段と、該第1、第2の手段の出力と
予め設定された所定値とを比較することにより、前記給
電ラインと前記直流安定化電源の異常を監視する制御手
段とを備えている。さらに、給電ラインの電圧降下量の
限界値を記憶する記憶手段を備えている。
In order to achieve the above object, the present invention includes a power receiving section such as a printed circuit board equipped with an electronic circuit, a DC stabilized power supply,
A power supply system comprising a power supply line connecting the power receiving unit and the DC stabilized power supply, a first means for detecting an output voltage of the DC stabilized power supply, and a second means for detecting the voltage of the power receiving unit. and a control means for monitoring abnormalities in the power supply line and the DC stabilized power supply by comparing the outputs of the first and second means with a predetermined value set in advance. Furthermore, a storage means is provided for storing a limit value of the voltage drop amount of the power supply line.

〔作用〕[Effect]

直流安定化電源の出力電圧と受電部の電圧の差と記憶手
段によって記憶した値を比較することにより給電システ
ムの異常を監視する。すなわち、制御手段は記憶手段よ
りあらかじめ設定した値を読み出し比較して、直流安定
化電源の出力電圧が設定値以下のとき直流安定化電源の
出方異常として診断する。また直流安定化電源と受電部
の差、つまり給電ラインの電圧降下量が設定値以上のと
き給電ラインの異常として診断する。
Abnormalities in the power supply system are monitored by comparing the difference between the output voltage of the DC stabilized power source and the voltage of the power receiving unit with the value stored in the storage means. That is, the control means reads out preset values from the storage means and compares them, and diagnoses the output voltage of the DC stabilized power source as abnormal when the output voltage of the DC stabilized power source is less than the set value. Furthermore, when the difference between the DC stabilized power source and the power receiving unit, that is, the amount of voltage drop on the power supply line, is greater than a set value, it is diagnosed as an abnormality in the power supply line.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面を用いて具体的に説明す
る。
Hereinafter, one embodiment of the present invention will be specifically described using the drawings.

第1図は、本発明の一実施例に係る全体構成を示し、直
流安定化電源工と、電子回路の負荷部4と、負荷部4を
搭載した印刷基板等の受電部2と、直流安定化電源1と
受電部2を接続する給電ライン3と、制御部7とで構成
されている。制御部7は、直流安定化電源1の出力電圧
を検出するA/D変換回路5と、受電部2の電圧を検出
するA/D変換回路6とを比較、制御するマイクロプロ
セッサ8と、必要に応じて読出し、書込みするための記
憶部9とで構成され、A/D変換回路5,6はマイクロ
プロセッサ8と電圧監視線11.12によって接続され
ている。
FIG. 1 shows the overall configuration of an embodiment of the present invention, which includes a DC stabilizing power supply, a load section 4 of an electronic circuit, a power receiving section 2 such as a printed circuit board on which the load section 4 is mounted, and a DC stabilizing power supply. The power supply line 3 includes a power supply line 3 that connects the power supply 1 and the power receiving section 2, and a control section 7. The control unit 7 includes a microprocessor 8 that compares and controls an A/D conversion circuit 5 that detects the output voltage of the DC stabilized power supply 1 and an A/D conversion circuit 6 that detects the voltage of the power receiving unit 2, and a microprocessor 8 that controls the The A/D conversion circuits 5 and 6 are connected to the microprocessor 8 by voltage monitoring lines 11 and 12.

次に本発明の動作について説明する。Next, the operation of the present invention will be explained.

直流安定化電源1を立上げ、A/D変換回路5とA/D
変換回路6により直流安定化電源1の出力電圧と受電部
2の電圧をマイクロプロセッサ8が監視する。このとき
マイクロプロセッサ8は記憶部9よりあらかじめ設定し
た値を読み出し比較して、直流安定化電源1の出力電圧
が設定値以下のとき直流安定化電源1の出力異常として
診断する。また直流安定化電源lと受電部2の差、つま
り給電ライン3の電圧降下量が設定値以上のとき給電ラ
イン3の異常として診断する。これらのエラー情報は記
憶部9に書込まれる。
Start up the DC stabilized power supply 1, and connect the A/D conversion circuit 5 and A/D.
The microprocessor 8 monitors the output voltage of the DC stabilized power supply 1 and the voltage of the power receiving section 2 using the conversion circuit 6 . At this time, the microprocessor 8 reads preset values from the storage section 9 and compares them, and diagnoses the output voltage of the DC stabilized power source 1 as being abnormal when the output voltage of the DC stabilized power source 1 is less than the set value. Further, when the difference between the DC stabilized power source 1 and the power receiving unit 2, that is, the amount of voltage drop in the power supply line 3 is equal to or greater than a set value, the power supply line 3 is diagnosed as abnormal. These error information are written into the storage section 9.

直流安定化電源1が正常に立上り、給電ライン3の電圧
降下量が異常でなければ、A/D変換回路5とA/D変
換回路6をマイクロプロセッサ8に内蔵されたタイマに
より一定時間毎に監視し、記憶部9に予め設定した値と
比較することにより直流安定化電源工の出力電圧異常及
び給電ラインaの電圧降下異常などの診断が行われる。
If the DC stabilized power supply 1 starts up normally and the voltage drop of the power supply line 3 is not abnormal, the A/D conversion circuit 5 and the A/D conversion circuit 6 are controlled at regular intervals by a timer built in the microprocessor 8. By monitoring and comparing with a value set in advance in the storage unit 9, an abnormal output voltage of the DC stabilized power supply, an abnormal voltage drop in the power supply line a, etc. can be diagnosed.

第2図は、本発明の他の実施例の構成を示す図であり、
マイクロプロセッサ8の制御命令によって直流安定化型
g1の出力電圧を制御する電圧制御部10と、電圧制御
l1A13をさらに設けてあり、他の構成は第1図と同
様である。
FIG. 2 is a diagram showing the configuration of another embodiment of the present invention,
A voltage control unit 10 for controlling the output voltage of the DC stabilized g1 according to a control command from the microprocessor 8 and a voltage control l1A13 are further provided, and the other configurations are the same as in FIG.

マイクロプロセッサ8は、記憶部9よりあらかじめ設定
した受電部2の設定電圧を読み出し、設定電圧とA/D
変換回路6で検出された受電部2の電圧が等しくなるよ
うに電圧制御部10を制御して直流安定化電源1の出力
電圧の制御を行う。
The microprocessor 8 reads the preset voltage of the power receiving unit 2 from the storage unit 9, and compares the set voltage and the A/D.
The output voltage of the DC stabilized power supply 1 is controlled by controlling the voltage control unit 10 so that the voltages of the power receiving unit 2 detected by the conversion circuit 6 are equal.

このように、負荷部4の増減により給電ライン3の電圧
降下量が変化しても、受電部2には常に最適な電源電圧
が与えられるように電源電圧が制御される。
In this way, even if the amount of voltage drop in the power supply line 3 changes due to an increase or decrease in the load section 4, the power supply voltage is controlled so that the optimum power supply voltage is always provided to the power receiving section 2.

さらに、本発明では次のような機能、すなわち、直流安
定化電源1の出力電圧を任意にオペレーション操作によ
り設定する電圧設定機能、前記電圧設定機能をプログラ
ミング操作し、負荷部4に搭載された電子回路の電圧マ
ージン試験を行う試験機能、予め求めた給電ラインaの
直流抵抗値を記憶部9に設定しておき、A/D変換回路
5及びA/D変換回路6により検出し、比較した給電ラ
イン3の電圧降下量から負荷部4の負荷電流を算出する
測定機能などを付加することが可能である。
Furthermore, the present invention has the following functions, namely, a voltage setting function to arbitrarily set the output voltage of the DC stabilized power supply 1 through an operation, and a programming operation of the voltage setting function to control the electronics mounted on the load section 4. A test function that performs a voltage margin test of the circuit, the DC resistance value of the power supply line a determined in advance is set in the storage unit 9, and the power supply is detected by the A/D conversion circuit 5 and the A/D conversion circuit 6 and compared. It is possible to add a measurement function for calculating the load current of the load section 4 from the voltage drop amount of the line 3.

〔発明の効果〕〔Effect of the invention〕

以上、説明したように1本発明によれば、給電ラインと
直流安定化電源の障害を簡単に検出することができ、ま
た受電部に最適な電源電圧が供給されるように直流安定
化電源を制御することができる。
As explained above, according to the present invention, it is possible to easily detect a fault in the power supply line and the DC stabilized power supply, and to adjust the DC stabilized power supply so that the optimum power supply voltage is supplied to the power receiving section. can be controlled.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例の構成を示す図、第2図は
、本発明の他の実施例を示す図である。 図中、1・・・直流安定化電源、2・・・受電部、3・
・・給電ライン、4・・・負荷部、5・・・A/D変換
回路、6・・・A/D変換回路、7・・・制御部、8・
・・マイクロプロセッサ、9・・・記憶部、!O・・・
電圧制御部、!1・・・電圧監視線、12・・・電圧監
視線、13・・・電圧制御線。
FIG. 1 is a diagram showing the configuration of one embodiment of the invention, and FIG. 2 is a diagram showing another embodiment of the invention. In the figure, 1... DC stabilized power supply, 2... Power receiving section, 3...
... Power supply line, 4... Load section, 5... A/D conversion circuit, 6... A/D conversion circuit, 7... Control section, 8.
...Microprocessor, 9...Storage section,! O...
Voltage control section! 1... Voltage monitoring line, 12... Voltage monitoring line, 13... Voltage control line.

Claims (1)

【特許請求の範囲】[Claims] 1、電子回路を搭載した印刷基板等の受電部と、直流安
定化電源と、該受電部と該直流安定化電源を接続する給
電ラインより構成される給電システムにおいて、前記直
流安定化電源の出力電圧を検出する第1の手段と、前記
受電部の電圧を検出する第2の手段と、該第1、第2の
手段の出力と予め設定された所定値とを比較することに
より、前記給電ラインと前記直流安定化電源の異常を監
視する制御手段とを有することを特徴とする電源制御方
式。
1. In a power supply system consisting of a power receiving unit such as a printed circuit board equipped with an electronic circuit, a DC stabilized power supply, and a power supply line connecting the power receiving unit and the DC stabilized power supply, the output of the DC stabilized power supply A first means for detecting the voltage, a second means for detecting the voltage of the power receiving section, and the power supply is performed by comparing the outputs of the first and second means with a predetermined value set in advance. A power supply control system comprising: a line and a control means for monitoring an abnormality in the DC stabilized power supply.
JP09766890A 1990-04-16 1990-04-16 Power control method Expired - Fee Related JP3153220B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP09766890A JP3153220B2 (en) 1990-04-16 1990-04-16 Power control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09766890A JP3153220B2 (en) 1990-04-16 1990-04-16 Power control method

Publications (2)

Publication Number Publication Date
JPH04218A true JPH04218A (en) 1992-01-06
JP3153220B2 JP3153220B2 (en) 2001-04-03

Family

ID=14198417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09766890A Expired - Fee Related JP3153220B2 (en) 1990-04-16 1990-04-16 Power control method

Country Status (1)

Country Link
JP (1) JP3153220B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05292661A (en) * 1992-04-06 1993-11-05 Fanuc Ltd Electric power supply device
WO2002039050A1 (en) * 2000-11-09 2002-05-16 Orica Explosives Technology Pty Limited Sensor for monitoring electronic detonation circuits

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3212460U (en) * 2017-05-31 2017-09-14 直道 高橋 shoes

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05292661A (en) * 1992-04-06 1993-11-05 Fanuc Ltd Electric power supply device
WO2002039050A1 (en) * 2000-11-09 2002-05-16 Orica Explosives Technology Pty Limited Sensor for monitoring electronic detonation circuits
US6941869B2 (en) 2000-11-09 2005-09-13 Orica Explosives Technology Pty Ltd Sensor for monitoring electronic detonation circuits

Also Published As

Publication number Publication date
JP3153220B2 (en) 2001-04-03

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