JPH0423334U

JPH0423334U -

Info

Publication number: JPH0423334U
Application number: JP6382790U
Authority: JP
Priority date: 1990-06-15
Filing date: 1990-06-15
Publication date: 1992-02-26
Anticipated expiration: 2005-06-15
Also published as: JPH083068Y2

Description

[Brief explanation of drawings]

第１図ないし第５図は本考案の第１実施例を示
し、第１図は全体のフローチヤート、第２図はチ
エツクルーチンのフローチヤート、第３図はブロ
ツク図、第４図はタイミングチヤート、第５図は
判定手段のヒステリシス特性を示す特性図である
。第６図は本考案の第２実施例を示す第３図相当
図、第７図は同第３実施例を示す要部のブロツク
図、第８図は同第４実施例を示す要部のブロツク
図、第９図は従来例を示すブロツク図である。図面中、２４は検出用投光素子（投光素子）、
２５はチエツク用投光素子、２８は受光素子、３
０は比較回路、３１は積分回路、３２は判定手段
、３３は制御回路（チエツク手段、異常検出手段
、タイマ手段、ヒステリシス復帰手段）である。 1 to 5 show a first embodiment of the present invention, in which FIG. 1 is an overall flowchart, FIG. 2 is a flowchart of a check routine, FIG. 3 is a block diagram, and FIG. 4 is a timing chart. , FIG. 5 is a characteristic diagram showing the hysteresis characteristic of the determining means. Fig. 6 is a diagram corresponding to Fig. 3 showing the second embodiment of the present invention, Fig. 7 is a block diagram of the main part showing the third embodiment, and Fig. 8 is a main part showing the fourth embodiment of the invention. Block Diagram FIG. 9 is a block diagram showing a conventional example. In the drawing, 24 is a detection light projecting element (light projecting element);
25 is a check light emitting element, 28 is a light receiving element, 3
0 is a comparison circuit, 31 is an integration circuit, 32 is a determination means, and 33 is a control circuit (check means, abnormality detection means, timer means, hysteresis return means).

Claims

[Scope of Claim for Utility Model Registration] 1. A light emitting element, a light receiving element provided to receive light projected from the light emitting element, a light receiving amplifier that amplifies a photoelectric conversion signal from the light receiving element, and a light receiving element that amplifies the light from the light emitting element. When the light is being projected, the detection operation of the object to be detected is performed by determining with a hysteresis characteristic whether the light receiving element is in the light receiving state or not in the light receiving state based on the light receiving signal from the light receiving amplifier. a determination means for forcibly bringing the light-receiving amplifier into a state equivalent to a state in which no light enters the light-receiving element; a forced light-shielding means for setting the light-receiving element in a state, and operating the forced light-entering means or forced light-shielding means so that the light-receiving amplifier is in a state in which light enters the light-receiving element or in a state in which no light enters the light-receiving element. an abnormality detecting means for detecting an abnormality based on whether or not the output of the determining means is inverted in response to the operation of the checking means; and a timer means for periodically operating the hysteresis state in the determination means by operating the forced light entrance means or the forced light shielding means in the opposite direction from the time of operation after the operation of the check means. A photoelectric switch comprising a hysteresis return means for returning to a previous state. 2. The determining means is configured to perform an integral operation and determine that the light is entering the light receiving element on the condition that the integral level reaches a predetermined reference level, and the determining means performs an integral operation and determines that the light is entering the light receiving element, and the determining means performs an integral operation and determines that the light is entering the light-receiving element. A photoelectric switch characterized in that the level is configured to be lower than at other times.