JPH0424677B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a clock display method. Conventionally, among clocks with alarms, analog display type ones have a mechanical clock body, and some display the alarm time using a hand in a different color from the hand for the current time. Furthermore, among the digital display type devices using liquid crystal, there are those that switch and display the alarm time on the current time display section, and those that have an alarm time display section separate from the current time display section.

The present invention uses an electro-optical display element such as a liquid crystal display, and is capable of simultaneously displaying two displays, the current time and the alarm time, using an analog display, reducing the number of lead wires, and providing an easy-to-read clock with a small number of pixels. The purpose is to provide a display method for

Examples of the present invention will be described below.

In FIG. 1, two sealing glasses 1 and 2 are
They face each other with a certain gap between them, and a liquid crystal is sealed within this gap. On the opposing surface of one sealing glass 1, six fan-shaped common electrodes 4 are formed as shown in the second diagram, and terminals q ₀ ... q ₅ are formed from each of them.
has been drawn out. On the opposite surface of the other sealing glass 2, as shown in the third figure, 60 radial segment electrodes 5 are arranged facing the common electrodes 4.

The segment electrodes 5 are divided into 6 groups of 10 each, and the corresponding segment electrodes of each group are electrically connected sequentially by lead wires 6, and connected to 10 terminals r ₀ ... r ₉ . There is. Common electrodes 4 are placed opposite each group of segment electrodes 5.

Figure 4 shows a clock with two displays: a scale 7 that divides the circumference into 60 equal parts on the front of the sealing glass 1;
The number 8 indicating 12 o'clock is formed. 1st
Displays the hours and minutes of the current time in different ways, and in this drawing, 10
It shows the hour and 10 minutes.

The second display is the alarm time, and displays the hours and minutes in different display formats, and furthermore, in a display format that is further different from the hours and minutes of the current time. This drawing shows 5:40.

The method of displaying the current time is that the hour display indicates 10 o'clock using display pixels 5a and 5b, and the minute display indicates 10 minutes using display pixel 5c. The hour display of the alarm time indicates past 5 o'clock by display pixels 5d and 5e, and the minute display indicates 40 minutes by display pixel 5f.

In this way, the hours and minutes at the current time and alarm time are displayed in different ways depending on the number of selected pixels.

Further, one of the current time and the alarm time is displayed in a lit state, and the other is displayed in a blinking state, so that they are different from each other.

The fifth section shows the circuit configuration for performing the above display.
In the figure, Q is a crystal oscillator, DV is a frequency divider,
CT ₁ and CT ₂ are decimal counters that increment the hour display every 12 minutes. M ₁ and M ₁₀ are decimal _and hexadecimal counters for the 1st minute and _10th minute of the clock, respectively _. Susumu,
Hexadecimal counters, M ₂ and M ₂₀ are decimal and hexadecimal counters for 1 minute and 10 minutes, respectively, for setting the alarm time. H ₂ and H ₂₀ receive the output of counter CT ₂ and display the hour hand of the alarm time. It is a decimal and hexadecimal counter for performing. T is a selection pulse generation circuit, and selection pulses for displaying the minutes and hours of the clock, and the minutes and hours of the alarm time in a time-division manner are sequentially generated from terminals P ₁ . . . P ₄ , respectively. G ₁ and G ₂ are selection circuits consisting of gate circuits, and D ₁ and D ₂ are decoders. _A1 ,
A ₂ is a control circuit for displaying time with two display pixels, W is an even/odd discrimination circuit, and E is a switching circuit. Details of this and the control circuits A ₁ and A ₂ will be described later. DR ₁ is a segment electrode drive circuit, DR ₂ is a common electrode drive circuit, g ₁ to _{g 3} are gate circuits, S ₁ , S ₂
is an analog switch and V ₁ is an inverter.

FIG. 6 shows the control circuits A ₁ and A ₂ in detail, consisting of gate circuits g ₄ . . . g ₂₆ .

Figure 7 shows a part of the switching circuit E and the drive circuit _DR1 in detail, and the switching circuit E is a gate circuit.
g ₂₇ ..., g ₂₈ ..., g ₂₉ ..., and the drive circuit DR ₁ consists of analog switches S ₃ ..., S ₄ ..., and inverter V ₂ ....

Note that the drive circuit DR ₂ also has the same configuration as the drive circuit DR ₁ .

Next, regarding the operation, as shown in Figure 4, the clock is set to 10.
An example will be explained in which the alarm time is displayed as 5:40 and the alarm time is 5:40. In this case, the counter
The contents of M ₁ , M ₁₀ , H ₁ , and H ₁₀ are respectively “0”,
At "1", "0", "5", counters M ₂ , M ₂₀ , H ₂ ,
The contents of _H20 are set to "0", "4", "8", and "2", respectively, by the time setting pulse from terminal t. Note that the contents of the counters H ₁ and H ₂ are incremented by one every 12 minutes, so the contents are as described above. First, when a selection pulse is generated from terminal P ₁ , the outputs of counters M ₁ and M ₁₀ are sent to selection circuits G ₁ and
G ₂ and supplied to decoders D ₁ and D ₂ . Therefore, terminal _a10 of decoder _D1 and terminal _a21 of decoder _D2 become "1", and the other terminals become "0".
become. Now, referring to Figure 6, the terminal
When P ₂ and P ₄ are “0”, the output of gate circuit g ₃ is “0”
Therefore, the outputs of the gate circuits g ₄ ... g ₈ , g ₁₄ ... g ₂₀ become "0". Therefore, the above outputs from the decoders D ₁ and D ₂ cause the terminals of the control circuits A ₁ and A ₂ to be
a ₁₀ and a ₂₁ become "1", and the other terminals become "0".
The output of control circuit A ₂ is supplied to drive circuit DR ₂ ,
The output of control circuit _A1 is supplied to switching circuit E.
Now, to describe the operation of the switching circuit E, in this example, as shown in FIG. 3, the segment electrodes 5...
Since the wires are wired in a zigzag pattern one by one, the order of supplying signals to terminals r ₀ ... r ₉ must be reversed depending on whether the 10th digit is an even number or an odd number. Therefore, the discrimination circuit W discriminates whether the 10th digit is an even number or an odd number, and if it is an even number, the terminal W ₁ is set to "1".
When the number is odd, the terminal _W2 becomes "0". Therefore, when the 10th digit is an even number, the gate circuit in Figure 7
g ₂₇ ... is opened and the outputs of terminals a ₁₀ ... a ₁₉ are connected to the respective terminals.
When _the number is _odd , the outputs of terminals a ₁₀ ... a ₁₉ are produced at terminals e ₇ ... e ₀ , respectively.

In the above case, the 10th digit is "1", so the output "1" from terminal a ₁₀ is generated at terminal e ₉ ,
The other terminals _e0 ... _e8 become "0". Therefore, at the terminal r ₉ of the drive circuit DR ₁ there is a pulse from the terminal SSN and the other terminals. A pulse from terminal SN is generated at _r0 ... _r8 . In addition, terminal a ₂₁ of control circuit A ₂ is “1”
Therefore, a pulse from the terminal CS is generated at the terminal q ₁ of the drive circuit DR ₂ , and a pulse from the terminal CN is generated at the other terminals.

Now, since the outputs of gate circuits g ₁ and g ₂ in Fig. 5 are “0”, analog switch S ₁ is turned on,
A pulse from terminal SS is supplied to terminal SSN. In this example, the pulses shown in Figure 8 are supplied to the terminals SS, SN, CS, and CN, and the liquid crystal displays a voltage |
It is assumed that it lights up when 3V| is applied, and turns off when voltage |V| is applied. In other words, the terminal is connected to the common electrode.
It lights up only when a pulse is supplied from CS and a pulse from terminal SS is supplied to the segment electrode.

Therefore, in the above case, a lighting voltage is applied between the segment electrode connected to the terminal _r9 and the common electrode connected to the terminal _q1 , and the display pixel 5 of FIG.
c lights up and the minutes are displayed on the clock.

Next, when a selection pulse is generated from terminal P ₂ , outputs "0" and "5" of counters H ₁ and H ₁₀ are selected,
Terminals d ₁₀ and d ₂₅ of decoders D ₁ and D ₂ become "1".
In FIG. 6, the terminal a ₁₀ of the control circuit A ₁ becomes " ₁ " due to "0" at the terminal d 10, and the output of the gate circuit g ₃ becomes "1" due to the selection pulse. Gate circuit by “1” of terminal _d10
The output of _g14 becomes “1”. Therefore, when the terminal d ₂₅ becomes "1", the terminals a ₂₄ and a ₂₅ of the control circuit A ₂ become "1", and the terminals q ₄ and q ₅ of the drive circuit DR ₂ become "1".
A pulse from the CS occurs.

On the other hand _, the pulse from the terminal SS is supplied to the terminal _r9 of the drive circuit DR1 via the terminal SSN due to "1" of the terminal _a10 of the control circuit _A1 . Therefore,
As shown in FIG. 4, the display pixels 5a and 5b light up to display the hour of the clock.

Next, when a selection pulse is generated from terminal P ₃ , outputs "0" and "4" of counters M ₂ and M ₂₀ are selected,
The terminals d ₁₀ and d ₂₄ of the decoders D ₁ and D ₂ become "1", and _the terminals a ₁₀ and a ₂₄ of the control circuits A 1 and A ₂ become "1". Ten
Since the digits are an even number, "1" at the terminal _a10 is generated at the terminal _e0 of the switching circuit E, and a pulse from the terminal SSN is generated at the terminal _r0 of the drive circuit _DR1 . In addition, the drive circuit
A pulse from terminal CS occurs at terminal q ₂₄ of DR ₂ . Then, when a selection pulse occurs from terminal p ₄ ,
The outputs "8" and "2" of the counters H ₂ and H ₂₀ are selected, a pulse from the terminal SSN is generated at the terminals r ₇ and r ₈ of the drive circuit DR ₁ , and a pulse from the terminal SSN is generated at the terminal q ₂ of the drive circuit DR ₂ .
A pulse from

However, when the selection pulses are generated from the terminals _p3 and _p4 , the output of the gate circuit _g1 in FIG. 5 becomes "1" and one input of the gate circuit _g2 becomes "1". Since the gate circuit g ₂ is supplied with a 1Hz blinking pulse from the frequency divider DV, the analog switches S ₁ and S ₂
open alternately at 1 second intervals. Therefore, pulses from terminals SS and SN are generated alternately at terminal SSN.

Therefore, as shown in the fourth diagram, the display pixels 5d,
5e and 5f flash to display the hour and minute of the alarm time.

9th to 11th illustrations show other examples,
A common electrode and segment electrodes are further provided outside those shown in the second and third figures. That is, in the ninth diagram, six fan-shaped inner common electrodes 4 are formed in the same way as in the second diagram, and six fan-shaped outer common electrodes 9 are formed on the _{outside thereof .} It has been derived.

Also, in Figure 10, 60
The inner segment electrodes 5 are divided into six groups of 10 electrodes each, as shown in the third diagram, and each group faces the inner common electrodes 4. There are 60 outer segment electrodes 10 on the outer extension of the inner segment electrodes 5, which are also divided into six groups of 10, and each group faces an outer common electrode 9.

A plurality of electrode pairs are formed by the conductively connected inner segment electrode 5 and outer segment electrode 10, and the electrode pairs are divided into a predetermined number of groups, and corresponding electrode pairs in each group are sequentially connected to each other. It is connected by lead wire 11..., and there are 10 extraction electrodes r ₀ ...
Connected to _r9 .

Figure 11 shows an example in which a clock and alarm time are displayed using the above-mentioned display pixels.The hour display of the clock is performed by the hour hand using the inner display pixels 5a and 5b, and the minute display is performed by the inner display pixels 5c and 5d. The outer display pixels 10c and 10d display a long hand, and the time 10:10 is displayed.

In addition, the alarm time is displayed on inner display pixel 5.
The hour hand is displayed by e, and the minute hand is displayed by the inner display pixel 5f and the outer display pixel 10f, and 5:40 is displayed. In this example, the hour and minute displays are in different states depending on their length, and the hour and minute displays on the clock are in different states depending on the number of pixels selected. .

In this example, depending on whether the hour display is AM or PM, either one is lit,
Display the other one in a blinking state. When AM is lit and PM is blinking, for example, if pixels 5a and 5b of the hour display on the clock are lit and pixel 5e of the alarm time display is blinking, the clock will indicate 10 AM.
10 minutes, and the alarm time is 5:40 p.m. In other words, the 12-hour analog display makes it possible to set an alarm time once every 24 hours.

Figure 12 shows the circuit for making the above display, where F ₁ and F ₂ are flip-flop circuits for determining the clock and alarm time, AM and PM, respectively, and terminals PM ₁ and PM ₂ are for determining AM and PM, respectively. It becomes “1”.
g ₃₀ ...g ₃₂ are gate circuits, G ₃ is a selection circuit with an AND function, and DR ₃ is a drive circuit for the common electrodes 9, whose configuration is the same as that of the drive circuit DR ₃ .

Note that the same reference numerals as in FIG. 5 indicate the same parts. However, the gate circuit _g3 is supplied with clock hour and minute selection pulses from terminals _p1 and _p2 . In this example, the hour of the clock is displayed using two inner display pixels, and the minute is displayed using two inner display pixels and two inner display pixels.
This is because the display is performed using two outer display pixels.

Further, the gate circuit g ₃₀ is supplied with selection pulses from the terminals p ₁ and p ₃ , thereby controlling the control circuit.
The output of _A2 is supplied to the drive circuit _DR3 via the selection circuit _G3 . In other words, since the minute display of the alarm time also lights up the outer display pixels, the same pulses generated at the terminals q ₀ ... q ₅ of the drive circuit DR ₂ of the inner common electrode are applied to the drive circuit DR of the outer common electrode. ₃ are also generated at the terminals u ₀ ... u ₅ of the terminals 3 and supplied to the outer common electrode 9.

Furthermore, the gate circuit _g31 is supplied with a clock hour selection pulse from terminal _p2 and a clock afternoon discrimination output, and the gate circuit _g32 is supplied with a selection pulse at alarm time from terminal _p4 . and an output for determining the afternoon alarm time. Therefore, for both the clock and the alarm time, the hour display pixels blink in the afternoon.

As described above, according to the present invention, analog display can be performed with a small number of display pixels, the current time and the alarm time can be displayed simultaneously using a common display pixel, and the current time can be easily distinguished from the alarm time. Ru. Furthermore, the display can be displayed at all times, making it easy to grasp the context and quantitative sense of the display, and from this point of view as well, the display is easy to read. Further, since the radial segment electrodes or the inner and outer segment electrodes are divided into a plurality of groups of a predetermined number, and the opposing segment electrodes of each group are electrically conductively connected, the number of lead wires can be reduced.

[Brief explanation of drawings]

The drawings show embodiments of the present invention; FIG. 1 is a cross-sectional view, FIG. 2 is a front view showing electrodes on one sealing glass, and FIG. 3 is a front view showing electrodes on the other sealing glass. Fig. 4 is a front view showing one display mode, Fig. 5 is a theoretical circuit diagram for displaying the display shown in Fig. 4, and Figs. 6 and 7 show a part of Fig. 5 in detail. Logic circuit diagram; Figure 8 is a pulse waveform diagram showing pulses supplied to the electrodes and pulses applied to the liquid crystal;
9 and 10 are front views showing other electrode structures, FIG. 11 is a front view showing one display mode using this electrode structure, and FIG. 12 is a logic circuit for performing the display shown in FIG. 11. It is a diagram. 3... Electro-optical display element, 4... Common electrode,
5... Segment electrode, 6... Lead wire, 10...
...Outer segment electrode, 11...Lead wire, 5a
~5f...inner display pixel, 10c, 10d, 10
f...Outer display pixel.

Claims (1)

[Scope of Claims] 1. A plurality of segment electrodes are arranged radially, the segment electrodes are divided into a plurality of groups of a predetermined number, and corresponding segment electrodes of each group are electrically connected to each other, and the segment electrodes are connected to each other conductively. A plurality of display pixels are formed by arranging common electrodes for each group and interposing an electro-optical display element between each segment electrode and the common electrode, and the display pixels display the current time. The hours and minutes are displayed in different display formats, and the display pixels simultaneously display the hours and minutes of the alarm time in different display formats at the same time as the current time. A clock display method characterized by displaying the clock in a further different display mode. 2 A plurality of electrode pairs, which are conductively connected inner segment electrodes and outer segment electrodes, are arranged radially, and the above electrode pairs are divided into a predetermined number of groups, and corresponding electrode pairs in each group are connected to each other. conductively connected, an inner common electrode for each group is opposed to the inner segment electrode, and an outer common electrode for each group is opposed to the outer segment electrode, and between each segment electrode and the common electrode. A plurality of inner display pixels and outer display pixels are configured by interposing an electro-optical display element in the inner display pixel, and the inner display pixel simultaneously displays the current time and the alarm time in different display modes. A clock display method, characterized in that the display pixels and the outer display pixels simultaneously display the current time and the minutes of the alarm time in different display modes.