JPH04252684A - Video signal expansion circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal expansion circuit used for adjusting or checking a video tape recorder that records fast-moving subjects.

0002

BACKGROUND OF THE INVENTION In recent years, recording devices such as video tape recorders that record objects moving at high speed have come into widespread use, and in order to check and adjust the recording status of the devices, video signals are compressed. Increasingly, it is being carried out such as stretching or stretching.

A video signal expansion circuit conventionally used in this type of recording and reproducing equipment will be explained below with reference to the drawings.

As shown in FIG. 3, a conventional video signal expansion circuit generally consists of a memory section 2, a clock generation section 3, a write control section 6, and a read control section 8. .

The operation of the video signal expansion circuit configured as described above will be explained below.

First, in FIG. 3, a signal (hereinafter referred to as a compressed video signal) in which the number of image fields per second is greater than that of a standard video signal is input from a video signal input terminal 1 to a memory section 2. A clock generator 3 generates a write clock signal 4 and a read clock signal 5 that are synchronized with the input compressed video signal. The write control section 6 sends to the memory section 2 a signal for writing only a field of the input video signal at a predetermined position with respect to the signal input from the reference signal input terminal 10, that is, a write control signal 7. The read control unit 8 also sends a read control signal 9 to the memory unit 2.
is generated. The signal read from the memory section 2 is output from the video signal output terminal 11.

Next, FIG. 4 shows a timing diagram to supplement the above explanation, and shows an example in which an input video signal is time-axis compressed to, for example, three times that of a standard format video signal. The reference signal shown in FIG. 4 is a signal input to the reference signal input terminal 10 in FIG. 3, and is one of the standard video signals.
It is a signal with the same period as the field. The input video signal in FIG. 4 is a compressed signal that is input to the video signal input terminal 1 in FIG. 3, and in the case of the conventional example, it is a video signal that has been time-axis compressed by, for example, three times. In other words, the reference signal is compressed so that three fields are included between one field of the reference signal. A write section and a read section in FIG. 4 indicate sections in which writing and reading of the memory section are performed by the write control signal 7 and read control signal 9 in FIG. 3, respectively.

[0008] Originally, the video compressed signal is generated in the camera section and the subsequent signal processing section, but there may be variations in the video signal on a field-by-field basis in these sections. However, even if we try to directly monitor this compressed signal, we cannot see it because it is not a standard format video signal. Therefore, the compressed signal is decompressed and converted back into a standard format video signal.

[0009]

However, in the conventional configuration described above, when reading out compressed signals, only those at fixed positions in time with respect to the reference signal can be read out. However, when it is necessary to read out the compressed signal regardless of the reference signal, there is a problem in that it is impossible to check or adjust the portions of the compressed signal that are not expanded.

SUMMARY OF THE INVENTION An object of the present invention is to provide a video signal expansion circuit which solves the above-mentioned conventional problems and allows checking and adjustment of all compressed signal fields.

[0011]

[Means for Solving the Problems] In order to achieve this object, the video signal expansion circuit of the present invention includes a circuit that can record a signal having more image fields per second than a standard video signal, and This configuration realizes a video signal expansion circuit that includes a circuit for decompressing the video signal to restore it to a standard format video signal, and a circuit for selecting the field to be expanded during the expansion.

0012

According to the present invention, in the above-described configuration, fields of the compressed signal to be expanded are selected for a certain reference signal, and expansion is performed based on the selection, thereby making it possible to check and adjust all the fields of the compressed signal.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, the selection signal input terminal 12
The configuration is completely the same as the conventional example shown in FIG. 3 except for the addition of a new configuration, so a description of the configuration will be omitted.

The operation of the video signal expansion circuit configured as described above will be explained below with reference to FIGS. 1 and 2.

First, as shown in FIG. 1, a signal having more image fields per second than the standard video signal, that is, a compressed video signal, is input from the video signal input terminal 1 to the memory unit 2. The clock generator 3 generates a write clock signal 4 and a read clock signal 5 that are synchronized with the input compressed video signal. The write control unit 6 determines the field of the input video signal for the signal input from the reference signal input terminal 10 based on the selection signal input from the selection signal input terminal 12, and outputs a control signal for writing only the field to be selected. , that is, the write control signal 7 is sent to the memory section 2. In addition, the reading control unit 8
generates a read control signal 9 to the memory section 2. The signal read from the memory section 2 is output to the video signal output terminal 11.

As described above, according to the embodiment of the present invention, by providing a circuit that can select the field to be expanded, it is possible to check and adjust the fields of all compressed signals.

It goes without saying that in the embodiment of FIG. 1, the memory section 2 may be a digital memory such as S-RAM or D-RAM, or an analog memory such as CCD.

In addition, in the timing diagram of FIG. 2, the input video signal is compressed, for example, three times as much as the standard format video signal, so three types of selections are shown, but naturally the input video signal is compressed three times as much as the standard video signal. However, when compression is performed by n times (n>1), there are n choices.

[0020]

As is clear from the above embodiments, according to the present invention, there is provided a circuit that can record a signal having more image fields per second than a standard format video signal, and a circuit that can record a signal with a larger number of image fields per second than a standard format video signal, and a circuit that expands the time axis of the signal to produce a standard format video signal. By providing a video signal expansion circuit that includes a circuit that restores the signal and a circuit that can select the fields to be expanded during the expansion, it is possible to check and adjust the fields of all compressed signals. It is possible to provide a signal expansion circuit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video signal expansion circuit in an embodiment of the present invention.

[Figure 2] (a) Timing diagram of the field screen in the embodiment (b) Same timing diagram (c) Same timing diagram

[Figure 3] Block diagram of a conventional video signal expansion circuit

[Figure 4]
Timing diagram of field screen in conventional example

[Explanation of symbols]

1 Video signal input terminal 2 Memory section 3 Clock generation section 6 Write control section 8 Readout control section 10 Reference signal input terminal 11 Video signal output terminal 12 Selection signal input terminal

Claims (1)

[Claims] Claim 1: A circuit capable of recording a signal in which the number of image fields per second is greater than that of a standard video signal, a circuit that expands the time axis of the signal to return it to the standard video signal, and selects the fields to be expanded during the expansion. A video signal expansion circuit equipped with a circuit that can.