JPH0425324U - - Google Patents
Info
- Publication number
- JPH0425324U JPH0425324U JP6547890U JP6547890U JPH0425324U JP H0425324 U JPH0425324 U JP H0425324U JP 6547890 U JP6547890 U JP 6547890U JP 6547890 U JP6547890 U JP 6547890U JP H0425324 U JPH0425324 U JP H0425324U
- Authority
- JP
- Japan
- Prior art keywords
- switching means
- switching
- controllable switch
- bias voltage
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Thyristor Switches And Gates (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の１実施例を示す回路図、第２
図〜第７図はそれぞれ従来のスイツチング回路を
示す回路図、第８図、第９図はそれぞれ本考案の
１実施例を示す回路図、である。
符号の説明、１８……サイリスタ（ゲート・タ
ーン・オフ型）、１９……トランジスタ（ノーマ
リイ・オン型ＳＩＴ）、ｔ１〜ｔ５……端子。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing one embodiment of the present invention.
7 to 7 are circuit diagrams showing conventional switching circuits, and FIGS. 8 and 9 are circuit diagrams showing one embodiment of the present invention, respectively. Explanation of symbols: 18...Thyristor (gate turn-off type), 19...Transistor (normally on type SIT), t1 to t5...terminals.
Claims (1)
チング手段があつて、その駆動信号入力用に対を
なすその制御端子、主端子を制御端子ｃｔ、主端
子ｍｔａとしたときに、 前記主端子ｍｔａ側に第１の非可制御スイツチ
が来る様に、しかも、第２のスイツチング手段と
前記第１のスイツチング手段で前記第１の非可制
御スイツチを挟む様に、これらを直流電圧源の両
電源端子間に直列接続し、 前記第１のスイツチング手段に逆バイアス電圧
を供給する逆バイアス電圧供給手段を、前記第１
の非可制御スイツチと前記第２のスイツチング手
段の接続点と前記制御端子ｃｔ間に接続し、 前記第２のスイツチング手段がオンのとき、前
記逆バイアス電圧供給手段が前記第２のスイツチ
ング手段と通流手段を介して前記制御端子ｃｔ・
主端子ｍｔａ間に逆バイアス電圧を印加する閉回
路を形成し、 前記第２のスイツチング手段がオンのとき、前
記第１のスイツチング手段にオン信号を出力しな
いオン信号出力手段を設けたことを特徴とするス
イツチング回路。 (2) 前記通流手段として、前記第１の非可制御
スイツチと前記第２のスイツチング手段の直列回
路に逆向きに第２の非可制御スイツチを並列接続
したことを特徴とする請求項１記載のスイツチン
グ回路。 (3) 前記通流手段として、前記第１の非可制御
スイツチと前記第２のスイツチング手段の直列回
路に抵抗を並列接続したことを特徴とする請求項
１記載のスイツチング回路。 (4) 前記通流手段として、前記第１の非可制御
スイツチと前記第２のスイツチング手段の直列回
路に並列接続した負荷を用いたことを特徴とする
請求項１記載のスイツチング回路。[Claims for Utility Model Registration] (1) There is a first switching means having a self-turn-off function, and its control terminals and main terminals are connected to a control terminal ct and a main terminal mta, which form a pair for inputting drive signals. , the first non-controllable switch is placed on the main terminal mta side, and the first non-controllable switch is sandwiched between the second switching means and the first switching means. , these are connected in series between both power supply terminals of a DC voltage source, and a reverse bias voltage supply means for supplying a reverse bias voltage to the first switching means is connected to the first switching means.
is connected between the connection point of the non-controllable switch and the second switching means and the control terminal ct, and when the second switching means is on, the reverse bias voltage supply means is connected to the second switching means. The control terminal ct・
A closed circuit is formed to apply a reverse bias voltage between the main terminals mta, and an on-signal output means is provided that does not output an on-signal to the first switching means when the second switching means is on. A switching circuit that does this. (2) As the communication means, a second non-controllable switch is connected in parallel in a reverse direction to a series circuit of the first non-controllable switch and the second switching means. The switching circuit described. (3) A switching circuit according to claim 1, characterized in that, as said communication means, a resistor is connected in parallel to a series circuit of said first non-controllable switch and said second switching means. (4) The switching circuit according to claim 1, characterized in that the flow means is a load connected in parallel to a series circuit of the first non-controllable switch and the second switching means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6547890U JPH0425324U (en) | 1990-06-22 | 1990-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6547890U JPH0425324U (en) | 1990-06-22 | 1990-06-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0425324U true JPH0425324U (en) | 1992-02-28 |
Family
ID=31597343
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6547890U Pending JPH0425324U (en) | 1990-06-22 | 1990-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0425324U (en) |
-
1990
- 1990-06-22 JP JP6547890U patent/JPH0425324U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR840007325A (en) | Switch circuit | |
| JPH0444737U (en) | ||
| JPS61184332U (en) | ||
| JPH0423333U (en) | ||
| JPS6172089U (en) | ||
| JP2805349B2 (en) | Switching circuit | |
| JPH0317471Y2 (en) | ||
| JPH0382931U (en) | ||
| JPH0455608U (en) | ||
| JPH0716176Y2 (en) | Three-phase load switch | |
| JPS63131591U (en) | ||
| JPH0458705U (en) | ||
| JPH04156226A (en) | Inverse connection preventing switching circuit | |
| JPS6012351Y2 (en) | switching circuit | |
| JPS6321487U (en) | ||
| JPS6119531Y2 (en) | ||
| JPH0260497U (en) | ||
| JPS6365122U (en) | ||
| JPS62187319U (en) | ||
| JPH0225197U (en) | ||
| JPH03128332U (en) | ||
| JPH0458083U (en) | ||
| JPS6067619U (en) | Operation switch circuit for remote control breaker | |
| JPH02837U (en) | ||
| JPH0799432A (en) | Solid-state relay |