JPH04254371A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce a manufacturing cost by forming polycrystalline silicon films on sidewalls of a gate electrode through an insulating film. CONSTITUTION:Sidewall polycrystalline silicon films 10a, 10b are formed on sidewalls of a polycrystalline silicon gate electrode 8. Then, arsenic is ion implanted to the film 10, and a self-alignment N-type source/drain region 12 is formed on the film 10a. On the other hand, arsenic and boron are ion implanted to the film 10b, and a self-alignment P-type source/drain region 13 is formed on the film 10b. Thereafter, when it is heat treated, low concentration N-type and P-type LDD regions 14, 15 are formed by thermal diffusing the arsenic, boron from the films 10a, 10b. Thus, steps are simplified to reduce a manufacturing cost.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a MOS transistor having an LDD structure.

0002

[Prior Art] Using FIGS. 11 to 17, a conventional LDD
A method for manufacturing a CMOS transistor having this structure will be described.

First, a P well 102 and an N well 103 are formed on a P type silicon substrate 101, and a LOCOS oxide film 1 is formed.
After separating the element formation region by 04, the gate oxide film 105 is
A polycrystalline silicon film 106 is grown over the entire surface (FIG. 11). Thereafter, a polycrystalline silicon gate electrode 108 is formed using photolithography technology and etching technology, and phosphorus is ion-implanted only in the N-channel transistor region using an ion implantation mask 111aa using photolithography technology to form a low concentration N-type region 117. (Fig. 12). Thereafter, similarly, boron ions are implanted only in the P channel transistor region using an ion implantation mask 111ba formed by photolithography to form a low concentration P type region 118 (FIG. 13).

Further, a silicon oxide film 119 is deposited over the entire surface (FIG. 14), and this is etched back to form a sidewall silicon oxide film 120 on the side wall of the polycrystalline silicon gate electrode 108 (FIG. 15).

Thereafter, using the ion implantation mask 111ab using photolithography again, arsenic is ion-implanted only in the N-channel transistor region to form an N-type source.
A drain region 112 is formed. Simultaneously with the formation of this region, an N-type LDD region 114 is also formed (FIG. 16). Similarly, using an ion implantation mask 111bb formed by photolithography, boron ions are implanted only in the P channel transistor region to form P type source/drain regions 113. At the same time as this region is formed, a P-type LDD region 115 is also formed (FIG. 17). After that, by forming an interlayer insulating film and wiring with Al etc., the MO
Manufacture an S-type transistor.

[0006]

[Problems to be Solved by the Invention] In the conventional semiconductor device manufacturing method described above, in order to form an N-channel transistor and a P-channel transistor into an LDD structure, two photolithography steps are required for each after forming a gate electrode. Two ion implantation steps were required, and a total of four photolithography steps and four ion implantation steps were required. For this reason, there have been problems in that the manufacturing process becomes complicated, the manufacturing period becomes long, and the manufacturing cost increases.

[0007]

[Means for Solving the Problems] The method for manufacturing a semiconductor device of the present invention requires a total of two photolithography steps and two With 1 ion implantation process and 1 heat treatment process, an N-channel transistor with LDD structure, P
Forms a channel transistor.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIGS. 1 to 10 are cross-sectional views of steps for explaining an embodiment of the present invention.

First, using conventional technology, a P well 2 and an N well 3 are formed on a P type silicon substrate 1, and the LOCOS
After separating the element formation region with oxide film 4, gate oxide film 5 is formed.
form. Thereafter, a polycrystalline silicon film 6 is deposited on the entire surface, and a thin silicon nitride film 7 is deposited on the surface [FIG.
]. A polycrystalline silicon gate electrode 8 is formed using photolithography and etching techniques [FIG. 2], and a sidewall silicon oxide film 9 is formed on the sidewalls of the polycrystalline silicon gate electrode 8 by thermal oxidation [FIG. 3]. The silicon oxide film on the source/drain forming regions is removed by dry etching (FIG. 4).

Next, a non-doped polycrystalline silicon film 1 is formed.
By depositing 6 on the entire surface [FIG. 5] and etching back the polycrystalline silicon film 16, sidewall polycrystalline silicon films 10a and 10b are formed on the sidewalls of the polycrystalline silicon gate electrode 8 via the non-doped sidewall silicon oxide film 9. is formed (Figure 6).

Next, arsenic ions are implanted using the ion implantation mask 11a covering the P channel transistor formation region to form self-aligned N type source/drain regions 12 in the sidewall polycrystalline silicon film 10a. At this time, arsenic is also implanted into the sidewall polycrystalline silicon film 10a [
Figure 7]. Similarly, arsenic ions are implanted using an ion implantation mask 11b that covers the N-channel transistor formation region to form self-aligned P-type source/drain regions 13 in the sidewall polycrystalline silicon film 10b. At this time, boron is also implanted into the sidewall polycrystalline silicon film 10b [
Figure 8].

After that, when heat treatment is performed, arsenic and boron are thermally diffused from the sidewall polycrystalline silicon films 10a and 10b to form low concentration N-type LDD regions 14 and P-type LDD regions 15.
is formed (Figure 9). Subsequently, sidewall polycrystalline silicon films 10a and 10b are removed by etching (FIG. 10), followed by deposition of an interlayer insulating film and formation of wiring, thereby completing the semiconductor device.

[0013]

As explained above, the method for manufacturing a semiconductor device of the present invention is a method for manufacturing a CMOS transistor, in which a CMOS transistor is manufactured by a total of two photolithography steps, two ion implantation steps, and one heat treatment step. A transistor LDD structure can be formed. Therefore, compared to conventional manufacturing methods, the manufacturing process is simplified, the manufacturing period is shortened, and manufacturing costs can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a sectional view for explaining one embodiment of the present invention.

FIG. 2 is a sectional view for explaining one embodiment of the present invention.

FIG. 3 is a sectional view for explaining one embodiment of the present invention.

FIG. 4 is a sectional view for explaining one embodiment of the present invention.

FIG. 5 is a sectional view for explaining one embodiment of the present invention.

FIG. 6 is a sectional view for explaining one embodiment of the present invention.

FIG. 7 is a sectional view for explaining one embodiment of the present invention.

FIG. 8 is a sectional view for explaining one embodiment of the present invention.

FIG. 9 is a sectional view for explaining one embodiment of the present invention.

FIG. 10 is a sectional view for explaining one embodiment of the present invention.

FIG. 11 is a cross-sectional view for explaining a conventional technique.

FIG. 12 is a cross-sectional view for explaining a conventional technique.

FIG. 13 is a cross-sectional view for explaining a conventional technique.

FIG. 14 is a cross-sectional view for explaining a conventional technique.

FIG. 15 is a cross-sectional view for explaining a conventional technique.

FIG. 16 is a sectional view for explaining a conventional technique.

FIG. 17 is a cross-sectional view for explaining a conventional technique.

[Explanation of symbols]

1,101 P-type silicon substrate 2,102 P well 3,103 N well 4,104 LOCOS oxide film 5,105 Gate oxide film 6,16,106 Polycrystalline silicon film 7
Silicon nitride film 8, 108 Polycrystalline silicon gate electrode 9, 12
0 Sidewall silicon oxide film 10a, 10b
Sidewall polycrystalline silicon films 11a, 11b, 111aa, 1
11ab, 111ba, 111bb Ion implantation mask 12, 112 N type source/drain region 13, 113 P type source/drain region 14,
114 N-type LDD region 15, 115 P-type LDD region 117 Low concentration N-type region 118 Low concentration P-type region 119 Silicon oxide film

Claims (3)

[Claims] 1. A method for manufacturing a MOS type semiconductor device having an LDD structure, comprising: forming a gate oxide film on a semiconductor substrate of one conductivity type; and forming a gate electrode at a predetermined portion on the gate oxide film. a step of forming an insulating film on the sidewalls of the gate electrode and removing the gate oxide film other than directly under the gate electrode; and a step of forming a polycrystalline silicon film on the sidewalls of the gate electrode via the insulating film. a step of ion-implanting an impurity of the opposite conductivity type into the entire surface; a step of diffusing the impurity of the opposite conductivity type directly under the polycrystalline silicon film formed on the sidewall by heat treatment;
A method of manufacturing a semiconductor device, comprising: 2. The method further comprises the step of diffusing an impurity of an opposite conductivity type directly under the polycrystalline silicon film formed on the sidewall, and then etching away the polycrystalline silicon film formed on the sidewall. 2. The method of manufacturing a semiconductor device according to claim 1. 3. The method further comprises the step of diffusing an impurity of an opposite conductivity type directly under the polycrystalline silicon film formed on the sidewall, and then thermally oxidizing the polycrystalline silicon film formed on the sidewall. 2. The method of manufacturing a semiconductor device according to claim 1.