JPH04255206A - Ceramic capacitor and manufacture thereof - Google Patents

Ceramic capacitor and manufacture thereof

Info

Publication number
JPH04255206A
JPH04255206A JP6087791A JP6087791A JPH04255206A JP H04255206 A JPH04255206 A JP H04255206A JP 6087791 A JP6087791 A JP 6087791A JP 6087791 A JP6087791 A JP 6087791A JP H04255206 A JPH04255206 A JP H04255206A
Authority
JP
Japan
Prior art keywords
capacitor
base plate
capacitance
chips
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6087791A
Other languages
Japanese (ja)
Other versions
JPH0722070B2 (en
Inventor
Yoichi Shimizu
洋一 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YUUDEN KENKYUSHO KK
Original Assignee
YUUDEN KENKYUSHO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YUUDEN KENKYUSHO KK filed Critical YUUDEN KENKYUSHO KK
Priority to JP6087791A priority Critical patent/JPH0722070B2/en
Publication of JPH04255206A publication Critical patent/JPH04255206A/en
Publication of JPH0722070B2 publication Critical patent/JPH0722070B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain the title ceramic capacitor having excellent preciseness and quality by a method wherein a capacitor chip having the capacity which is a fraction that of a capacitor to be produced is roughly manufactured, and after it has been sorted, the sorted parts are properly assembled, and an electrode film is provided on the rear surface of the base plate in which the chip will be incorporated. CONSTITUTION:When the capacitance of a capacitor to be manufactured is 300PF, capacitor chips 1 are formed in the capacitance of 90 to 110PF, on the basis of 100PF which is 1/3 of the capacitance of the capacitor, when the maximum capacitance error is set at + or -10%. The capacitance of each chip 1 is measured, and the chips are classified into chips 1a of 108 to 110PF, 1b of 106 to 108PF, 1c of 104 to 106PF and the like, for example. The three of 1b (106 to 108PF), 1f (98 to 100PF) and 1j (92 to 94PF) are selected from chips 1a to 1j, for example, and when they are incorporated in parallel in a base plate, the capacitances become 296 to 302PF. Then, actual capacitance is measured, and if it is close to 302PF, a capacitor of 300PF can be obtained by using a base plate having a small area of an adjusting electrode film 23.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は容量誤差の非常に少ない
るセラミックコンデンサ及びその製造方法に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic capacitor with very little capacitance error and a method for manufacturing the same.

【0002】0002

【従来の技術】セラミックコンデンサは,磁器誘電体を
利用したもので,最近は電子部品の小型化の要求により
積層型のものが多く採用されている。この積層型のセラ
ミックコンデンサは,誘電体セラミックグリーンシート
上に内部電極となる導電膜を印刷形成し,このシートを
積層すると共に圧着し,所定の容量となるように型抜き
した後焼成し,焼結積層体の側面に内部電極膜を接続す
る外部引出電極を設けてコンデンサチップを形成し,更
に回路への実装のためのベース板に形成した一対の電極
膜に前記チップを接着し,電極膜には外部リード線を接
続し,外部リード線を突出せしめる状態でその他の部分
を樹脂でモールドしてなるものである。
2. Description of the Related Art Ceramic capacitors utilize a porcelain dielectric material, and in recent years, multilayer capacitors have been widely adopted due to the demand for smaller electronic components. This multilayer ceramic capacitor is made by printing a conductive film that serves as an internal electrode on a dielectric ceramic green sheet, stacking the sheets, pressing them together, cutting out a mold to have a predetermined capacitance, and firing it. A capacitor chip is formed by providing an external extraction electrode on the side surface of the laminated body to connect the internal electrode film, and then bonding the chip to a pair of electrode films formed on a base plate for mounting on a circuit. An external lead wire is connected to the external lead wire, and the other parts are molded with resin with the external lead wire protruding.

【0003】0003

【発明が解決しようとする課題】ところで前記の積層型
のコンデンサチップや非積層型のコンデンサチップでは
,誘電体であるセラミックの厚さ,型抜きに際しての微
妙な面積の相違等によって200PF程度の容量のもの
で±8%程度の誤差が生ずる。このため製品歩溜りが悪
いと共に,製出されるコンデンサ容量の許容誤差が大き
くなってしまい,必ずしも品質が良い電子部分とは云え
ない。そこで本発明は,容量誤差の少ないコンデンサを
効率良く製出する手段を提案したものである。
[Problem to be Solved by the Invention] However, in the above-mentioned multilayer capacitor chips and non-multilayer capacitor chips, the capacitance is about 200PF due to the thickness of the dielectric ceramic and subtle differences in area during die cutting. This results in an error of about ±8%. This results in poor product yield and large tolerances in the capacitance of manufactured capacitors, which does not necessarily result in high-quality electronic parts. Therefore, the present invention proposes a means for efficiently producing a capacitor with little capacitance error.

【0004】0004

【課題を解決するための手段】本発明に係るセラミック
コンデンサは,外部リード線と接続する一対の電極膜を
ベース板の表面に形成し,前記ベース板の電極膜間にセ
ラミックコンデンサチップを接着し,外部リード線を突
出せしめて他の全体を樹脂モールドしてなるセラミック
コンデンサに於いて,製出せんとするコンデンサ容量の
数分の一の容量のコンデンサチップを所定数電極膜間に
接続してなることを特徴とするものであり,ベース板背
面にコンデンサ容量微調整用の電極膜を形成したことを
特徴とするものである。
[Means for Solving the Problems] A ceramic capacitor according to the present invention has a pair of electrode films connected to external lead wires formed on the surface of a base plate, and a ceramic capacitor chip bonded between the electrode films of the base plate. , in a ceramic capacitor with external lead wires protruding and the rest entirely molded with resin, a predetermined number of capacitor chips with a capacity that is a fraction of the capacitor capacity to be manufactured are connected between the electrode films. This is characterized by the fact that an electrode film for fine adjustment of capacitor capacitance is formed on the back surface of the base plate.

【0005】また本発明に係るセラミックコンデンサの
製造方法は,前記コンデンサを製出するに際して,製出
せんとするコンデンサ容量の数分の一の容量でコンデン
サチップを複数形成し,各チップの容量誤差を予め測定
して分別しておき,分別したチツプを適宜組み合わせて
ベース板に装着し,所望の容量としたことを特徴とする
ものであり,特に前記製造方法に於いて,ベース板の背
面に調整用電極膜を形成すると共に,調整用電極膜の面
積が相違するベース板を複数形成し,所望の容量を得る
ことのできるベース板を選択して使用することを特徴と
するものである。
[0005] Furthermore, in the method for manufacturing a ceramic capacitor according to the present invention, when manufacturing the capacitor, a plurality of capacitor chips are formed with a capacity that is a fraction of the capacitor capacity to be manufactured, and the capacitance error of each chip is eliminated. It is characterized in that the chips are measured and separated in advance, and the separated chips are appropriately combined and mounted on the base plate to obtain the desired capacity. The present invention is characterized in that a plurality of base plates are formed with adjusting electrode films having different areas, and a base plate that can obtain a desired capacitance is selected and used.

【0006】[0006]

【作用】コンデンサチップの容量に数%の誤差があって
も,プラス,マイナスの誤差を有するものを組み合わせ
ることによって所定の容量のコンデンサを得ることがで
きる。またベース板背面の調整用電極膜はコンデンサチ
ップの内部電極膜並びにコンデンサチップを接続する電
極膜との間に静電容量を構成することになり,電極膜の
面積の多少でコンデンサの全体の容量の微調整が可能と
なる。
[Operation] Even if there is an error of a few percent in the capacitance of a capacitor chip, a capacitor with a predetermined capacity can be obtained by combining capacitors with positive and negative errors. In addition, the adjustment electrode film on the back of the base plate forms a capacitance between the internal electrode film of the capacitor chip and the electrode film that connects the capacitor chip, and the overall capacitance of the capacitor depends on the area of the electrode film. fine adjustment is possible.

【0007】[0007]

【実施例】次に本発明の実施例を積層型のセラミックコ
ンデンサの場合について,その製造手順に添って説明す
る。最初に積層型のセラミックコンデンサチップ1を形
成するもので,これは従来と同様に誘電体セラミックグ
リーンシート11上に内部電極膜12を印刷形成し,こ
のシートを積層すると共に圧着し,所定の大きさに型抜
きして焼成し,焼結後積層体の側面に交互に重ねた各電
極膜12と接続する外部引出電極13を設けて形成して
なるものである。このコンデンサチップ1を形成するに
際にして製出せんとするコンデンサの容量を例えば30
0PFとすると,前記コンデンサチップ1は三分の一の
容量となる100PFを基準として形成する。100P
Fのセラミックコンデンサチップ1は,その容量誤差を
最大±10%とすると,110〜90PFのものが製出
されることになる。そこで110〜90PFのチップ1
を各個測定して適当な分別例えば110〜108PFの
チップ1a,108〜106PFのチップ1b,106
〜104PFのチップ1c……92〜90PFのチップ
1jのように分別しておく。
[Embodiment] Next, an embodiment of the present invention will be explained in the case of a multilayer ceramic capacitor along with its manufacturing procedure. First, a laminated ceramic capacitor chip 1 is formed by printing an internal electrode film 12 on a dielectric ceramic green sheet 11 in the same way as in the past, and then laminating and press-bonding these sheets to a predetermined size. The laminate is molded and fired, and after sintering, external extraction electrodes 13 are provided on the sides of the laminate to connect with the electrode films 12 stacked alternately. When forming this capacitor chip 1, the capacitance of the capacitor to be produced is, for example, 30.
Assuming 0PF, the capacitor chip 1 is formed based on 100PF, which is one third of the capacitance. 100P
Assuming that the capacitance error is at most ±10%, the F ceramic capacitor chip 1 will be manufactured with a value of 110 to 90 PF. So 110~90PF chip 1
For example, chips 1a of 110 to 108 PF, chips 1b of 108 to 106 PF, and chips 106 of
Separate them into chips 1c with ~104PF...chips 1j with 92~90PF.

【0008】また前記チップ1を組み込むベース板2は
,表面にチップ1を接着(ハンダ若しくは導電性接着剤
を用いる)する一対の電極膜21及び電極膜21と接続
してなる外部リード線22を設けると共に背面に調整用
電極膜23を設けたもので,特に調整用電極膜23の面
積の異なるベース板2a,2b……を形成しておく。 而して300PFの容量のコンデンサを製出せんとする
場合は,分別したチップ1a〜1jの間から例えば1b
(108〜106PF),1f(100〜98PF)1
j(94〜92PF)の三個を選択すると,これを並列
にベース板2に組み込むと容量は302〜296PFと
なる。そこで現実の容量を測定し,302PFに近い値
であるならば調整用電極膜23の面積の少ないベース板
を使用し,逆に296PFに近い値であったなら調整用
電極膜23の面積の大きいベース板を使用すると製出さ
れるコンデンサは300PFとなる。この様にしてコン
デンサチップ1b,1f,1jをベース板2に組み込ん
だ後,樹脂3でモールドして電子部品として供するもの
である。
The base plate 2 into which the chip 1 is installed has a pair of electrode films 21 on the surface of which the chip 1 is bonded (using solder or conductive adhesive), and an external lead wire 22 connected to the electrode film 21. In addition, an adjustment electrode film 23 is provided on the back surface, and in particular, base plates 2a, 2b, . . . having different areas of adjustment electrode films 23 are formed. If you want to manufacture a capacitor with a capacity of 300PF, for example, 1b from between the separated chips 1a to 1j.
(108~106PF), 1f (100~98PF)1
If three of them (94 to 92 PF) are selected and they are installed in parallel on the base plate 2, the capacity will be 302 to 296 PF. Therefore, measure the actual capacitance, and if the value is close to 302PF, use a base plate with a small area of the adjustment electrode film 23, and conversely, if the value is close to 296PF, use a base plate with a large area of the adjustment electrode film 23. If a base plate is used, the capacitor produced will be 300PF. After the capacitor chips 1b, 1f, 1j are assembled into the base plate 2 in this manner, they are molded with resin 3 and used as electronic components.

【0009】従ってコンデンサチップ1は大まかに形成
することができ,これを分別して使用することでより精
度の良いコンデンサ部品を得ることができると共に,コ
ンデンサチップ1は適宜な組み合わせによって無駄なく
使用され,更にベース板2の背面に形成した電極膜23
の面積の調整によって1PF単位での調整まで可能とな
ったものである。またコンデンサチップの並列接続とな
るため,共振尖鋭度Qが高くなり,本発明品を使用した
回路の感度が向上するものである。尚本発明は前記実施
例に限定されるものでなく,コンデンサチップは非積層
型でも良く,更には一つのコンデンサに組み込むチップ
の数,並びにチップの分別の範囲は任意に定めることが
できるものである。
[0009] Therefore, the capacitor chip 1 can be roughly formed, and by using it separately, more accurate capacitor parts can be obtained, and the capacitor chip 1 can be used without waste by appropriately combining it. Further, an electrode film 23 formed on the back surface of the base plate 2
By adjusting the area of , it is possible to make adjustments in units of 1 PF. Furthermore, since the capacitor chips are connected in parallel, the resonance sharpness Q is increased, and the sensitivity of the circuit using the product of the present invention is improved. It should be noted that the present invention is not limited to the above embodiments, and the capacitor chips may be of a non-stacked type, and furthermore, the number of chips to be incorporated into one capacitor and the range of sorting of chips can be arbitrarily determined. be.

【0010】0010

【発明の効果】本発明は以上のように製出しようとする
コンデンサの数分の一の容量を有するコンデンサチップ
を大まかに製出し,これを分別した後適宜組み合わせ,
更にはチップを組み込むベース板背面に電極膜を設けて
なるもので,コンデンサチップの製造に於いて特別な精
度を要求することなく,コンデンサ部品としては精度の
良い品質の高い製品を提供できたものである。
[Effects of the Invention] As described above, the present invention roughly produces capacitor chips having a capacity that is a fraction of that of the capacitor to be produced, and after separating them, combines them as appropriate.
In addition, an electrode film is provided on the back of the base plate into which the chip is installed, making it possible to provide high-quality products with good precision as capacitor parts without requiring special precision in manufacturing capacitor chips. It is.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】コンデンサチップの一部裁断した斜視図である
FIG. 1 is a partially cutaway perspective view of a capacitor chip.

【図2】コンデンサ部品の製造の説明図である。FIG. 2 is an explanatory diagram of manufacturing a capacitor component.

【図3】コンデンサ部品の樹脂モールト前の側面図であ
る。
FIG. 3 is a side view of the capacitor component before resin molding.

【図4】コンデンサ部品の外観図である。FIG. 4 is an external view of a capacitor component.

【符号の説明】[Explanation of symbols]

1,1a,1b……1j  コンデンサチップ2  ベ
ース板 21  電極膜 22  外部リード線 23  調整用電極膜 3  樹脂
1, 1a, 1b...1j Capacitor chip 2 Base plate 21 Electrode film 22 External lead wire 23 Adjustment electrode film 3 Resin

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】  外部リード線と接続する一対の電極膜
をベース板の表面に形成し,前記ベース板の電極膜間に
セラミックコンデンサチップを接着し,外部リード線を
突出せしめて他の全体を樹脂モールドしてなるセラミッ
クコンデンサに於いて,製出せんとするコンデンサ容量
の数分の一の容量のコンデンサチップを所定数電極膜間
に接続してなることを特徴とするセラミックコンデンサ
Claim 1: A pair of electrode films to be connected to external lead wires are formed on the surface of a base plate, a ceramic capacitor chip is bonded between the electrode films of the base plate, and the external lead wires are made to protrude, and the rest of the entire body is A ceramic capacitor formed by resin molding, characterized in that a predetermined number of capacitor chips having a capacity that is a fraction of the capacitance to be produced are connected between electrode films.
【請求項2】  請求項第1に於いて,ベース板背面に
コンデンサ容量微調整用の電極膜を形成したことを特徴
とするセラミックコンデンサ。
2. A ceramic capacitor according to claim 1, characterized in that an electrode film for fine adjustment of capacitor capacity is formed on the back surface of the base plate.
【請求項3】  外部リード線と接続する電極膜をベー
ス板の表面に形成し,前記ベース板の電極膜間にセラミ
ックコンデンサチップを接着し,外部リード線を突出せ
しめて他の全体を樹脂モールドしてなるセラミックコン
デンサに於いて,製出せんとするコンデンサ容量の数分
の一の容量でコンデンサチップを複数形成し,各チップ
の容量誤差を予め測定して分類しておき,分類したチツ
プを適宜組み合わせてベース板に装着し,所望の容量と
したことを特徴とするセラミックコンデンサの製造方法
3. An electrode film connected to an external lead wire is formed on the surface of the base plate, a ceramic capacitor chip is bonded between the electrode films of the base plate, the external lead wire is made to protrude, and the rest is molded with resin. In the ceramic capacitor formed by the above method, a plurality of capacitor chips are formed with a capacity that is a fraction of the capacitor capacity to be manufactured, the capacitance error of each chip is measured and classified in advance, and the classified chips are A method of manufacturing a ceramic capacitor, which is characterized in that it is assembled as appropriate and mounted on a base plate to obtain a desired capacitance.
【請求項4】請求項第3項に於いて,ベース板の背面に
調整用電極膜を形成すると共に,調整用電極膜の面積が
相違するベース板を複数形成し,所望の容量を得ること
のできるベース板を選択して使用することを特徴とする
セラミックコンデンサの製造方法。
4. According to claim 3, an adjustment electrode film is formed on the back surface of the base plate, and a plurality of base plates each having a different area of the adjustment electrode film are formed to obtain a desired capacitance. A method for manufacturing a ceramic capacitor, characterized by selecting and using a base plate capable of
JP6087791A 1991-02-06 1991-02-06 Ceramic capacitor and manufacturing method thereof Expired - Lifetime JPH0722070B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6087791A JPH0722070B2 (en) 1991-02-06 1991-02-06 Ceramic capacitor and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6087791A JPH0722070B2 (en) 1991-02-06 1991-02-06 Ceramic capacitor and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPH04255206A true JPH04255206A (en) 1992-09-10
JPH0722070B2 JPH0722070B2 (en) 1995-03-08

Family

ID=13155048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6087791A Expired - Lifetime JPH0722070B2 (en) 1991-02-06 1991-02-06 Ceramic capacitor and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPH0722070B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006013865A1 (en) * 2004-08-03 2006-02-09 Hitachi Metals, Ltd. Non-reciprocal circuit element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006013865A1 (en) * 2004-08-03 2006-02-09 Hitachi Metals, Ltd. Non-reciprocal circuit element
US7522013B2 (en) 2004-08-03 2009-04-21 Hitachi Metals, Ltd. Non-reciprocal circuit device
CN100555739C (en) 2004-08-03 2009-10-28 日立金属株式会社 Irreversible circuit element

Also Published As

Publication number Publication date
JPH0722070B2 (en) 1995-03-08

Similar Documents

Publication Publication Date Title
US5197170A (en) Method of producing an LC composite part and an LC network part
US6753218B2 (en) Ceramic chip capacitor of conventional volume and external form having increased capacitance from use of closely spaced interior conductive planes reliably connecting to positionally tolerant exterior pads through multiple redundant vias
US10453615B2 (en) Method for manufacturing multilayer ceramic electronic component
US7155816B2 (en) Method for producing a multilayer ceramic substrate
JP2003031435A (en) Laminated ceramic electronic component with multiple terminals
JPH10241991A (en) Laminated capacitor and its trimming method
JPH06267788A (en) Composite component
JP2001210544A (en) Chip multilayer ceramic capacitor
JP3264037B2 (en) Capacitor array
JP2000269074A (en) Multilayer ceramic capacitor and manufacture thereof
JP2742414B2 (en) Manufacturing method of multilayer ceramic electronic component
CN103515093A (en) Chip capacitor provided with internal interconnection structure and manufacturing method thereof
JPH0722070B2 (en) Ceramic capacitor and manufacturing method thereof
JP2946261B2 (en) Manufacturing method of laminated electronic components
JPH027483Y2 (en)
JP2993247B2 (en) Manufacturing method of multilayer ceramic capacitor
JP4023133B2 (en) Multilayer ceramic capacitor and capacity adjustment method thereof
JP2000196393A (en) Distributed constant noise filter and manufacture of the same
JP3248294B2 (en) Chip inductor and manufacturing method thereof
JP3324461B2 (en) Manufacturing method of multilayer ceramic capacitor array
JP3067496B2 (en) Pressure molding method of ceramic green sheet laminate
JPS63265413A (en) Manufacture of laminated ceramic capacitor
KR0143158B1 (en) Manufacturing method of chip type LC composite electronic component
JP4363102B2 (en) Manufacturing method of multilayer capacitor
JPH10241908A (en) Composite device and method of manufacturing the same