JPH0427775B2 - - Google Patents

Info

Publication number
JPH0427775B2
JPH0427775B2 JP3967283A JP3967283A JPH0427775B2 JP H0427775 B2 JPH0427775 B2 JP H0427775B2 JP 3967283 A JP3967283 A JP 3967283A JP 3967283 A JP3967283 A JP 3967283A JP H0427775 B2 JPH0427775 B2 JP H0427775B2
Authority
JP
Japan
Prior art keywords
phase
voltage
ground fault
detector
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3967283A
Other languages
Japanese (ja)
Other versions
JPS59165912A (en
Inventor
Mitsuaki Murata
Masahiko Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hikari Trading Co Ltd
Original Assignee
Hikari Trading Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hikari Trading Co Ltd filed Critical Hikari Trading Co Ltd
Priority to JP3967283A priority Critical patent/JPS59165912A/en
Publication of JPS59165912A publication Critical patent/JPS59165912A/en
Publication of JPH0427775B2 publication Critical patent/JPH0427775B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 発明の技術分野 本発明は非接地および高抵抗接地の多相一回線
送電線路の地絡を経済的な構成で検出することが
できる地絡検出器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a ground fault detector capable of detecting ground faults in ungrounded and high-resistance grounded multiphase single-line power transmission lines with an economical configuration.

従来の技術分野 三相一回線送電線路等の非接地及び高抵抗接地
の多相一回線送電線路の地絡事故を検出する為
に、従来は例えば第1図に示すように、R、S、
T相それぞれにコンデンサC1,C2,C3を接
続し、それらの中性点と大地との間にコンデイサ
C4を挿入し、コンデンサC4を並列に変成器T
1を接続し、変成器T1の二次側から出力される
電圧が零であるか否かによつて地絡事故を検出す
るようにしているが、次のような欠点があつた。
即ち、R、S、T相それぞれに耐圧の高い高価な
コンデンサC1〜C3を接続しなければならない
為、装置が高価になる欠点があると共に、各コン
デンサの静電容量の平衡を保つことが必要である
為、設置作業、管理等が面倒なものとなる欠点が
あつた。
BACKGROUND TECHNICAL FIELD In order to detect ground faults in ungrounded and high-resistance grounded polyphase single-line power transmission lines, such as three-phase single-line power transmission lines, conventionally, as shown in Fig. 1, R, S,
Connect capacitors C1, C2, and C3 to each of the T phases, insert a capacitor C4 between their neutral points and the ground, and connect the capacitor C4 in parallel to the transformer T.
1 is connected, and a ground fault is detected based on whether or not the voltage output from the secondary side of the transformer T1 is zero, but this method has the following drawbacks.
That is, since expensive capacitors C1 to C3 with high withstand voltages must be connected to each of the R, S, and T phases, the device becomes expensive, and it is necessary to maintain a balance between the capacitances of each capacitor. Therefore, there was a drawback that installation work, management, etc. were troublesome.

また、この他にも第2図に示すように、R、
S、T相それぞれに変成器T2〜T4の一次側の
一端を接続し、他端を接地し、各変成器T2〜T
4の二次側を直列に接続し、端子A1,A2間に
現われる電圧に基づいて地絡事故を検出するよう
にしたものも実施されているが、各相に変成器T
2〜T4を接続しなければならない為、装置が高
価になる欠点があつた。
In addition, as shown in Figure 2, R,
One end of the primary side of transformers T2 to T4 is connected to each of the S and T phases, and the other end is grounded.
A method has also been implemented in which the secondary sides of 4 are connected in series and ground faults are detected based on the voltage appearing between terminals A1 and A2, but each phase has a transformer T.
Since it is necessary to connect T2 to T4, there is a drawback that the device becomes expensive.

発明の目的 本発明は前述の如き欠点を改善したものであ
り、その目的は経済的な構成で、且つ確実に地絡
検事故を検出できるようにすることにある。
OBJECTS OF THE INVENTION The present invention is to improve the above-mentioned drawbacks, and its purpose is to have an economical configuration and to be able to reliably detect ground fault detection accidents.

本発明の構成は下記に示す通りである。即ち、
非接地及び高抵抗接地の多相一回線送電線路の地
絡を検出する地絡検出器に於いて、前記多相一回
線送電線路のうちの一相に接続された該相の相電
圧を検出する相電圧検出器からの検出、若しくは
設定された健全時の相電圧と、前記多相一回線送
電線路のうちの一相が地絡したときに、該相電圧
検出器から検出された地絡事故時の相電圧とを合
成してその差によつて零相電圧を得るようにした
ことを特徴とする地絡検出器、から構成されてい
る。以下実施例について詳細に説明する。
The structure of the present invention is as shown below. That is,
In a ground fault detector that detects ground faults in non-grounded and high-resistance grounded multi-phase single-line power transmission lines, detecting the phase voltage of the phase connected to one phase of the multi-phase single-line power transmission lines. The ground fault detected by the phase voltage detector when one phase of the multi-phase single-line power transmission line has a ground fault. The ground fault detector is characterized in that it combines phase voltages at the time of an accident and obtains a zero-sequence voltage from the difference. Examples will be described in detail below.

発明の実施例 第3図は本発明の一実施例のブロツク線図であ
り、1はコンデンサC5,C6、変成器T5から
成り、T相−大地間の電圧を検出する相電圧検出
器、2は合成回路、3はBBD(Bucket Brigade
Device)等から成る遅延回路、4は反転回路、
5は比較器、6は変流器、7は増幅器、8は位相
比較器、9はアンドゲートである。
Embodiment of the Invention FIG. 3 is a block diagram of an embodiment of the present invention, in which 1 is a phase voltage detector consisting of capacitors C5 and C6 and a transformer T5 and detects the voltage between the T phase and ground; 2 is a synthesis circuit, 3 is a BBD (Bucket Brigade)
4 is an inverting circuit,
5 is a comparator, 6 is a current transformer, 7 is an amplifier, 8 is a phase comparator, and 9 is an AND gate.

相電圧検出器1内の変成器T5の出力電圧は合
成回路2及び遅延回路3に加えられる。遅延回路
3は変成器T5の出力電圧を相電圧の周期tの整
数倍(N倍)、即ちtN秒遅延させて反転回路4に
加え、反転回路4は遅延回路3の出力電圧を反転
して合成回路2に加え、合成回路2は変成器T5
の出力電圧と反転回路4の出力電圧とを合成して
地絡電圧と大きさ及び位相の等しい電圧を出力す
る。従つて、地絡事故がない場合は、変成器T5
の出力電圧と反転回路4の出力電圧とは絶対値が
等しく、極性が反対のものとなるので、合成回路
2の出力電圧は零となり、また地絡事故が発生し
た場合は、変成器T5の出力電圧と反転回路4の
出力電圧とは大きさと位相が異なるものとなるの
で、合成回路2の出力電圧は地絡電圧に等しいも
のとなる。
The output voltage of transformer T5 in phase voltage detector 1 is applied to a combining circuit 2 and a delay circuit 3. The delay circuit 3 delays the output voltage of the transformer T5 by an integral multiple (N times) of the period t of the phase voltage, that is, tN seconds, and applies it to the inverting circuit 4, and the inverting circuit 4 inverts the output voltage of the delay circuit 3. In addition to combining circuit 2, combining circuit 2 includes transformer T5
and the output voltage of the inverting circuit 4 are combined to output a voltage having the same magnitude and phase as the ground fault voltage. Therefore, if there is no ground fault, transformer T5
Since the output voltage of the inverting circuit 4 and the output voltage of the inverting circuit 4 have the same absolute value and opposite polarity, the output voltage of the combining circuit 2 becomes zero, and if a ground fault occurs, the output voltage of the transformer T5 Since the output voltage and the output voltage of the inverting circuit 4 are different in magnitude and phase, the output voltage of the combining circuit 2 is equal to the ground fault voltage.

比較器5は予め設定されている閾値と地絡電圧
に対応した合成回路2の出力電圧とを比較し、合
成回路2の出力電圧の方が大となつた場合、地絡
事故が発生したと判断して、その出力信号aを
“1”とし、警報器を鳴動させ、保守者に地絡事
故が発生したことを知らせるものである。
The comparator 5 compares a preset threshold with the output voltage of the combining circuit 2 corresponding to the ground fault voltage, and if the output voltage of the combining circuit 2 is higher, it is determined that a ground fault has occurred. The system determines that a ground fault has occurred, sets the output signal a to "1", and sounds an alarm to notify the maintenance personnel that a ground fault has occurred.

また、位相比較器8は増幅器7を介して変流器
6から加えられる電流の位相と合成回路2の出力
電圧との位相とに基づいて、地絡事故が電源側、
負荷側の何れで発生したかを判断し、負荷側で発
生したと判断した場合、その出力信号bを“1”
とするものであり、信号bはアンドゲート9に加
えられる。従つて他方の入力端子に信号aが加え
られているアンドゲート9の出力信号cは地絡事
故が負荷側で起つた時に“1”となり、信号cが
“1”となることにより、遮断器を動作させる等
の処置を行なうものである。
Furthermore, the phase comparator 8 determines whether a ground fault is occurring on the power supply side or
Determine where the occurrence occurred on the load side, and if it is determined that the occurrence occurred on the load side, set the output signal b to “1”.
The signal b is applied to the AND gate 9. Therefore, the output signal c of the AND gate 9 to which the signal a is applied to the other input terminal becomes "1" when a ground fault occurs on the load side, and as the signal c becomes "1", the circuit breaker is activated. This is to take measures such as activating the system.

尚、本実施例に於いては相電圧検出器1として
コンデンサ形のものを示したが、これに限られる
のではなく、リアクトル形等の検出器を用いても
良いことは勿論である。また、本実施例に於いて
は反転回路4を介して遅延回路3の出力電圧を合
成回路2に加えるようにしたが、遅延回路3の遅
延時間をt/2(2N+1)とすれば反転回路4を
用いる必要はない。また、本実施例に於いてはT
相に相電圧検出器1を接続するようにしたが、
R、S相に接続するようにしても良いことは勿論
である。
Although a capacitor type detector is shown as the phase voltage detector 1 in this embodiment, the present invention is not limited to this, and it goes without saying that a reactor type detector or the like may also be used. Further, in this embodiment, the output voltage of the delay circuit 3 is applied to the combining circuit 2 via the inverting circuit 4, but if the delay time of the delay circuit 3 is t/2 (2N+1), then the inverting circuit There is no need to use 4. Furthermore, in this embodiment, T
I tried to connect phase voltage detector 1 to the phase, but
Of course, it may be connected to the R and S phases.

第4図は本発明の他の実施例を示す回路図であ
る。第3図の実施例においては、健全時の相電圧
を遅延回路でその出力電圧を反転しているのに対
し、第4図の実施例においては、R、S、T相が
全て健全である場合に変成器T5から出力される
電圧と大きさが等しく極性が反対な電圧を出力す
るように設定した補助電源を設けた点のみ相違す
る。16はこの補助電源である。
FIG. 4 is a circuit diagram showing another embodiment of the present invention. In the embodiment shown in Fig. 3, the output voltage of the normal phase voltage is inverted using a delay circuit, whereas in the embodiment shown in Fig. 4, the R, S, and T phases are all in normal state. The only difference is that an auxiliary power supply is provided which is set to output a voltage equal in magnitude and opposite in polarity to the voltage output from the transformer T5 in the case of the present invention. 16 is this auxiliary power source.

補助電源16は、T相とR相から第1の変圧器
PTを介してR相とT相間の線間電圧をとり、(相
電圧検出器1がR相に接続してある場合は、S相
とR相)これを第2の変圧器PT1で相を反転さ
せ、且つ位相調整用に設けた可変抵抗器VR2と
コンデンサC7の中の可変抵抗器VR2を調整し
てT、R相の線間電圧の位相を、T相と極性が反
対の相電圧位相に合わせて合成回路2に入力す
る。なお、R1,VR1は電圧レベル調整用の抵
抗器である。
The auxiliary power supply 16 connects the T phase and R phase to the first transformer.
The line voltage between the R phase and the T phase is taken through the PT (if the phase voltage detector 1 is connected to the R phase, the S phase and the R phase). By inverting and adjusting the variable resistor VR2 provided for phase adjustment and the variable resistor VR2 in the capacitor C7, the phase of the line voltage of the T and R phases is changed to the phase voltage phase whose polarity is opposite to that of the T phase. input to the synthesis circuit 2 according to the Note that R1 and VR1 are resistors for voltage level adjustment.

合成回路2には変成器T5の出力電圧と補助電
源16の出力電圧とが加えられる。補助電源16
の出力電圧は前述したように、各相R、S、Tが
健全である場合に変成器T5から出力される電圧
と大きさが等しく、極性が反対のものとしてある
から、地絡事故がない場合は合成回路2の出力電
圧は零となる。また、地絡事故が発生した場合
は、変成器T5の出力電圧と補助電源16の出力
電圧とは大きさが異なるものとなるので、合成回
路2の出力電圧は地絡電圧に対応したものとな
る。尚、本実施例に於いても第3図に示した実施
例と同様に位相比較器等を設け、地絡事故が負荷
側、電源側の何れで発生したかを検出するように
しても良いことは勿論である。
The output voltage of the transformer T5 and the output voltage of the auxiliary power supply 16 are applied to the combining circuit 2. Auxiliary power supply 16
As mentioned above, the output voltage is equal in magnitude to the voltage output from transformer T5 when each phase R, S, and T are healthy, and the polarity is opposite, so there is no ground fault. In this case, the output voltage of the combining circuit 2 becomes zero. Furthermore, if a ground fault occurs, the output voltage of the transformer T5 and the output voltage of the auxiliary power supply 16 will be different in magnitude, so the output voltage of the combining circuit 2 will correspond to the ground fault voltage. Become. Incidentally, in this embodiment as well, a phase comparator or the like may be provided as in the embodiment shown in FIG. 3 to detect whether a ground fault has occurred on the load side or the power supply side. Of course.

発明の効果 以上説明したように、本発明は非接地及び高抵
抗接地の多相一回線送電線路のうちの一相に接続
される相電圧検出器、遅延回路3或は補助電源1
6等から成り、多相一回線送電線路の健全時に於
ける前記相電圧検出器が接続された相の相電圧に
対応した電圧を出力する出力手段、合成回路2、
比較器5等から成り、相電圧検出器で検出した相
電圧と出力手段から出力された電圧とに基づいて
地絡を検出する検出手段を備えたものであり、一
相のみに相電圧検出器を接続すれば良いものであ
るから、従来例に比べて経済的な構成で地絡を検
出することができる利点がある。
Effects of the Invention As explained above, the present invention provides a phase voltage detector, a delay circuit 3, or an auxiliary power supply 1 connected to one phase of an ungrounded and high-resistance grounded multiphase single-line power transmission line.
an output means for outputting a voltage corresponding to the phase voltage of the phase to which the phase voltage detector is connected when the polyphase single-line power transmission line is healthy;
It consists of a comparator 5, etc., and is equipped with a detection means for detecting a ground fault based on the phase voltage detected by the phase voltage detector and the voltage output from the output means. Since it is only necessary to connect the ground faults, there is an advantage that ground faults can be detected with an economical configuration compared to the conventional example.

本発明は、非接地あるいは高抵抗接地の多相一
回線送電線路の零相電圧を検出する装置であり、
前記多相一回線送電線路のうちの一相に接続され
る相電圧検出器、遅延回路或いは補助電源等から
成り、従来の高圧用コンデンサ3回路分に比べ安
価であり、一相のみに接続すればよいものである
から従来例に比べ工事費等も経済的である。ま
た、各コンデンサの静電容量の平衡度を気にせず
ともよく、設置作業管理等が簡単である。
The present invention is a device for detecting zero-sequence voltage of an ungrounded or high-resistance grounded multiphase single-line power transmission line,
It consists of a phase voltage detector, a delay circuit, an auxiliary power supply, etc. connected to one phase of the multiphase single-line power transmission line, and is cheaper than three circuits of conventional high-voltage capacitors, and can be connected to only one phase. Construction costs are also economical compared to conventional examples. Further, there is no need to worry about the balance of capacitance of each capacitor, and installation work management is easy.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図はそれぞれ異なる従来例のブロ
ツク線図、第3図、第4図はそれぞれ異なる本発
明の実施例のブロツク線図である。 1は相電圧検出器、2は合成回路、3は遅延回
路、4は反転回路、5は比較器、16は補助電
源、6は変流器、7は増幅器、8は位相比較器、
9はアンドゲート、C1〜C6はコンデンサ、T
1〜T5は変成器である。
1 and 2 are block diagrams of different conventional examples, and FIGS. 3 and 4 are block diagrams of different embodiments of the present invention. 1 is a phase voltage detector, 2 is a combining circuit, 3 is a delay circuit, 4 is an inversion circuit, 5 is a comparator, 16 is an auxiliary power supply, 6 is a current transformer, 7 is an amplifier, 8 is a phase comparator,
9 is an AND gate, C1 to C6 are capacitors, T
1 to T5 are transformers.

Claims (1)

【特許請求の範囲】[Claims] 1 非接地及び高抵抗接地の多相一回線送電線路
の地絡を検出する地絡検出器に於いて、前記多相
一回線送電線路のうちの一相に接続された該相の
相電圧を検出する相電圧検出器からの検出、若し
くは設定された健全時の相電圧と、前記多相一回
線送電線路のうちの一相が地絡したときに、該相
電圧検出器から検出された地絡事故時の相電圧と
を合成してその差によつて零相電圧を得るように
したことを特徴とする地絡検出器。
1. In a ground fault detector that detects ground faults in ungrounded and high-resistance grounded multiphase single-line power transmission lines, the phase voltage of the phase connected to one of the multiphase single-line power transmission lines is detected. The detection from the phase voltage detector to be detected, or the set phase voltage in a healthy state, and the ground fault detected from the phase voltage detector when one phase of the multi-phase single-line power transmission line has a ground fault. A ground fault detector characterized in that a phase voltage at the time of a fault is synthesized and a zero-sequence voltage is obtained from the difference.
JP3967283A 1983-03-10 1983-03-10 Ground-fault detector Granted JPS59165912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3967283A JPS59165912A (en) 1983-03-10 1983-03-10 Ground-fault detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3967283A JPS59165912A (en) 1983-03-10 1983-03-10 Ground-fault detector

Publications (2)

Publication Number Publication Date
JPS59165912A JPS59165912A (en) 1984-09-19
JPH0427775B2 true JPH0427775B2 (en) 1992-05-12

Family

ID=12559582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3967283A Granted JPS59165912A (en) 1983-03-10 1983-03-10 Ground-fault detector

Country Status (1)

Country Link
JP (1) JPS59165912A (en)

Also Published As

Publication number Publication date
JPS59165912A (en) 1984-09-19

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