JPH04282904A - oscillation circuit - Google Patents

oscillation circuit

Info

Publication number
JPH04282904A
JPH04282904A JP3046612A JP4661291A JPH04282904A JP H04282904 A JPH04282904 A JP H04282904A JP 3046612 A JP3046612 A JP 3046612A JP 4661291 A JP4661291 A JP 4661291A JP H04282904 A JPH04282904 A JP H04282904A
Authority
JP
Japan
Prior art keywords
voltage
power supply
power consumption
oscillation circuit
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3046612A
Other languages
Japanese (ja)
Inventor
Tadashi Hayakawa
正 早川
Masakazu Urade
浦出 正和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3046612A priority Critical patent/JPH04282904A/en
Publication of JPH04282904A publication Critical patent/JPH04282904A/en
Pending legal-status Critical Current

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  • Power Sources (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PURPOSE:To slow down the operating clock speed and to reduce a voltage amplitude in the low power consumption mode of a microcomputer. CONSTITUTION:An operating power supply voltage of an inverting amplifier 6 oscillating a clock signal is applied to the amplifier 6 by selecting a voltage from a normal operating mode voltage application path 3 or a voltage from a low power consumption operating mode voltage application path 4 by using a switch circuit 5. The clock signal oscillating circuit for a microcomputer with less power consumption is realized.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、低消費電力状態下での
動作を要求されるマイクロコンピュータに利用可能な発
振回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit that can be used in microcomputers that are required to operate under low power consumption conditions.

【0002】0002

【従来の技術】近年、各種の電子機器にマイクロコンピ
ュータが組込まれて使用されることが多くなってきた。 特にこれらマイクロコンピュータの消費電力を少なくす
ることが要求されている。
2. Description of the Related Art In recent years, microcomputers have been increasingly incorporated into various electronic devices. In particular, it is required to reduce the power consumption of these microcomputers.

【0003】従来、マイクロコンピュータが低消費電力
状態したでの動作を要求される場合は、マイクロコンピ
ュータ回路に使用されるクロック信号発振回路として低
周波数動作のクロック信号を選択することのみで電力消
費の削減をはかるのが一般的であった。
Conventionally, when a microcomputer is required to operate in a low power consumption state, the power consumption can be reduced simply by selecting a clock signal operating at a low frequency as the clock signal oscillation circuit used in the microcomputer circuit. It was common to try to reduce the amount.

【0004】0004

【発明が解決しようとする課題】一般にマイクロコンピ
ュータの機能向上のためさらに電力消費を削減する必要
が課題として生じている。
SUMMARY OF THE INVENTION Generally speaking, there is a need to further reduce power consumption in order to improve the functionality of microcomputers.

【0005】本発明は前記課題を解決するもので、マイ
クロコンピュータ回路に使用されるクロック信号発振回
路での消費電力を低減する回路を提供することを目的と
している。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a circuit that reduces power consumption in a clock signal oscillation circuit used in a microcomputer circuit.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に本発明は、入力電源電圧を分圧する分圧手段と、前記
分圧手段により分圧された電圧と前記入力電源電圧とを
選択する選択手段と、前記選択手段により選択された電
圧を動作電源電圧として反転増幅し出力する増幅手段と
、前記増幅手段の出力電圧を入力に帰還するフィードバ
ック抵抗と、前記フィードバック抵抗の両端間に接続し
た発振子と、前記フィードバック抵抗の両端とグランド
間をAC接地するコンデンサとを装備してなるクロック
信号発振回路を構成するものである。
[Means for Solving the Problems] In order to achieve the above objects, the present invention provides voltage dividing means for dividing an input power supply voltage, and selecting the voltage divided by the voltage dividing means and the input power supply voltage. a selection means, an amplification means for inverting and amplifying the voltage selected by the selection means as an operating power supply voltage and outputting it, a feedback resistor for feeding back the output voltage of the amplification means to the input, and a feedback resistor connected between both ends of the feedback resistor. This constitutes a clock signal oscillation circuit that is equipped with an oscillator and a capacitor that connects both ends of the feedback resistor and ground to AC ground.

【0007】[0007]

【作用】本発明は前記した構成において、通常動作時に
は、通常動作モード電圧供給パスを通じて発振回路入力
電圧と等しい電圧が反転増幅回路の動作電圧として供給
される。低消費電力動作要求時には、動作電圧可変信号
によりアナログスイッチを切り替えて、低消費電力動作
モード電圧供給パスから発振回路入力電圧を電圧分割抵
抗で分圧した電圧を、反転増幅回路の動作電圧として供
給する。前記の操作により発振回路の反転増幅回路に供
給する動作電圧の選択機能を装備し、低消費電力使用時
に通常動作時よりも低電圧を発振回路の反転増幅回路の
動作電圧として供給可能となる。
According to the present invention, in the above structure, during normal operation, a voltage equal to the oscillation circuit input voltage is supplied as the operating voltage of the inverting amplifier circuit through the normal operation mode voltage supply path. When low power consumption operation is required, the analog switch is switched by the operating voltage variable signal, and the voltage obtained by dividing the oscillation circuit input voltage by the voltage dividing resistor from the low power consumption operation mode voltage supply path is supplied as the operating voltage of the inverting amplifier circuit. do. By the above operation, a function for selecting the operating voltage to be supplied to the inverting amplifier circuit of the oscillation circuit is provided, and a lower voltage can be supplied as the operating voltage of the inverting amplifier circuit of the oscillating circuit than during normal operation when using low power consumption.

【0008】[0008]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0009】図1に示すように、入力電源電圧を電圧分
割抵抗1を用いて2分割し、入力電源電圧そのものは電
圧供給パス3を通し、また電圧分割抵抗1の途中端子か
ら取りだした低電圧は、低電圧供給パス4を通して、そ
れぞれスイッチ回路5に加えられている。また上記スイ
ッチ回路5の動作は、端子2に外部から動作電圧選択信
号が加えられることによってスイッチ切換えず行われる
。つぎに、スイッチ回路5から加えられる外部電源電圧
は、反転増幅回路6に加えられる。反転増幅回路6の出
力電圧は、入力に帰還するフィードバック抵抗8と、上
記フィードバック抵抗8の両端間に接続した発振子7と
、上記フィードバック抵抗8の両端とグランド間をAC
接地するコンデンサ9,10とでクロック信号をつくる
発振回路を構成している。
As shown in FIG. 1, the input power supply voltage is divided into two using a voltage dividing resistor 1, and the input power supply voltage itself is passed through a voltage supply path 3, and a low voltage taken out from the intermediate terminal of the voltage dividing resistor 1 is are respectively applied to the switch circuit 5 through a low voltage supply path 4. Further, the operation of the switch circuit 5 is performed without changing the switch by applying an operating voltage selection signal to the terminal 2 from the outside. Next, the external power supply voltage applied from the switch circuit 5 is applied to the inverting amplifier circuit 6. The output voltage of the inverting amplifier circuit 6 is generated by a feedback resistor 8 that is fed back to the input, an oscillator 7 connected between both ends of the feedback resistor 8, and an AC voltage that is connected between both ends of the feedback resistor 8 and the ground.
The grounded capacitors 9 and 10 constitute an oscillation circuit that generates a clock signal.

【0010】以上のように構成された発振回路について
、図1を用いて動作を説明する。まず発振回路が通常動
作をする場合には、通常動作モード電圧供給パス3を通
じて発振回路入力電源電圧と等しい電圧がクロック信号
を発振する反転増幅回路6の動作電源電圧として供給さ
れる。つぎに、低消費電力動作が要求されるときには、
動作電圧選択信号が入力端子2に外部から加えられ、ス
イッチ回路5を切り替えて、低消費電力動作モード電圧
供給パス4から入力電源電圧を電圧分割抵抗1で分圧し
た電圧を、反転増幅回路6の動作電源電圧として供給す
る。
The operation of the oscillation circuit configured as described above will be explained with reference to FIG. First, when the oscillation circuit operates normally, a voltage equal to the oscillation circuit input power supply voltage is supplied through the normal operation mode voltage supply path 3 as the operating power supply voltage of the inverting amplifier circuit 6 that oscillates a clock signal. Next, when low power consumption operation is required,
An operating voltage selection signal is externally applied to the input terminal 2, switches the switch circuit 5, and transfers the voltage obtained by dividing the input power supply voltage by the voltage dividing resistor 1 from the low power consumption operating mode voltage supply path 4 to the inverting amplifier circuit 6. Supplied as the operating power supply voltage.

【0011】以上説明した操作により、クロック信号発
振回路を構成する反転増幅回路6に供給する動作電源電
圧を選択するための選択機能を装備し、低消費電力使用
時には通常動作時よりも低電圧の電源電圧を発振回路の
反転増幅回路6の動作電源電圧として供給できるように
した発振回路を実現できるものである。
Through the operations described above, a selection function for selecting the operating power supply voltage to be supplied to the inverting amplifier circuit 6 constituting the clock signal oscillation circuit is provided, and when using low power consumption, a lower voltage than during normal operation is provided. It is possible to realize an oscillation circuit in which the power supply voltage can be supplied as the operating power supply voltage of the inverting amplifier circuit 6 of the oscillation circuit.

【0012】0012

【発明の効果】以上の実施例から明らかなように本発明
の発振回路は、発振回路の入力電源電圧の分圧により低
電圧となった電圧を選択的に発振回路の動作電源電圧と
して供給し発振回路の動作電圧を降下することにより、
より一層の電力消費量の削減を可能とするものである。 発振クロック信号発生のため消費する電力は発振回路の
反転増幅回路に供給される動作電源電圧の自乗に比例す
るため、前記手段により低消費電力状態下での動作を要
求された場合には発振回路の動作電源電圧を降下して電
力消費を削減することができる優れたマイクロコンピュ
ータ用発振回路を実現できるものである。
[Effects of the Invention] As is clear from the above embodiments, the oscillation circuit of the present invention selectively supplies a low voltage by dividing the input power supply voltage of the oscillation circuit as the operating power supply voltage of the oscillation circuit. By lowering the operating voltage of the oscillator circuit,
This makes it possible to further reduce power consumption. Since the power consumed to generate the oscillation clock signal is proportional to the square of the operating power supply voltage supplied to the inverting amplifier circuit of the oscillation circuit, when the oscillation circuit is required to operate under a low power consumption state by the above means, the oscillation circuit This makes it possible to realize an excellent oscillation circuit for a microcomputer that can reduce power consumption by lowering the operating power supply voltage of the microcomputer.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例の回路図[Fig. 1] Circuit diagram of one embodiment of the present invention

【符号の説明】[Explanation of symbols]

1    電圧分割抵抗 2    動作電源電圧選択信号入力端子5    ス
イッチ回路 6    反転増幅回路 7    発振子 8    フィードバック抵抗 9    コンデンサ 10  コンデンサ
1 Voltage dividing resistor 2 Operating power supply voltage selection signal input terminal 5 Switch circuit 6 Inverting amplifier circuit 7 Oscillator 8 Feedback resistor 9 Capacitor 10 Capacitor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  入力電源電圧を分圧する分圧手段と、
前記分圧手段により分圧された電圧と前記入力電源電圧
とを選択する選択手段と、前記選択手段により選択され
た電圧を動作電源電圧として反転増幅し出力する増幅手
段と、前記増幅手段の出力電圧を入力に帰還するフィー
ドバック抵抗と、前記フィードバック抵抗の両端間に接
続した発振子と、前記フィードバック抵抗の両端とグラ
ンド間をAC接地するコンデンサとを装備してなる発振
回路。
[Claim 1] Voltage dividing means for dividing an input power supply voltage;
a selection means for selecting the voltage divided by the voltage dividing means and the input power supply voltage; an amplification means for inverting and amplifying the voltage selected by the selection means as an operating power supply voltage; and an output of the amplification means. An oscillation circuit equipped with a feedback resistor that feeds back a voltage to an input, an oscillator connected between both ends of the feedback resistor, and a capacitor that connects both ends of the feedback resistor and ground to AC ground.
JP3046612A 1991-03-12 1991-03-12 oscillation circuit Pending JPH04282904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3046612A JPH04282904A (en) 1991-03-12 1991-03-12 oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3046612A JPH04282904A (en) 1991-03-12 1991-03-12 oscillation circuit

Publications (1)

Publication Number Publication Date
JPH04282904A true JPH04282904A (en) 1992-10-08

Family

ID=12752127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3046612A Pending JPH04282904A (en) 1991-03-12 1991-03-12 oscillation circuit

Country Status (1)

Country Link
JP (1) JPH04282904A (en)

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