JPH0428349U - - Google Patents

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Publication number
JPH0428349U
JPH0428349U JP6824290U JP6824290U JPH0428349U JP H0428349 U JPH0428349 U JP H0428349U JP 6824290 U JP6824290 U JP 6824290U JP 6824290 U JP6824290 U JP 6824290U JP H0428349 U JPH0428349 U JP H0428349U
Authority
JP
Japan
Prior art keywords
information
cpu board
backboard
setting
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6824290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6824290U priority Critical patent/JPH0428349U/ja
Publication of JPH0428349U publication Critical patent/JPH0428349U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一実施例のバツクボードの部分図、第
2図aは上記バツクボードの側面図、第2図bは
一実施例のCPUボードの部分図、第3図aは従
来のCPUボードの部分図、第3図bは従来のバ
ツクボードの部分図、第3図cは上記従来のバツ
クボード上に従来のCPUボードを装着した状態
を示す図である。 1……バツクボード、2……コネクタ、3……
孔、4−1,4−2,4−3,〜……突起物、6
……CPUボード、7……IC、8……コネクタ
、9−1〜9−4……マイクロスイツチスイツチ
、10……ID設定IC。
FIG. 1 is a partial view of a backboard according to an embodiment, FIG. 2a is a side view of the backboard, FIG. 2b is a partial view of a CPU board according to an embodiment, and FIG. 3a is a portion of a conventional CPU board. FIG. 3B is a partial view of a conventional backboard, and FIG. 3C is a diagram showing a state in which a conventional CPU board is mounted on the conventional backboard. 1...Backboard, 2...Connector, 3...
Hole, 4-1, 4-2, 4-3, ~...Protrusion, 6
...CPU board, 7...IC, 8...connector, 9-1 to 9-4...micro switch, 10...ID setting IC.

Claims (1)

【実用新案登録請求の範囲】 バツクボードと、そのバツクボード上に装着さ
れるCPUボードとを有するシステムにおいて、 前記CPUボードに対応するID情報をバツク
ボード上に物理的に形成するID情報形成手段と
、該ID情報形成手段により物理的に形成された
ID情報を、前記CPUボード上において自動的
に検出するID情報検出手段と、該ID情報検出
手段により検出されたID情報に基づいて上記バ
ツクボード上に装着されたCPUボードのIDを
設定するID設定手段と、を有することを特徴と
するID自動設定装置。
[Claims for Utility Model Registration] A system having a backboard and a CPU board mounted on the backboard, comprising an ID information forming means for physically forming ID information corresponding to the CPU board on the backboard; ID information detecting means for automatically detecting the ID information physically formed by the ID information forming means on the CPU board; and mounting on the back board based on the ID information detected by the ID information detecting means. 1. An ID automatic setting device comprising: ID setting means for setting an ID of a CPU board.
JP6824290U 1990-06-27 1990-06-27 Pending JPH0428349U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6824290U JPH0428349U (en) 1990-06-27 1990-06-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6824290U JPH0428349U (en) 1990-06-27 1990-06-27

Publications (1)

Publication Number Publication Date
JPH0428349U true JPH0428349U (en) 1992-03-06

Family

ID=31602508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6824290U Pending JPH0428349U (en) 1990-06-27 1990-06-27

Country Status (1)

Country Link
JP (1) JPH0428349U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02112047A (en) * 1988-10-21 1990-04-24 Nec Corp Unit address setting system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02112047A (en) * 1988-10-21 1990-04-24 Nec Corp Unit address setting system

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