JPH04288712A - Differential amplifier - Google Patents

Abstract

PURPOSE:To offer the differential amplifier, which can adjust the level of an output cross point, concerning the differential amplifier frequently used for an input circuit or the like, especially, concerning the differential amplifier of a high operation margin. CONSTITUTION:To differential amplifier is equipped with transistors T1 and T2, first constant current source C1 connected to the transistors and load Z, second constant current sources C2 and C3 are provided with current capacity less than the half current capacity of the first constant current source C1, transistors T3 and T4 are provided while being parallelly connected to the respective second constant current sources C2 and C3, a level generating circuit Vlg is provided to supply a prescribed voltage level to the control terminals of the transistors T3 and T4, third constant current source impedances C4 and C5 are provided to be serially connected to the respective transistors T3 and T4, and clamp circuits D1 and D2 are provided to be parallelly connected to the respective second constant current sources C2 and C3.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier often used in input circuits and the like, and more particularly to a differential amplifier with a high operating margin. Depending on the circuit that comes next to the differential amplifier, there are circuits in which it is better to have a low cross point of the output of the differential amplifier, and circuits in which it is better to have a high cross point in the output of the differential amplifier. Therefore, it is necessary to adjust the cross point of the output of the differential amplifier.

0002

[Prior Art] In a conventional differential amplifier, FIG.
), since the load circuit consisted only of current sources C1 and C2 and clamp circuits D1 and D2,
It was not possible to adjust the potential at the output cross point where the outputs OUT1 and OUT2 have the same potential as shown in FIG. 5(b).

0003

[Problem to be Solved by the Invention] Therefore, there is a problem in that an appropriate output cross point level cannot be generated, and the circuits that follow it malfunction. The present invention
It is an object of the present invention to provide a differential amplifier that can adjust the output cross point level.

0004

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. In order to solve the above problems, the present invention provides a differential amplifier comprising two transistors T1 and T2, a first constant current source C1 connected to the transistors, and a load Z. is the first constant current source C
control of second constant current sources C2 and C3 having a current capacity of less than half of 1; transistors T3 and T4 connected in parallel to the second constant current sources C2 and C3, respectively; and control of the transistors T3 and T4. A predetermined voltage level V at the terminal
inv, and the transistor T3, which has a current capacity smaller than the difference in current capacity between the first constant current source C1 and the second constant current sources C2 and C3.
and a third constant current source C4 connected in series to each of T4.
and C5, and clamp circuits D1 and D2 connected in parallel to the second constant current sources C2 and C3, respectively.

[0005]

[Operation] In the present invention, as shown in FIG.
When the same voltage level is output to T1 and OUT2 (ie, when the output voltage is at the output cross point level), a half current of the first constant current source C1 flows through each load circuit Z1 and Z2, respectively. However, since the second constant current sources C2 and C3 of the load circuits Z1 and Z2 are set to less than half the current capacity, the series circuit of the third constant current sources C4 and C5 and the transistors T1 and T2 does not have enough current. It will make up for the amount.

Therefore, by adjusting the voltage Vinv generated by the level generating circuit Vlg, an appropriate output cross point level can be generated. Further, in the present invention,
When an "L" level voltage is input to one of the input terminals IN1 and IN2, and an "H" level voltage is input to the other, the entire current of the constant current source C1 flows through either one of the load circuits Z1 or Z2. However, the constant current source C of the load circuit Z1 or Z2
2 or C3, a series circuit of third constant current sources C4 and C5, and transistors T1 and T2 (C4 and T1 or C5 and T
In 2), since the current capacity is insufficient, the "L" level is determined by the clamp circuits D1 and D2.

[0007]

Embodiments Next, embodiments of the present invention will be described based on the drawings. First Embodiment FIG. 2 shows a circuit diagram of a differential amplifier according to a first embodiment of the present invention. The differential amplifier of this example has two E
(enhancement type)-FET Q1 and Q2, D (duppression type)-FET Q3 whose gate and source are connected as a first constant current source connected to two E-FETs Q1 and Q2, and a load. ing.

[0008] The load is connected in parallel to D-FETQ4 and Q5, each of which is connected between the gate and source as a second constant current source having a current capacity less than half that of D-FETQ3. A series circuit of diode D3 and D-FETQ10 as a level generation circuit Vlg that supplies a predetermined voltage level Vinv to the gate terminals of E-FETQ6 and Q7, and a series circuit of E-FETQ6 and Q7, respectively. D- connected between the gate and source as the third constant current source connected
It is composed of FETs Q8 and Q9.

In this embodiment, the level generation circuit Vlg
is composed of a series circuit of a diode D3 and a D-FET Q10, and a voltage divided by the resistances of these two elements is supplied as a voltage level Vinv. Furthermore, the E-FETs Q6 and Q7 can be considered to have diodes connected equivalently between their sources and gates, and these diodes and the diode D3 constitute clamp circuits D1 and D2.

Therefore, in addition to the original effects of the present invention, this embodiment has the advantage that the area is small, the capacity is small, and the speed does not decrease. Second Embodiment FIG. 3 shows a circuit diagram of a differential amplifier according to a second embodiment of the present invention. In the differential amplifier of this embodiment, the level generation circuit Vlg is composed of a series circuit of a diode D4, a D-FETQ13, and an E-FETQ14, and the voltage obtained by dividing these resistances is determined by the voltage level Vinv of the E-FETQ.
6 and Q7. Moreover, the first constant current source is D-F
ETQ3, the second constant current source is D-FETQ4 and Q5, and the third constant current source is D-FETQ8 and Q9, each of which has its gate and source connected. Furthermore,
E-FETs Q11 and Q12 are used as the clamp circuit.

Third Embodiment FIG. 4 shows a circuit diagram of a differential amplifier according to a third embodiment of the present invention. In the differential amplifier of this embodiment, in the second embodiment, the level generation circuit Vlg is connected to the D-FETQ13.
The circuit configuration has been changed to one consisting of a series circuit of E-FETQ14 and D-FETQ15.

0012

[Effects of the Invention] As explained above, according to the present invention,
By adjusting the voltage level generated by the level generation circuit, it is possible to generate an appropriate output cross point level, and it is possible to provide a differential amplifier that can improve the operating margin.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention.

FIG. 2 is a circuit diagram of a differential amplifier according to a first embodiment of the present invention.

FIG. 3 is a circuit diagram of a differential amplifier according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram of a differential amplifier according to a third embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional differential amplifier (FIG. 5(a)) and a diagram (FIG. 5(b)) illustrating the time course of input and output voltages.

[Explanation of symbols]

T1 to T4...Transistor C1...First constant current source C2, C3...Second constant current source C4, C5...Third constant current source D1, D2...Clamp circuit Vlg...Level generation circuit IN1, IN2...Input terminal OUT1, OUT2...Output terminal Z, Z1, Z2...Load circuit Q1, Q2, Q6, Q7, Q11, Q12, Q14...Enhancement type FET

Claims (3)

[Claims] [Claim 1] Two transistors (T1 and T2)
and a first constant current source (C
1) and a load (Z), the load (Z) is configured to apply a predetermined voltage level (Vinv) to the control terminals of transistors (T3 and T4) and the transistors (T3 and T4). ) supplying a level generation circuit (Vl
g) and impedances (C4 and C5) connected in series with each of the transistors (T3 and T4). [Claim 2] Two transistors (T1 and T2)
and a first constant current source (C
1) and a load (Z), wherein the load (Z) is a second constant current source (C1) having a current capacity less than half of the first constant current source (C1). C2 and C3), transistors (T3 and T4) connected in parallel to each of the second constant current sources, and the transistor (T3
and T4) at a predetermined voltage level (Vinv) at the control terminal.
1. A differential amplifier comprising: a level generating circuit (Vlg) that supplies a voltage; and impedances (C4 and C5) connected in series to each of the transistors (T3 and T4). [Claim 3] Two transistors (T1 and T2)
and a first constant current source (C
1) and a load (Z), wherein the load (Z) is a second constant current source (C1) having a current capacity less than half of the first constant current source (C1). C2 and C3), transistors (T3 and T4) connected in parallel to each of the second constant current sources (C2 and C3), and a predetermined voltage level (Vinv ) Level generation circuit (Vlg) that supplies
, the first constant current source (C1) and the second constant current source (C
a third constant current source (C4 and C5) connected in series to each of the transistors (T3 and T4) and having a current capacity smaller than the difference in current capacity of the transistors (T3 and T4);
A differential amplifier comprising a clamp circuit (D1 and D2) connected in parallel to each constant current source (C2 and C3).