JPH04291968A - Photodiode - Google Patents

Abstract

PURPOSE:To provide a photodiode in which a reverse leakage current is remarkably reduced in a polycrystalline silicon diode to be used as a photodetector and a reverse dark current is reduced in a diode of an amorphous silicon. CONSTITUTION:A p-channel is induced at an i-type region side of a p-i junction or one side electrode - i-type junction to be formed in a p-i-n type structure and an n-channel is induced at the i-type region side of an n-i junction or the other side electrode - i-type junction by applying a suitable voltage to a gate electrode, and a boundary of the junction is formed in the i-type region having a low capture center density. Thus, a tunnel current or a Poole-Frenkel current passing through the capture center can be reduced, and a reverse leakage current of a diode can be remarkably reduced. Therefore, a polycrystalline silicon may be initially used as a photodiode, and an S/N ratio for a light having a low incident power is improved in an amorphous silicon.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is applicable to optical communication, optical information processing,
The present invention relates to light receiving elements in the field of image sensors and the like.

0002

2. Description of the Related Art Conventionally, there is a light receiving element using amorphous silicon. This amorphous silicon pin diode is widely used as an image sensor element in devices such as facsimiles and copiers because it can be formed on a glass substrate at low cost and over a large area.

0003

[Problems to be Solved by the Invention] In addition, in conventional polycrystalline silicon p-n or pin junctions, segregation of impurities at the grain boundaries of the bonding interface and concentration of defects at the bonding interface are causes. Therefore, there was a serious drawback that the density of trapped centers near the bonding interface became significantly high. For this reason, the literature (e.g. Journal of the
Electrochemical Society,
vol. 125. No. 10 1648 of 1978
When a reverse electric field is applied to a polycrystalline silicon p-n or pin diode, as shown in
Tunnel current and P pass through the capture center near the junction interface.
Oole-Frenkel current or the like flows, and the reverse leakage current of the diode increases. Therefore, even when the diode is irradiated with light, the photocurrent is buried in leakage current, making it impossible to use it as a light-receiving element.

[0004] Furthermore, p-
In the case of an i-n diode, if the pin diode is formed only from amorphous silicon, the dark current in the reverse direction is not necessarily low, and the detection limit is light with an incident power of about 1 μW/cm2. Ta. An additional 0.1 μW
In order to fabricate a highly sensitive photodiode capable of detecting light on the order of 1/cm2, the p or n layer may be formed of amorphous SiC, or a thin layer of amorphous SiN may be placed between the ohmic electrode and the p or n layer. It was necessary to reduce the dark current in the reverse direction through improvements such as sandwiching.

An object of the present invention is to provide a polycrystalline silicon diode that can be used as a light receiving element by significantly reducing reverse leakage current, and to provide a photodiode that can be used as a light-receiving element with a reduced reverse dark current in an amorphous silicon diode. It is about providing.

[0006]

[Means for Solving the Problems] In order to achieve this object, the first invention includes a p-type semiconductor thin film and an n-type semiconductor thin film on both sides of an undoped i-type semiconductor thin film formed on a substrate. In the planar p-i-n structure arranged respectively, the p-i junction formed within the p-i-n structure and the n-
This photodiode is characterized in that a required gate electrode is provided on one or both of the i-junctions, above or below, or above and below, via an insulating film. The second invention is a structure in which electrodes are disposed at both ends of an undoped i-type semiconductor thin film formed on a substrate, and one of the junctions between the electrode and the undoped i-type semiconductor thin film. Alternatively, the photodiode is characterized in that required gate electrodes are provided on both sides, above or below, or above and below, with an insulating film interposed therebetween. The third invention is a planar pin structure in which a p-type semiconductor thin film and an n-type semiconductor thin film are arranged on both sides of an undoped i-type semiconductor thin film formed on a substrate. An insulating film having a negative fixed charge in the film is provided above or below the p-i junction formed in the i-n structure, and further formed in the planar p-i-n structure. This photodiode is characterized in that an insulating film having a positive fixed charge is provided above or below, or above and below, the n-i junction. A fourth aspect of the present invention is a structure in which electrodes are disposed at both ends of an undoped i-type semiconductor thin film formed on a substrate, wherein the electrodes are placed above or below a junction between one of the electrodes and the i-type semiconductor thin film, or An insulating film having a negative fixed charge in the film is provided above and below, and an insulating film having a positive fixed charge in the film is provided above or below the junction between the other electrode and the i-type semiconductor, or above and below the junction of the other electrode and the i-type semiconductor. This is a photodiode characterized by being provided with.

[0007]

[Operation] By applying an appropriate voltage to this gate electrode, p-i
A p-channel on the i-region side of the junction or one electrode-i-type junction, and an n-channel on the i-region side of the n-i junction or the other electrode-i-type junction. can be induced, and the junction interface can be formed in the i-region where the density of trapping centers is low. This makes it possible to reduce the tunnel current, Poole-Frenkel current, etc. that pass through the capture center, and the reverse leakage current of the diode is significantly reduced. For this reason, polycrystalline silicon can be used as a photodiode for the first time, and amorphous silicon improves the S/N ratio for light with low incident power.

[0008]

Embodiment 1 In Embodiment 1 to Embodiment 4, embodiments using polycrystalline silicon will be described below. Figure 1 shows
1 is a cross-sectional view of a photodiode according to a first embodiment of the present invention. For example, a non-doped i-type polycrystalline silicon thin film 2 with a thickness of about 30 nm is formed on a glass substrate 1, and a boron-doped p-type polycrystalline silicon region 3 and a phosphorus-doped n-type polycrystalline silicon region 3 are formed on both sides by, for example, ion implantation. A crystalline silicon region 4 was provided. Thereon, a SiO2 insulating film 5 with a thickness of about 100 nm is formed by sputtering, and then a first gate electrode 6 is formed on the p-i junction 17 using aluminum, and a first gate electrode 6 is formed on the p-i junction 17 using aluminum. A second gate electrode 7 was provided thereon. Furthermore, an ohmic electrode 8 to the p-type region 3 and an ohmic electrode 9 to the n-type region 4 were provided.

In general, p formed by ion implantation
At the -i and n-i junction interfaces, there are far more trapped centers than in the polycrystalline silicon film due to residual defects caused by ion implantation and segregation of impurities. For this reason, when a reverse bias is applied to the junction, leakage current in the reverse direction becomes extremely large due to tunnel current, Poole-Frenkel current, etc. through the capture center at the interface. The situation is the same when a junction is formed not only by ion implantation but also by depositing a p-type or n-type polycrystalline silicon film. When the voltage-current characteristics of the photodiode of this embodiment having the structure shown in FIG. 1 were measured without applying voltage to the first gate electrode 6 and the second gate electrode 7, the results were as shown in FIG. 2(a). As shown in , the leakage current in the reverse direction was extremely large.

When a negative voltage is applied to the first gate electrode 6 and a positive voltage is applied to the second gate electrode 7 in the structure of FIG. 1, as shown in FIG. A p-channel 10 in the crystalline silicon layer 2 is connected to the second gate electrode 7
An n-channel 11 is formed in the i-type polycrystalline silicon layer 2 below. As a result, p-i junction 17 and n-i
The interface of junction 18 moves from a location with many trapped centers to i-type polycrystalline silicon with fewer trapped centers. In this state, when we measured the voltage-current characteristics of the diode, we found that Figure 2
As shown in (b), the reverse leakage current was significantly reduced and normal diode characteristics were obtained. Further, from the insulating film 5 side or the glass substrate 1 side shown in FIG. 1 or 3, i
When the type polycrystalline silicon layer 2 was irradiated with light, the result was that
), it was possible to observe the photocurrent, and compared to the current in the dark, a sufficient on-off ratio was achieved under reverse bias.

Note that in this embodiment, the first gate electrode 6
Although the second gate electrode 7 is formed on the polycrystalline silicon layer 2 with the insulating film 5 in between, it may also be formed under the polycrystalline silicon layer 2. Alternatively, one of the first gate electrode 6 and the second gate electrode 7 may be formed on top and the other on bottom. In addition, the first gate electrode 6 and the second
It is possible to reduce the reverse leakage current to some extent even if only one of the gate electrodes 7 is provided.

Furthermore, in this embodiment, the first gate electrode 6
A four-terminal operation was performed in which voltages were applied separately to the second gate electrode 7, the ohmic electrode 8 to the p-type region 3, and the ohmic electrode 9 to the n-type region 4, but depending on the operating voltage, interconnecting the first gate electrode 6 and the ohmic electrode 8 to the p-type region 3, and interconnecting the second gate electrode 7 and the ohmic electrode 9 to the n-type region (4);
Two-terminal operation is also possible.

[0013]

[Embodiment 2] FIG. 4 shows a second embodiment of the present invention. The difference from FIG. 1 is that a third gate electrode having the same potential as the first gate electrode 6 is provided below the i-type polycrystalline silicon layer 2 under the first gate electrode 6 with an SiO2 insulating film 12 in between. 13,
Furthermore, a fourth gate electrode 14 having the same potential as the second gate electrode 7 is provided under the i-type polycrystalline silicon layer 2 under the second gate electrode 7 with an SiO2 insulating film 12 in between. be. Since the p channel 10 and the n channel 11 are formed from both the upper and lower sides of the i-type polycrystalline silicon layer 2, the i-type polycrystalline silicon layer 2 can be made thicker than in the first embodiment. That is, since the light absorption layer can be made thicker, there is an advantage that a larger photocurrent can be obtained than in the first embodiment.

[0014]

Embodiment 3 FIG. 5 shows a third embodiment of the present invention. The difference from the first embodiment is that instead of providing the first gate electrode, a negative fixed electrode is provided in the film, so that the p-channel 1 By having a positive fixed electrode in the film instead of providing the insulating film 15 and the second gate electrode, which can induce This is because an insulating film 16 capable of inducing an n-channel is provided. Although it is difficult to control the interface between the insulating film and the i-type polycrystalline silicon depending on the type of the insulating film and the formation conditions, it has the advantage of simplifying the device structure.

[0015]

Embodiment 4 FIG. 6 shows a fourth embodiment of the present invention. The difference from the first embodiment is that instead of arranging p-type and n-type polycrystalline silicon on both sides of the i-type polycrystalline silicon layer 2, i
This is because ohmic electrodes 8 to the p-type region and ohmic electrodes 9 to the n-type region are directly formed on both sides of the type polycrystalline silicon layer 2. This has the advantage of simplifying the device structure and device manufacturing process.

In the structure shown in FIG. 6, when a negative voltage is applied to the first gate electrode 6 and a positive voltage is applied to the second gate electrode 7, as shown in FIG. A p-channel 10 is formed in the polycrystalline silicon layer 2, and an n-channel 11 is formed in the i-type polycrystalline silicon layer 2 under the second gate electrode 7.
was formed, resulting in a pin structure, and could be operated in the same manner as in the first embodiment.

In this embodiment as well, the first gate electrode 6
In addition, the second gate electrode 7 may be formed under the polycrystalline silicon layer 2 with an insulating film in between, or one of the first and second gate electrodes may be formed on top and the other on bottom. Good too. Moreover, even if both the first gate electrode and the second gate electrode are not provided, it is possible to reduce the reverse leakage current to some extent by using only one of them. Furthermore, depending on the operating voltage, the first gate electrode 6 and the ohmic electrode 8 to the p-type region may be interconnected and the second gate electrode 7
It is also possible to interconnect the ohmic electrode 9 to the n-type region to achieve two-terminal operation.

Similarly to the third embodiment, in the fourth embodiment shown in FIG. 6, instead of providing the first gate electrode, an insulating film 15 having negative fixed charges therein is also used. Instead of providing the second gate electrode, an insulating film 16 having a positive fixed charge therein may be provided. Example 5 in this case is shown in FIG.

Although polycrystalline silicon has been described above in Examples 1 to 4, the same effect of reducing the reverse dark current of the diode can be obtained even if polycrystalline silicon is replaced with amorphous silicon. When we fabricated a diode with the structure shown in Figure 1 in which polycrystalline silicon was replaced with amorphous silicon and measured its characteristics, we found that the reverse dark current was two orders of magnitude lower than that of the conventional pin diode. Power is 0.1μW/cm2
It is now possible to receive the following lights. Also, instead of polycrystalline silicon or amorphous silicon, amorphous Ge
, polycrystalline Ge, amorphous SiGe, polycrystalline SiGe
, amorphous SiC, and polycrystalline SiC may also be used.

[0020]

[Effects of the Invention] As explained above, according to the present invention, p
-i and n-i junction interfaces are captured by i with low center density
By forming it within the region, it became possible to reduce the tunnel current or Poole-Frenkel current passing through the trapping center. For this reason, polycrystalline silicon, which could not be used as a photodiode,
The reverse leakage current of the diode has been significantly reduced, making it possible to use it as a photodiode. In addition, in amorphous silicon, the reverse leakage current of the diode is significantly reduced compared to the conventional one, and the S/N of the photodiode with respect to light with low incident power is dramatically improved.

[Brief explanation of the drawing]

FIG. 1 is a sectional view for explaining a first embodiment of the present invention.

[Figure 2] (a) shows the current-voltage characteristics of a conventional diode,
(b) shows the current-voltage characteristics of the diode of the present invention in the dark and when irradiated with light.

FIG. 3 is a sectional view for explaining the operation of the first embodiment of the present invention.

FIG. 4 is a sectional view for explaining a second embodiment of the present invention.

FIG. 5 is a sectional view for explaining a third embodiment of the present invention.

FIG. 6 is a sectional view for explaining a fourth embodiment of the present invention.

FIG. 7 is a cross-sectional view for explaining the operation of the fourth embodiment of the present invention.

FIG. 8 is a cross-sectional view for explaining the operation of the fifth embodiment of the present invention.

[Explanation of symbols]

1 Glass substrate 2 I-type polycrystalline silicon thin film 3 P-type polycrystalline silicon region (p-type region) 4 N-type polycrystalline silicon region (n-type region) 5 SiO2 insulating film 6 First gate electrode 7 Second gate electrode 8 Ohmic electrode to p-type region 9 Ohmic electrode to n-type region 10 p channel 11 n channel 12 SiO2 insulating film 13 third gate electrode 14 fourth gate electrode 15 insulating film having negative fixed charges in the film 16 Insulating film having positive fixed charges in the film 17 p-i junction 18 n-i junction

Claims (6)

[Claims] 1. In a planar pin structure in which a p-type semiconductor thin film and an n-type semiconductor thin film are disposed on both sides of an undoped i-type semiconductor thin film formed on a substrate, the p- The p-i junction formed within the i-n structure and the n
-i A photodiode characterized in that a required gate electrode is provided on one or both of the junctions, above or below, or above and below, with an insulating film interposed therebetween. 2. In a structure in which electrodes are arranged at both ends of an undoped i-type semiconductor thin film formed on a substrate, one of the junctions between the electrode and the undoped i-type semiconductor thin film. or both, above or below;
Alternatively, a photodiode characterized in that required gate electrodes are provided above and below with an insulating film interposed therebetween. 3. A p-type semiconductor thin film and an n-type semiconductor thin film are formed on both sides of an undoped i-type semiconductor thin film formed on a substrate.
In a planar pin structure with a type semiconductor thin film,
An insulating film having a negative fixed charge in the film is provided above or below, or above and below, the p-i junction formed in the planar p-i-n structure, and further A photodiode characterized in that an insulating film having a positive fixed charge is provided above or below, or above and below, an n-i junction formed in an n-structure. 4. In a structure in which electrodes are arranged at both ends of an undoped i-type semiconductor thin film formed on a substrate, the electrodes are placed above or below the junction between one of the electrodes and the i-type semiconductor thin film, or An insulating film having a negative fixed charge in the film is provided above and below, and above or below the junction between the other electrode and the i-type semiconductor, or above and below,
A photodiode comprising an insulating film having a positive fixed charge in the film. 5. The photodiode according to claim 1, wherein a polycrystalline silicon thin film is used as the semiconductor. 6. The photodiode according to claim 1, wherein an amorphous silicon thin film is used as the semiconductor.