JPH0431333B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a synchronous count pulse generation method, in particular, a count pulse generation method for displacement detection using a plurality of analog length detection signals output from a detector and having different phases. Concerning a method of outputting pulses.

[Prior Art] Various displacement detection techniques have been known in the past for measuring the length of objects to be measured using detectors such as linear scales or rotary encoders. Widely used in small digital calipers, digital micrometers, and other applications.

This type of displacement detection technology is known as an asynchronous type and a synchronous type, but the asynchronous type displacement detection technology tends to cause counting errors due to variations in the width of the count pulse. There is a problem in that as the functionality of the entire device becomes more sophisticated, it becomes extremely difficult to adjust the timing of the entire circuit.

For this reason, the synchronous type is widely used as this type of displacement detection technology today, and this synchronous displacement measurement technology can adjust the timing of the entire circuit based on the reference clock.
The operation becomes stable and accurate displacement detection becomes possible.

However, with conventional displacement detection technology, when a linear scale or rotary encoder (hereinafter referred to as scale) is moved at high speed, the frequency of the detection signal output from the detector becomes extremely high, and the fluctuation rate of the detection signal is affected by the reference clock. could not follow suit. Therefore, in such a case, there is a drawback that the count pulses are not output in accurate correspondence with the amount of displacement of the scale, etc., resulting in measurement errors.

In particular, with manually operated displacement detection devices,
Since operators frequently move scales and the like at high speeds, the aforementioned detection errors are likely to occur, and effective countermeasures have been desired.

FIG. 9 shows a count pulse generation circuit formed using the conventional synchronous displacement detection technique, and FIG. 10 shows its timing chart.

As is well known, in a displacement detection device, a sine wave and a cosine wave having a phase difference of 90 degrees from each other are output from the detector as analog length detection signals, and these sine waves and cosine waves are processed by a predetermined A/D conversion. The signals are converted into digital signals φ _a and φ _b through the converter and input to the count pulse generation circuit.

This count pulse generating circuit processes the detection signals φ _a and φ _b in synchronization with the reference clock CP1 and outputs an up count pulse 500a or a down count pulse 500b. Note that a clock signal for synchronizing the entire circuit is used as the reference clock CP1.

That is, this count pulse generation circuit outputs a pulse signal from element N5 or N7 in synchronization with the rise of the first output reference clock CP1 after the detection signals φ _a and φ _b switch to H level. . At the same time as this pulse signal is output, an up count pulse 500a or a down count pulse 500a is generated in synchronization with the rising edge of the pulse signal.
It is formed to output 0b.

Therefore, when a scale or the like is moved slowly, the signals φ _a and φ _b are output from the detector with a sufficient temporal phase shift, as shown in section 100 in FIG. The pulse 500 will be output accurately in accordance with the amount of displacement of the scale.

[Problems to be Solved by the Invention] However, in such a conventional device, when a scale or the like is moved at high speed, the signals φ _a and φ _b are output from the reference clock CP1, as shown in section 200 in FIG. The pulses are sequentially output at time intervals shorter than the period, and the output pulses from elements N5 and N7 end up being in the same phase. As a result, an output error occurs in which only one count pulse is output when two count pulses should normally be output, resulting in a measurement error.

In particular, when a scale or the like is moved at extremely high speed, the signals φ _a and φ _b output from the detector fluctuate multiple times within one output cycle of the reference clock CP1. In this case, a plurality of count pulses should originally be output within one cycle period, but with conventional count pulse generation techniques, only one count pulse can be output. There was a problem that the measurement error became even larger.

Purpose of the Invention The present invention was made in view of such conventional problems, and its purpose is to detect displacement even when a scale or the like is moved at high speed and a high frequency detection signal is output from the detector. An object of the present invention is to provide a synchronous count pulse generation method that can reliably output count pulses for measurement.

[Means and effects for solving the problems] FIG. 1 shows a flowchart of a method for creating a synchronous count pulse according to the present invention.

In the present invention, when a plurality of analog length detection signals having different phases are output from the detector, a reference code is created in synchronization with the reference clock.

In this reference code creation step, a predetermined digital combination signal is created based on the analog length detection signal, and each time the reference clock is output, code data specified by this digital combination signal is output as a reference code. .

Further, in addition to creating this reference code, in the present invention, a reference code is created.

In this reference code creation step, each time the reference clock is output, the reference code one clock previous is output as the reference code. At this time, if it is detected how many steps the output standard code is shifted from the reference code in light of the code data string sequentially output within one cycle period of the detection signal, this detected shift number is the same as the displacement. It represents quantity.

Therefore, in the present invention, the standard code and reference code are used to output count pulses as follows.

That is, in the count pulse output step of the present invention, first the standard code and the reference code are compared, and if they do not match, it is determined whether or not they match. Then, each time the output clock set to a predetermined short clock period is output until the two match, the reference code is cycled one step at a time according to the code data string sequentially output within one cycle period of the detection signal. Count pulses are output while shifting to .

By doing so, each time the reference clock is output, a number of count pulses corresponding to the shift amount of the reference code can be reliably output, and various displacement measurements can be performed accurately.

In particular, according to the present invention, even when a scale or the like is moved at high speed and a high-frequency analog length detection signal is output from the detector, the number of count pulses corresponding to the amount of displacement can be output. It becomes possible to reliably output and perform accurate displacement detection.

[Example] Next, a preferred example of the present invention will be described based on the drawings.

Displacement Detection Device FIG. 2 shows a preferred embodiment of the displacement detection device used in the present invention, and FIG. 3 shows a timing chart for each part of the circuit.

In the apparatus of the embodiment, when the scale or the like moves, the detector 10 outputs a sine wave φ _a and a cosine wave φ _b as analog length detection signals having different phases.

Each of these detection signals φ _a and φ _b has two phases/
The signals are input to the four-phase conversion circuit 12, where operations are performed on φ _c and φ _d based on the following equation, and a total of four phases of detection signals φ _a , φ _b , φ _c , and φ _d are output.

φ _c = φ _a + φ _b φ _d = φ _b −φ _b In FIG. 2, such four-phase signals φ _a , φ _c , φ _b ,
φ _c is shown, and from the same figure, each of these signals φ _a ,
It is understood that φ _c , φ _b , and φ _d are output as signals whose phases differ by π/4, respectively.

Then, the signal processing circuit 14 processes the signals φ _a , φ _c , φ _b , φ _d inputted in this way according to a predetermined count pulse creation method, and calculates signals corresponding to the amount of displacement of the scale, etc. Number of up count pulses 500a or down count pulses 500
Output b.

Count Pulse Creation Method FIG. 4 shows a process diagram of the count pulse creation method of the embodiment.

(B) Creation of reference code First, when the 4-phase analog length detection signals φ _a , φ _b , φ _c , φ _d are output from the 2-phase/4-phase conversion circuit 12, a reference code is created using each of these signals. Code creation takes place.

In the present invention, the input detection signals φ _a ,
Digital combination signal 10 based on φ _b , φ _c , φ _d
0, and each time the reference clock CP1 is output, the code data 200 specified by this digital combination signal 100 is generated as the reference code 3.
It is output as 00.

In the embodiment, this reference code creation step is performed in the order of a digital combination signal creation step, a data conversion step, and a reference code output step.

First, in the digital combination signal creation step, the detection signals φ _a , φ _b , φ _c , φ _d output from the 2-phase/4-phase conversion circuit 12 are compared with a predetermined threshold level, As shown, a digital combination signal 100 consisting of a combination of four pulses A, B, C, and D is created. Here, since each of the pulse signals A, C, B, and D has a different phase by π/4, the digital combination signal 100 of the embodiment is expressed in hexadecimal notation during one cycle in which the phase θ changes from 0 to 2π. So 1, 3,
The contents change sequentially in the order of 7, F, B, C, 8, and 0.

In the present invention, it is possible to use such a digital combination signal 100 as it is as code data, but in order to simplify data signal processing, this 4-bit digital combination signal 100 can be further converted into data. In the conversion process, it is converted into 3-bit code data 200.

That is, in the data conversion process of the embodiment, the digital combination signal 100 displayed as 4-bit content is expressed as 0, 1, 2, 3...7 in octal notation.
It is converted and output into 8-bit code data 200 expressed as .

FIG. 6 shows the digital combination signal 100
and the code data 200. As is clear from the figure, during one cycle in which the phase θ of the detection signals φ _a and φ b changes from 0 to 2π, the phase θ of the detection signals φ a and φ _b changes from 0 to 2π at the time of up counting. ,1,2
...Code data is output sequentially according to the order of 7 (forward direction), and at the time of count pulse, 7, 6,
Code data is sequentially output in the order of 5...0 (in the reverse direction).

In the standard code output process,
Code data 200 output in this way
is sampled and held every time the reference clock CP1 is output, and this is output as the reference code 300. Note that this reference clock CP
1, a clock signal for synchronizing the entire circuit is used.

In this way, in this embodiment, signal processing is performed in the order of digital combination signal creation step, data conversion step, and reference code output step.
The reference code 300 is output every time the reference clock CP1 is output.

Note that in the present invention, input data (for example, φ _a ,
φ _b , φ _c , φ _d or digital combination signal 100)
By creating the digital combination signal 100 and the code data 200 while sample-holding, it is also possible to create the reference code 300. In this case, the code data output through the data conversion process becomes the reference code 300 as it is.

(b) Creation of reference code Furthermore, in the present invention, the reference code 400 is created simultaneously with the creation of such a reference code 300.

In this reference code creation step, each time the reference clock CP1 is output, the reference code one clock previous is output as the reference code 400.

Therefore, by comparing the standard code 300 and reference code 400 output in this way against the code data string shown in FIG.
It can be detected as the number of shifts. Therefore, it is understood that if the number of count pulses corresponding to the number of shifts of the reference code 300 is outputted in synchronization with the reference clock CP1, the displacement of the scale etc. can be accurately measured.

(c) Output of count pulses Therefore, in the present invention, in the count pulse output step, the standard code 300 and the reference code 400 are compared to determine whether or not the two codes match.

If the two do not match, the output clock CP is set to a predetermined short clock period.
Each time 2 is output, a count pulse is output while cyclically shifting the reference code 400 one step at a time according to the code data string shown in FIG. And standard code 3
When 00 and reference code 400 match,
Stop outputting count pulses.

By doing this, the reference clock
Each time CP1 is output, it is possible to accurately output the number of count pulses corresponding to the number of shifts between the standard code 300 and the reference code 400.

FIG. 5 shows a specific signal processing step of this count pulse output step, and in the embodiment, this count pulse output step includes a comparison step, a count operation discrimination step, a count pulse creation step, and a reference code shift step. including.

In the comparison process, the reference clock
Every time CP1 is output, the standard code 300 and the reference code 400 are compared, and if they do not match, it is determined that the standard code 300 has shifted with respect to the previous standard code.

Further, in conjunction with such a comparison operation, in the counting operation determination step, it is determined whether the scale or the like is moving in an up-counting direction or a down-counting direction.

In the count pulse generation step, a count pulse of 500 is output every time the output clock CP2, which is set to a predetermined short clock cycle, is output, provided that a mismatch is determined in the comparison step. There is.

Here, this count pulse 500
If the scale etc. is moving in the up count direction, the up count pulse 50
If the scale or the like is moving in the down-counting direction, it is output as a down-count pulse 500b.

The reference code shift process of the embodiment is as follows:
According to the code data string shown in FIG. 6, when the up count pulse 500a is output, the reference code 400 is cyclically shifted one step at a time in the forward direction, and when the down count pulse 500b is output, the reference code 400 is cyclically shifted one step at a time in the forward direction. cyclically shifts reference code 400 in the opposite direction one step at a time.

Therefore, the reference code 300 output when the reference clock is output is different from the reference code 400.
For example, assuming that there is a shift in the up-count direction by 2 steps, the reference code 400 is shifted by 1 step in the up-count direction according to the code data string every time the up-count pulse 500a is output. become. And up count pulse 50
When two 0a are output, the standard code 30
0 and the reference code 400 match, and the output of the count pulse 500a is stopped.

As explained above, according to the method of the embodiment,
Every time the reference clock CP1 is output, the code data 200 at the time of this clock output is compared with the code data one clock previous, and it is determined how many steps the two have shifted in the up-count direction or down-count direction. . Then, the number of up count pulses 5 corresponding to this number of shifts is
00a or down count pulse 500b is output. For this reason, moving scales etc. at high speed,
Even if the detector 10 outputs high-frequency detection signals φ _a and φ _b , it is possible to reliably output the number of up-count pulses 500a or down-count pulses 500b corresponding to the amount of displacement. .

Therefore, by counting the count pulses 500a or 500b output in this way, the amount of displacement of the scale etc. can be accurately measured.
For example, display the value on a display, or
It becomes possible to accurately feedback control machines, etc.

Count Pulse Creation Operation Next, a specific count pulse creation operation performed according to the method of this embodiment will be described using an example in which a scale or the like is moved in the up-count operation direction.

(a) When the scale or the like moves at low speed As described above, the frequencies of the detection signals φ _a and φ _b output from the detector 10 are approximately proportional to the moving speed of the scale or the like.

Therefore, when the scale or the like is moved slowly, the frequencies of the detection signals φ _a and φ _b are low, and the generated code data 200 is based on the reference clock CP.
It changes at a time interval that is sufficiently longer than one output cycle.

FIG. 7 shows the standard code 300 to be created.
shows an example of a timing chart when the scale etc. is moved slowly in this way, and the reference clock CP1 is output.
At each point in time t00, t10, t20, t30, . . ., it changes as 4, 4, 5, 5, . . . , respectively. Therefore, when this change in the reference code 300 is compared with the code data string shown in FIG. 6, it can be seen that the change is made by shifting the reference code one step at a time in the forward direction. .

For example, if we focus on the time point t10 when the reference clock CP1 is output, the reference code 300 and the reference code 400 output at that time are both "4", and since they match, the up count pulse 500
a is never output.

However, at time t20 when the next reference clock CP1 is output, the reference code 300 becomes "5" in response to the displacement of the scale, etc.
Both codes 300 and 400 are in a mismatched state. In this case, the up count pulse 500a is output at timing t21 when the output clock CP2 is output for the first time, and this causes the reference code 400 to be incremented by one step in the forward direction according to the code data string shown in FIG. shift.

As a result, the reference code 400 becomes "5" and matches the value of the reference code 300, so the output of the up count pulse 500a is stopped at that point.

In this way, according to the method of this example,
If the scale etc. is moved slowly,
Standard code 300 is 1 for reference code 400
One up count pulse 500a is output for each step shift.

Therefore, every time the phase θ of the detection signals φ _a and φ _b output from the detector 10 changes by one cycle between 0 and 2π, eight count pulses 500a are reliably output. It becomes possible to accurately measure the amount of displacement of a scale, etc.

(b) When a scale or the like moves at high speed On the other hand, when a scale or the like moves at a high speed, the detector 10 outputs high frequency detection signals φ _a ,
φ _b is output and the code data 20 created
0 changes at relatively short time intervals compared to the output cycle of the reference clock CP1.

FIG. 8 shows an example of a timing chart in such a case, and in such a case, the code data 200 changes multiple times while the reference clock CP1 is output. becomes.

Therefore, the reference code 300 output in synchronization with the reference clock CP1 is t00, t20, t30,
At each time point of t40..., 4, 7, 3,
Shift across multiple steps as in 5.7.

In such a case, it is impossible to perform an accurate measurement by comparing the standard code 300 and the reference code 400 and simply outputting one count pulse if they do not match, but in the present invention, Standard code 30 as follows:
It outputs count pulses corresponding to the number of shifts of 0, making accurate measurement possible.

For example, t10 when the reference clock CP1 is output
Focusing on the point in time, at this point, "7" is output as the reference code 300, and "4" is output as the reference code 400.

Therefore, it is understood that at the time t10, the reference code 300 has been shifted forward by three steps with respect to the previously output reference code.

In this case, the up count pulse 500a is output at each timing t11, t12, and t13 when the output clock CP2 is output, and each time the up count pulse is output, the reference code 400 is converted into the code data string shown in FIG. Therefore, the numbers are shifted one step at a time in the forward direction in the order of "5", "6", and "7".

By shifting the reference code 400 in this way, the count pulse 500a will be 3 in total.
The output will be stopped when the output is completed.

Similarly, at time t20 when the next reference clock CP1 is output, "3", which is shifted by 4 steps from the previous reference code, is output as the reference code 300.
Four up count pulses 500a are output so that 0 and reference code 400 match.

In this way, according to the invention, each time the reference clock CP1 is output, the reference code 30
The number of up-count pulses 500a corresponding to the number of zero shifts can be reliably output.

Therefore, according to the present invention, even when the scale or the like is moved at high speed and the high frequency detection signals φ _a and φ _b are output from the detector 10, the phase θ of the detection signals φ _a and φ _b is It is possible to reliably output eight count pulses while the value changes from 0 to 2π in one cycle, and to accurately measure the amount of displacement.

In this embodiment, the case where the up count pulse 500a is outputted has been explained as an example, but the down count pulse 500b can also be outputted in the same way, and in this case, the down count pulse 500b can be outputted. Each time the reference code 400 is output, the reference code 400 may be cyclically shifted one step at a time in the opposite direction according to the code data string.

Other Embodiments In the above embodiments, the case where a sine wave and a cosine wave are outputted from the detector 10 as an analog length detection signal has been described as an example, but the present invention is not limited to this, and can be applied to other types of detection signals. Needless to say, the present invention is also applicable when using an analog length detection signal.

Further, in the above embodiment, the case where the digital combination signal 100 is further converted into code data 200 and outputted has been explained as an example, but the present invention is not limited to this, and the digital combination signal 100 itself can be used as code data. is also possible.

Furthermore, in this embodiment, the case where the detection signals φ _a and φ _b outputted from the detector are converted into two-phase/four-phase conversion is explained as an example, but the present invention is not limited to this. φ _a and φ _b may be converted directly into a digital combination signal, or in addition to this, 8-phase, 16-phase, etc. polyphase signals may be created secondarily from the detection signals φ _a and φ _b , and these signals may be converted into digital combination signals. It is also possible to create a digital combination signal from the signals.

[Effects of the Invention] As explained above, according to the present invention, even when a scale or the like is moved at high speed and a high-frequency displacement detection signal is output from the detector, a count corresponding to the amount of displacement can be calculated. It becomes possible to reliably output pulses and perform accurate displacement measurements.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing a count pulse generation method according to the present invention, FIG. 2 is a block diagram showing a preferred embodiment of a displacement detection device used in the present invention, and FIG. 3 is a code executed in this embodiment. A timing chart of the data creation operation, Figures 4 and 5 are process diagrams of the count pulse creation procedure performed in this embodiment, and Figure 6 is the correspondence between the digital combination signal and code data used in this embodiment. FIG. 7 and FIG. 8 are timing chart diagrams showing the count pulse creation procedure. FIG. 9 is an explanatory diagram of a conventional count pulse creation circuit. FIG. 10 is a timing chart of the circuit shown in FIG. 9. It is a diagram. 10...Detector, 12...2-phase/4-phase conversion circuit, 14...Signal processing circuit, _φa , _φb , _φc , _φd ...
...Analog length detection signal, 100...Digital combination signal, 200...Code data, 300...
Standard code, 400...Reference code, 500a,
500b...Count pulse, CP1...Reference clock, CP2...Output clock.

Claims (1)

[Claims] 1. A synchronous type that outputs count pulses for displacement detection by signal processing a plurality of analog length detection signals with different phases output from a detector in synchronization with a predetermined reference clock. In the count pulse generation method, a predetermined digital combination signal is created based on the analog length detection signal, and each time a reference clock is output, code data specified by the digital combination signal is output as a reference code. A reference code creation process that outputs the reference code one clock before each time the reference clock is output as a reference code; A reference code creation process that compares the reference code with the reference code and performs a predetermined process until the two match. Each time an output clock set to a short clock cycle is output, a count pulse is output while cyclically shifting the reference code one step at a time according to the code data string sequentially output within one cycle cycle of the detection signal. 1. A count pulse generation method comprising: a pulse output step; and outputting a count pulse corresponding to a displacement amount regardless of the frequency of an analog length detection signal of a detector. 2. In the method according to claim 1, the reference code creation step includes: a combination signal creation step of processing the analog length detection signal to create a predetermined digital combination signal; and converting the digital combination signal into predetermined code data. 1. A count pulse generation method comprising: a conversion step of converting and outputting code data as a reference code each time a reference clock is output; and an output step of outputting code data as a reference code each time a reference clock is output.