JPH04314094A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To attain a liquid crystal display device capable of displaying video signals outputted from various video sources independently of the presence of a dot clock output, the difference of dot clock frequency, etc. CONSTITUTION:The liquid crystal display device is provided with a phase comparator 12, a voltage controlling oscillator 13 for inputting a phase difference voltage obtained from the comparator 12 and a frequency divider 14 for dividing the frequency of an output from the oscillator 13 and constituted so as to input a horizontally synchronizing signal H corresponding to an inputted video signal and the output of the frequency divider 14 to the phase comparator 12 and obtain a dot clock Dd for controlling the timing of liquid crystal display operation as the output of the oscillator 13.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device.

0002

[Background Art] In recent years, display devices using liquid crystal panels have been widely used, and in particular, they have been used as small television monitor devices and monitor devices for laptop computer systems, taking advantage of their ability to be made thinner. It is effectively used as

By the way, image display using this liquid crystal display device requires a dot clock for controlling the drive timing of each liquid crystal pixel, but this dot clock is based on the NTS
In the case of a C television monitor device, it is sufficient to generate a clock with a fixed predetermined frequency, and in the case of a computer system, the dot clock corresponding to the liquid crystal display device is usually input directly from the computer side, and this The liquid crystal pixels are driven and controlled based on this.

0004

[Problems to be Solved by the Invention] However, since the methods for obtaining dot clocks are different in each liquid crystal display device, conventional liquid crystal display devices are dedicated display devices for a certain video source, and naturally A liquid crystal display device for a television monitor cannot be used as a monitor device for a computer system, and even if it is a liquid crystal display device for a computer system, images from a computer system with a different dot clock for image display cannot be used. There is a problem in that the display cannot be displayed, and the effective use of one liquid crystal display device is hindered.

[0005]

[Means for Solving the Problems] The present invention has been made in view of the above problems, and consists of a phase comparator, a voltage controlled oscillator to which a phase difference voltage obtained from the phase comparator is input, Equipped with a frequency divider that divides the output of the voltage controlled oscillator, the horizontal synchronization signal corresponding to the input video signal and the output of the frequency divider are input to the phase comparator and used as the output of the voltage controlled oscillator to determine the LCD display operation timing. The present invention provides a liquid crystal display device configured to obtain a dot clock for controlling the dot clock.

[0006]

[Operation] By adopting a configuration that generates a dot clock synchronized with the video signal based on the horizontal synchronization signal applied to the input video signal, it is possible to generate a Display will not become impossible.

[0007]

[Embodiment] Fig. 1 shows a liquid crystal drive circuit system of an embodiment of the liquid crystal display device of the present invention, in which video signals supplied from various computer systems in the form of RGB signals as well as video signals supplied from an ordinary NTSC television tuner are shown. This is an example of a configuration in which video can be displayed in response to a composite video signal supplied from a computer.

1 is an input terminal to which a composite video signal from, for example, a television tuner is supplied; 2a, 2;
b indicates an input terminal connected to, for example, a computer system and supplied with an RGB video signal, a vertical synchronization signal V, and a horizontal synchronization signal H.

The composite video signal input from the input terminal 1 is supplied to a color demodulation circuit system 3 and demodulated into RGB signals, and is also supplied to a sync separation circuit 4 where a vertical sync signal V and a horizontal sync signal H are extracted. be done. In the color demodulation circuit system 3, for example, the R signal, B signal, and G signal are demodulated by Y/C separation, color difference signal demodulation, and matrix circuit processing, and amplified as drive signals, and the T1 of each switch circuit 5a is
Supplied to the terminal. In addition, the T2 terminal of the switch circuit 5a receives the R signal, B signal, and G signal input from the input terminal 2a.
signals are provided respectively.

Furthermore, the vertical synchronization signal V from the synchronization separation circuit 4 is supplied to the T1 terminal of the switch circuit 5b, and the horizontal synchronization signal H from the synchronization separation circuit 4 is supplied to the T1 terminal of the switch circuit 5c.
1 is supplied to the terminal. And switch circuit 5b
, 5c are supplied with a vertical synchronizing signal V and a horizontal synchronizing signal H from the input terminal 2b, respectively.

T in switch circuits 5a, 5b, 5c
The switching operations of the T1 terminal and the T2 terminal are controlled in conjunction with each other by a control circuit (not shown). That is, when displaying the video signal from the input terminal 1, the T1 terminal is selected, and when the video signal from the input terminals 2a and 2b is displayed, the T1 terminal is selected. T when displaying
2 terminal is selected.

Further, 6 is a polarity inversion circuit, 7 is a timing controller, 8 is a video buffer, 9 is a signal line driver, 10 is a gate line driver, 11 is a liquid crystal panel, and drive signals output from the switch circuit 5a; That is, the R signal, B signal, and G signal are supplied to a polarity reversing circuit 6, and a predetermined polarity switching circuit supplied from a timing controller 7, in order to prevent deterioration of the liquid crystal material due to long-term application of DC voltage to the liquid crystal panel. The polarity is reversed based on the timing signal. The signal is then input to a signal line driver 9 via a video buffer 8.

The signal line driver 9 and the gate line driver 10 apply pixel electrode voltages, that is, signals, to the liquid crystal panel 11 in which signal lines and gate lines are arranged in a matrix as shown in FIG. 2, for example, according to control signals from the timing controller 7. voltage and horizontal scanning voltage.

That is, a horizontal scanning voltage is sequentially applied to the gate lines G1 to Gm to turn on the active element T (TFT: thin film transistor) of each pixel for one horizontal period, and signals are transmitted from the signal lines S1 to Sn. A voltage is applied to drive the liquid crystal LC in each pixel. Note that the pixel electrode voltage is held by the capacitor C until the next signal voltage is input again in the next field or frame.

In this way, each pixel of the liquid crystal panel 11 is driven, and a liquid crystal display is performed by controlling the transmittance of transmitted light from a backlight (not shown) on a pixel-by-pixel basis.In this embodiment, the timing controller 7 The control signal supplied to the signal line driver 9 and gate line driver 10 is generated from the horizontal synchronization signal along with the vertical synchronization signal V and horizontal synchronization signal H supplied to the timing controller 7 via the switch circuits 5b and 5c. It is formed based on the supplied dot clock Cd.

12 is a phase comparator, 13 is a voltage controlled oscillator, and 14 is a circuit 1 that divides the output of the voltage controlled oscillator 13 by 1/N.
/N frequency divider, and the phase comparator 12 includes a switch circuit 5.
The horizontal synchronizing signal H from c is input, and the 1/N frequency divider 14
The phase is compared with the output signal of the output signal, and a phase difference voltage is output. Then, the voltage controlled oscillator 13 outputs an oscillation frequency controlled based on the supplied phase difference voltage. In other words, by appropriately setting N in the 1/N frequency divider 14, in this embodiment, when the so-called PLL loop is locked, the dot clock synchronized with the horizontal synchronization signal H is output from the voltage controlled oscillator 13. Cd can be obtained.

In order to generate the dot clock Cd from the horizontal synchronization signal in the input video signal, a phase comparator 12, a voltage controlled oscillator 13, and a 1/N frequency divider 14 are used.
By providing, for example, there is no need to provide a fixed dot clock generator for the NTSC video signal or a dot clock input means from the computer system. Therefore, the display operation will not be disabled due to a difference in the dot clock Cd in the video source, and even if there are two computer systems with different dot clocks Cd, the input video signals from these computer systems will be alternated. This makes it possible to realize a liquid crystal display device in which the video source can be selected. It is also useful as a so-called multimedia monitor device. By the way, by setting a large variable range of the voltage controlled oscillator 13, it is also possible to generate different dot clocks Cd.

In the present invention, the configuration of the liquid crystal drive circuit system is not limited, and any configuration may be used as long as the drive timing control signal is formed by a dot clock generated from a horizontal synchronization signal. But that's fine. For example, it can be adopted in a monochrome liquid crystal display device, a liquid crystal projector using one or more liquid crystal panels, and the like. Of course, the liquid crystal panel is not limited to the TFT active matrix type as shown in FIG.

In the above embodiment, the input video signal can be a composite video signal from a television tuner and an RGB video signal from a computer system, but it goes without saying that various other input video signals can be considered.

[0020]

Effects of the Invention As explained above, the liquid crystal display device of the present invention generates a dot clock from the horizontal synchronization signal related to the input video signal. It is possible to display video signals from various video sources regardless of differences, and there is an effect that a general-purpose monitor device using a liquid crystal display can be realized.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a liquid crystal display device of the present invention.

FIG. 2 is an explanatory diagram of a liquid crystal panel of this embodiment.

[Explanation of symbols]

7 Timing controller 9 Signal line driver 10 Gate line driver 11 LCD panel 12 Phase comparator 13 Voltage controlled oscillator 14 1/N frequency divider

Claims (1)

[Claims] Claim 1: A phase comparator, a voltage controlled oscillator to which the phase difference voltage obtained from the phase comparator is input, and a frequency divider for frequency dividing the output of the voltage controlled oscillator. A liquid crystal display characterized in that the corresponding horizontal synchronization signal and the output of the frequency divider are input to the phase comparator to obtain a dot clock for controlling the liquid crystal display operation timing as an output of the voltage controlled oscillator. Device.