JPH04314353A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent slit-shaped void traversing the whole cross section of a metal wiring from being produced by constructing an electrode wiring with a multilayered film comprising a plurality of thin films of the same material quality. CONSTITUTION:An insulating film 2 is formed on a surface of a silicon substrate 1, on which film 2 a first wiring aluminum film 31 is formed with evaporation or sputtering. At this time, the first aluminum film 31 forms a specific grain structure. Then, the structure is exposed to air by breaking a vacuum, and thereafter a second aluminum film 32 is again formed by evaporation or sputtering. The second aluminum film 32 likewise forms a specific grain structure. Further, patterning is performed to form a double-layered electrode wiring, and thereafter it is constructed as a cover insulating film 4 to form a plasma nitride film.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device (hereinafter referred to as an IC), and more particularly to the structure of electrode wiring.

0002

2. Description of the Related Art Conventional IC electrode wiring is as shown in FIGS. 5 and 6. That is, an insulating film 2 is formed on the surface of a silicon substrate 1, an aluminum film 3 for wiring is formed thereon, and patterned to form an electrode wiring. After that, a cover insulating film 4 as a protective film is formed. usually,
The insulating film 2 is a silicon thermal oxide film, the wiring metal is aluminum, and the protective film is a plasma nitride film. In addition, although the wiring shown in the diagram is only one layer, the insulating film 4
After opening a through hole in the substrate, a second wiring is formed and patterned, and a protective film is further formed to obtain an IC with a two-layer wiring pattern.

0003

[Problems to be Solved by the Invention] In this conventional electrode wiring, the cover insulating film or the insulating film between the first and second layer wiring has internal stress, and this stress causes the metal film for wiring to Tension is applied.

On the other hand, an aluminum film for wiring is formed on the surface of a wafer by vapor deposition or sputtering, and has a localized single-crystal grain boundary structure due to the temperature history during and after the film is formed. In such a state, so-called stress migration becomes a problem. In other words, the tension applied to the aluminum film is alleviated by the generation of voids at the grain boundary interface, but if these voids cross the entire cross section of the interconnect in the form of a slit, the interconnect will be electrically disconnected. Otherwise, the IC will fail.

In particular, when grain boundaries 5 (FIG. 7) exist that cross the entire cross section of the interconnect, slit-like voids 6 (FIG. 8) that easily cause wire breakage are likely to occur.

[0006]

SUMMARY OF THE INVENTION In the semiconductor integrated circuit device of the present invention, the electrode wiring is composed of a multilayer film composed of a plurality of thin films made of the same material.

[0007]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings.

One embodiment is manufactured as follows with reference to FIGS. 1 and 2.

An insulating film 2 is formed on the surface of a silicon substrate 1, and a first aluminum film 31 (for example, about 0.5 μm thick) for wiring is formed on the insulating film 2 by vapor deposition or sputtering. At this point, the first aluminum film 31 forms a unique grain boundary structure. Next, after the vacuum is broken and exposed to air, a second aluminum film 32 is formed again by vapor deposition or sputtering. The second aluminum film 32 also forms a unique grain boundary structure. After patterning to form a two-layer electrode wiring, a cover insulating film 4 is formed.
For example, a plasma nitride film (for example, about 1.5 μm thick) is formed.

In such a structure, as shown in FIG. 3, there are grain boundary interfaces 5 that cross the entire cross section of each aluminum film.
It is clear that even if 1 and 52 exist, the probability that they overlap is extremely low. As a result, even if small-scale slit-like voids 61 and 62 occur as shown in FIG. 4, slit-like voids that would cause disconnection of the electrode wiring are extremely unlikely to occur, and the IC will not fail.

In the embodiment described above, a two-layer aluminum film is used, but a three-layer aluminum film may also be used (the thickness of each aluminum film is set so that the overall thickness of the aluminum is the same. The tension applied to the entire aluminum film by the protective film is constant). In this case, a certain tension is absorbed (relaxed) by a large number of small-scale slit-like voids. In other words, the cross-sectional area of the remaining aluminum film becomes larger, allowing the current density to be reduced, which is also advantageous for electromigration mode.

[0012] The above description has been made regarding the case where the metal wiring is a single layer wiring in total, but even in the case of multi-layer wiring such as in recent LSIs, the structure of the present invention can be applied and effective to any layer of metal wiring. It is clear that there is.

[0013]

[Effects of the Invention] As explained above, in the present invention, since the metal wiring is formed of a plurality of homogeneous thin films, slit-like voids that cross the entire cross section of the metal wiring do not occur (no disconnection occurs).
This has the effect of preventing IC failures due to stress migration.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor chip showing one embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip showing one embodiment of the present invention, taken in a direction perpendicular to FIG. 1;

FIG. 3 is a perspective view showing an extracted electrode wiring in one embodiment of the present invention.

FIG. 4 is a perspective view showing stress migration of electrode wiring in an embodiment of the present invention.

FIG. 5 is a cross-sectional view of a semiconductor chip showing a conventional example.

FIG. 6 is a sectional view of a conventional semiconductor chip, taken in a direction perpendicular to FIG. 5;

FIG. 7 is a perspective view showing an extracted electrode wiring in a conventional example.

FIG. 8 is a perspective view showing stress migration of electrode wiring in a conventional example.

[Explanation of symbols]

1 Silicon substrate 2 Insulating film 3, 31, 32 Aluminum film 4 Cover insulating film 5, 51, 52 Grain boundary interface

Claims (2)

[Claims] 1. A semiconductor integrated circuit device characterized in that the electrode wiring is composed of a multilayer film composed of a plurality of thin films made of the same material. 2. The semiconductor integrated circuit device according to claim 1, wherein the material of the electrode wiring is aluminum.