JPH04329332A - Inspecting method and inspecting device for tft picture element on lcd substrate - Google Patents

Abstract

PURPOSE:To inspect the quality of a large quantity of picture elements quickly and surely by changing the voltage applied to drains of multiple TFTs on an LCD substrate, adding on-signals to gates, measuring the changed drain currents, and comparing two measured drain currents of the TFTs. CONSTITUTION:TFTs 51 are formed on picture elements formed into a matrix shape on an LCD substrate 50 to be inspected, and drain electrodes 52 and gate electrodes 53 are horizontally and vertically arranged. For inspection, on-voltage is applied to each gate in sequence, each drain current is voltage- detected 3 and stored 6 after the preset time, on-voltage is applied to the gate while the drain voltage is kept 0V, each drain current is detected 3 and stored 6 after the preset time, and the difference between two stored detection drain currents is calculated. This value is large if the TFT 51, picture element electrode 54 and auxiliary capacity electrode 55 have good quality, it is small if they have inferior quality, thus the quality can be judged based on the difference.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] This invention is a TFT on an LCD substrate.
The present invention relates to a pixel testing method and testing device.

0002

2. Description of the Related Art In recent years, LCD substrates have been widely used as display devices for various electronic devices. This LCD substrate usually has liquid crystal pixels and circuit patterns formed on a glass substrate. In LCD televisions, especially color LCD televisions, in order to increase the response speed of the liquid crystal and improve its image quality, a TFT (thin film transistor) is formed in each liquid crystal pixel.
It is common to use a CD substrate. In this method, a capacitance is formed on the source side of the TFT, and the voltage applied to the liquid crystal is maintained by the capacitance.

0003

[Problems to be Solved by the Invention] Inspecting the quality of LCD substrates as described above is very important in maintaining product quality, and in particular, the quality of LCD substrates is determined by the quality of TFT characteristics. However, in the past, tests at the board stage were only performed by opening and shorting patterns, and the quality of pixels was checked by actually filling the board with liquid crystal and lighting it up. However, if the quality of pixels can be determined at the board stage, there is no need to actually turn them on to check them, and defective pixels can also be repaired, so the quality of TFT pixels on LCD boards can be tested quickly and reliably in large quantities. A method and apparatus is desired.

0004

[Means for Solving the Problems] In order to meet the above-mentioned needs, the method of the present invention applies a voltage to each drain of a plurality of TFTs on an LCD substrate, applies an ON signal to each gate, and at this time Measure each drain current and store each drain current, then change each drain voltage of the plurality of TFTs from the voltage, apply an on signal to each gate, and measure each drain current at this time. Further, each drain current is stored, and the quality of each TFT pixel is determined by comparing two measured drain currents in each TFT.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained below based on embodiments shown in the drawings. In FIG. 1, an LCD board 5 to be inspected
0, pixels are formed in a matrix, and each pixel has a TFT.
51 is formed. The TFT 51 has its gate side connected to the gate electrode 53 and its drain side connected to the drain electrode 52.
It is connected to the. Drain electrode 52 and gate electrode 53
are arranged vertically and horizontally on the edge of the LCD board 50. Each TF
A pixel electrode 54 and an auxiliary capacitor electrode 55 are provided on the source side of T51.
A capacitance C is formed, and the structure is such that a voltage is applied to the liquid crystal 56 by this capacitance C. The pulse oscillator 1 is configured to supply a pulse voltage with a predetermined period to the drain electrode 52, and the pulse oscillator 2 is configured to supply a pulse voltage with a predetermined period to the gate electrode 53. The pulse output from the pulse oscillator 1 has a long pulse width as shown in FIG. It is designed to supply pulses that sequentially turn on up to . A pulse voltage from the pulse oscillator 1 is supplied to the drain electrode 52 via a resistor R, and the drain current of the TFT 51 is detected as the voltage of this resistor R. As shown in FIG. 2, when the pulse from the pulse oscillator 2 turns on the gate electrode 53 when the pulse from the pulse oscillator 1 is on, a drain current flows in the positive direction and is detected as a detected drain current 61a. On the other hand, pulse oscillator 1
When the pulse is off and the drain voltage is zero, a drain current flows in the opposite direction, and this is detected as a detection current 61b, and by comparing the two detection currents 61ab for each TFT 51, the quality of the TFT pixel is determined. It is composed of In this embodiment, the drain electrode 52 and the gate
The connectors 7 and 8 are attached to the drain electrode 53, and the switching device 10 controls the drain electrode 52 on and off, and the switching device 9 scans the gate electrode 53 to sequentially supply pulses to the electrode as shown in FIG. However, the characteristics of each TFT 51 are sequentially measured. As the switching device 9 and the switching device 10, it is possible to use an ordinary electronic switch such as a relay switch or a multiplexer. A voltage detector 3 is connected to the resistor R, and the output of the voltage detector 3 is inputted to the arithmetic processing unit 5 via the A/D converter 4, where it is connected to the TFT 51 and the pixel electrode 54 as described above. Capacitive electrode 55
It is configured such that the quality of the quality is determined. That is, the detected drain current 61ab is stored in the memory 6, the detected drain current 61ab of each TFT 51 is read from there, and the quality is determined by comparing the two.

In the above configuration, when a drain voltage is supplied from the pulse oscillator 1 to the drain electrode 52 via the switching device 10 and the connector 8 for a predetermined period of time, the capacitance between the drain pattern and the common terminal increases at the moment when the drain voltage is applied. As a result, a current 60a flows as shown in FIG. While this drain voltage is present, a short pulse (100 μsec in this example) is output from the pulse oscillator 2, and the switching device 9 sequentially supplies gate voltage to each gate Gn. When the gate is turned on, current flows between the drain and source of the TFT 51, charging the capacitance C. The drain current at this time is defined as a detected drain current 61a as shown in FIG. 2, and is detected as the voltage across the resistor R by the voltage detector 3. This value is converted into a digital quantity by the A/D converter 4 and sent to the memory 6 via the arithmetic processing unit 5.
is memorized. This operation is repeated from gate G1 to gate Gn. Next, as shown in FIG. 2, when the drain voltage from the pulse oscillator 1 is set to 0V, the charges stored in the drain pattern are discharged, and this is observed as a current 60b. When the gate voltage from pulse oscillator 1 is turned on when the drain voltage is zero after discharge is completed, T
The charges stored in the capacitance C of the FT 51 are discharged, and a drain current flows in the opposite direction from the source to the drain of the TFT 51 and toward the resistor R. This is detected by the voltage detector 3 as the detected drain current 61b, and stored in the memory 6 via the arithmetic processing unit 5. This operation is similarly repeated from gates G1 to Gn.

The detected drain current 61a and the detected drain current 61b each include leakage current between the gate and the drain and between the gate pattern and the drain pattern, and this leakage current can be calculated by taking the difference between the detected drain currents 61a and 61b. Can be removed. Let ie be the leakage current when the gate is on, and let ic be the current that actually flows through the capacitance C when the TFT 51 is on, then the detected drain current 61a=ie-ic. On the other hand, the discharge current of the charge stored in the capacitance C by turning on the TFT 51 is i
d, the detected drain current 61b=ie+id. Therefore, the difference between the detected drain currents 61a and 61b is ic
+id, and the influence of leakage current ie is removed. T
If the FT 51, the pixel electrode 54, and the auxiliary capacitance electrode 55 are normal, the capacitance C is charged and discharged normally, so the difference becomes large as shown in FIG. Conversely, if it is abnormal, the difference becomes small as shown in FIG. In this embodiment, the detected drain current 6 is
The difference between the instantaneous values 1a and 1b at a predetermined time after the gate-on signal is applied is determined, and the quality of the TFT 51, pixel electrode 54, and storage capacitor electrode 55 is determined based on whether this difference is greater than or equal to a predetermined value.

Next, the measurement procedure will be explained. First, the drain voltage is set to 0V, and an on-voltage is applied to the gate to discharge it.
Charges that may have been stored in the pixel electrode 54 and the auxiliary capacitor electrode 55 are removed. Then, a drain voltage is applied to first charge the stray capacitance of the pattern, and once this is completed, an on-voltage is applied to each gate in sequence, and each drain current is detected by the voltage detector 3 after a predetermined period of time. The predetermined time is a time during which the leakage current of the gate becomes small and the charging current does not become small. This predetermined time is determined by the characteristics of the TFT 51 or the size and pattern characteristics of the LCD substrate 50, but is approximately 10 to 40 μsec. Each signal detected by this voltage detector 3 is held, converted into a digital quantity by an A/D converter 4, and stored in a memory 6 via an arithmetic processing unit 5. This value is the above-mentioned detected drain current 61a=ie-ic. Next, the drain voltage is set to 0V to remove the charge accumulated in the drain pattern, etc., and an on-voltage is applied to the gate while maintaining 0V. Then, each drain current is detected by the voltage detector 3 after the same time as the above-mentioned predetermined time. This value is similarly stored in the memory 6. This value is the above-mentioned detected drain current 61b=
ie+id. Then, the arithmetic processing unit 5 calculates the difference between the detected drain currents 61a and 61b, and ic+id
Get the value of This value is large if the TFT 51, pixel electrode 54, and auxiliary capacitor electrode 55 are good, and small if it is defective, so it is possible to determine good or bad based on the difference.

As explained above, according to the inspection method of the present invention, the quality of the TFT 51, pixel electrode 54, and storage capacitor electrode 55 can be reliably determined without touching the internal pattern of the LCD substrate 50. Furthermore, by using the switching device 9 to turn on each gate in sequence, it becomes possible to perform inspection at high speed.

0010

As explained above, according to the inspection method of the present invention, there is an effect that the quality of TFT pixels can be determined reliably and at high speed in a non-contact manner.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is an explanatory diagram of the operation of an embodiment of the present invention.

FIG. 3 is an explanatory diagram of the inspection method of the present invention.

FIG. 4 is an explanatory diagram of the inspection method of the present invention.

[Explanation of symbols]

1: Pulse oscillator, 2: Pulse oscillator, 3: Voltage detector, 4: A/D converter, 5: Arithmetic processing unit, 6: Memory,
7: Connector, 8: Connector, 9: Switching device,
10: Switching device, 50: LCD board, 51: T
FT, 52: drain electrode, 53: gate electrode, 54:
Pixel electrode, 55: Storage capacitor electrode, 56: Liquid crystal, 60: Current, 61: Detection drain current.

Claims (2)

[Claims] 1. A voltage is applied to each drain of a plurality of TFTs on an LCD substrate, an on signal is applied to each gate, each drain current is measured at this time, and each drain current is memorized. Then, each drain voltage of the plurality of TFTs is changed from the voltage, an on signal is applied to each gate, each drain current at this time is measured, and each drain current is memorized, and each of the two in each of the TFTs is Determining the quality of each TFT pixel by comparing the measured drain currents,
A method for inspecting TFT pixels on an LCD substrate, characterized in that: 2. Applying a voltage to each drain of a plurality of TFTs on an LCD substrate, applying an on signal to each gate in this state, and then varying the drain voltage of each of the plurality of TFTs from the voltage, to maintain this state. means for applying an on signal to each gate; means for detecting each drain current of each TFT when the drain voltage is applied and changed; and means for storing each detected drain current. , means for determining the quality of each TFT pixel by comparing two measured drain currents in each of the stored TFTs.