JPH0433130B2 - - Google Patents
Info
- Publication number
- JPH0433130B2 JPH0433130B2 JP58144969A JP14496983A JPH0433130B2 JP H0433130 B2 JPH0433130 B2 JP H0433130B2 JP 58144969 A JP58144969 A JP 58144969A JP 14496983 A JP14496983 A JP 14496983A JP H0433130 B2 JPH0433130 B2 JP H0433130B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon oxide
- tungsten
- oxide film
- molybdenum
- silicide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、モリブデンシリサイド、タングステ
ンシリサイドを電極・配線材料として用いた半導
体装置の製造方法に係り、特にシリサイド表面に
モリブデン、ダングステンの酸化物を実質的に含
まない酸化シリコン膜を形成する方法に関する。Detailed Description of the Invention [Field of Application of the Invention] The present invention relates to a method for manufacturing a semiconductor device using molybdenum silicide or tungsten silicide as an electrode/wiring material, and particularly relates to a method for manufacturing a semiconductor device using molybdenum silicide or tungsten silicide as an electrode/wiring material. The present invention relates to a method of forming a silicon oxide film that does not contain carbon dioxide.
従来、シリコン（Si）上にモリブデンシリサイ
ド、あるいはタングステンシリサイドを重ねて被
着した構造において、O2などの酸化雰囲気中で
熱処理してシリサイド表面に酸化シリコン膜
（SiO2）を形成する公知技術があつた。しかしな
がら、この場合シリコンの酸化が進むだけでな
く、モリブデン、ダングステンの酸化も同時に進
むために、形成されたSiO2中にモリブデン
（Mo）、タングステン（Ｗ）の酸化物が多く取り
込まれ、SiO2の電気絶縁特性が劣化するという
欠点があつた。
Conventionally, in a structure in which molybdenum silicide or tungsten silicide is layered and deposited on silicon (Si), a known technique has been used to form a silicon oxide film (SiO 2 ) on the silicide surface by heat treatment in an oxidizing atmosphere such as O 2 . It was hot. However, in this case, not only the oxidation of silicon progresses, but also the oxidation of molybdenum and dungsten simultaneously, so a large amount of molybdenum (Mo) and tungsten (W) oxides are incorporated into the formed SiO 2 , and the SiO 2 The disadvantage was that the electrical insulation properties of the material deteriorated.
本発明の目的は、上記従来の問題を解決し、シ
リサイド表面にMo，Ｗの酸化物を実質的に含ま
ないか、もしくは極めて少ないSiO2を形成する
半導体装置の製造方法を提供するこである。
An object of the present invention is to solve the above-mentioned conventional problems and provide a method for manufacturing a semiconductor device in which the silicide surface contains substantially no Mo or W oxides or very little SiO 2 . .
一般に、Mo，Ｗは非常に酸化しやすく、H2O
あるいはO2と反応して容易に酸化物を形成する。
しかしながら、H2OとH2を混合した雰囲気を用
いれば、Mo，Ｗは酸化されずにSiを選択的に酸
化できることを見い出した、本熱処理法をシリサ
イドの酸化に応用すれば、Mo，Ｗは酸化されな
いためにMo，Ｗの酸化物を実質的に含まない
か、もしくはそれらの酸化物が極めて少ない
SiO2を形成できる。
Generally, Mo and W are very easily oxidized and H 2 O
Alternatively, it easily forms oxides by reacting with O2 .
However, it was discovered that if an atmosphere containing H 2 O and H 2 is used, Si can be selectively oxidized without oxidizing Mo and W. If this heat treatment method is applied to the oxidation of silicide, Mo and W can be oxidized selectively. Because it is not oxidized, it contains virtually no oxides of Mo and W, or contains very little of these oxides.
Can form SiO2 .
以下に本発明を、実施例によつてさらに詳細に
説明する。
The present invention will be explained in more detail below using examples.
実施例 １
第１図１に示すように、Si（100）基板１上にＷ
膜２を約100nｍ蒸着した後、水素中で675℃、30
分間加熱すると、第１図２に示すようにＷ膜２と
Si基板１とが反応して、タングステンシリサイド
３が形成された（厚さは約250nｍ）。この構造の
試料を、H2Oを約90％含むO2中で1000℃、40分
間加熱すると、第１図３に示すようにタングステ
ンシリサイド３上に酸化シリコン膜４が約250n
ｍ形成された。酸化シリコン膜４をアルゴンイオ
ンでエツチングしながら、オージエ電子分光によ
つて酸化シリコン膜中の元素分析を行なうと、Ｗ
元素が約0.1〜0.5％検出された。それに対して、
第１図２に示した試料をH2Oを20％含むH2中で
３時間加熱すると、タングステンシリサイド３上
に約250nｍの酸化シリコン膜が形成されたが、
酸化シリコン膜中にはオージエ電子分光で調べた
結果、Ｗ元素は検出されなかつた。Example 1 As shown in FIG.
After depositing film 2 to a thickness of about 100 nm, it was heated in hydrogen at 675℃ for 30 minutes.
When heated for a minute, the W film 2 is formed as shown in FIG.
Tungsten silicide 3 was formed by reaction with Si substrate 1 (thickness is about 250 nm). When a sample with this structure is heated in O 2 containing about 90% H 2 O at 1000°C for 40 minutes, a silicon oxide film 4 of about 250 nm is formed on the tungsten silicide 3 as shown in FIG.
m was formed. While etching the silicon oxide film 4 with argon ions, elemental analysis in the silicon oxide film is performed using Auger electron spectroscopy.
About 0.1-0.5% of the elements were detected. On the other hand,
When the sample shown in FIG. 1 and 2 was heated in H 2 containing 20% H 2 O for 3 hours, a silicon oxide film of about 250 nm was formed on the tungsten silicide 3.
As a result of examination by Auger electron spectroscopy, no W element was detected in the silicon oxide film.
実施例 ２
先の実施例の第１図３の構造の試料に、Al膜
を900nｍ蒸着した後、フオトレジストをマスク
して、420μｍ角のAl電極５を形成した（第２
図）。Al電極５とSi基板１との間に電界をかけ
て、厚さ250nｍの酸化シリコン膜４の絶縁耐圧
を測定した。酸化シリコン膜４を、H2Oを含む
O2中で加熱して形成した場合には、絶縁耐圧は
２〜3MV／cmと低い値を示したが、H2Oを含む
H2中で加熱して形成した場合では耐圧は４〜５
5V／cmとなり前者に比べて良好であつた。本発
明において、水素中に含まれる水分の量は、容量
比で1ppmから50％までの範囲内にあることが好
ましく、この範囲内であれば、モリブデンもしく
はタングステンの酸化物が、実質的に形成されな
いことが認められた。Example 2 After depositing an Al film with a thickness of 900 nm on the sample having the structure shown in FIG.
figure). An electric field was applied between the Al electrode 5 and the Si substrate 1, and the dielectric strength voltage of the silicon oxide film 4 with a thickness of 250 nm was measured. The silicon oxide film 4 contains H 2 O.
When formed by heating in O 2 , the dielectric strength voltage was as low as 2 to 3 MV/cm;
When formed by heating in H2 , the pressure resistance is 4 to 5.
The voltage was 5V/cm, which was better than the former. In the present invention, the amount of water contained in hydrogen is preferably within the range of 1 ppm to 50% by volume, and within this range, molybdenum or tungsten oxides are substantially formed. It was acknowledged that this was not the case.
上記説明から明らかなように、本発明によれば
シリサイド上にモリブデン、タングステンの酸化
物を実質的に含まない酸化シリコン膜が形成でき
るので、絶縁耐圧の大きい高品質の酸化シリコン
膜を提供できる。
As is clear from the above description, according to the present invention, a silicon oxide film substantially free of molybdenum and tungsten oxides can be formed on silicide, so a high quality silicon oxide film with a high dielectric strength can be provided.
第１図は本発明の構成を説明するための図、第
２図は本発明の一実施例を示す図である。
１……シリコン基板、２……タングステン膜、
３……タングステンシリサイド、４……酸化シリ
コン膜、５……Al電極。
FIG. 1 is a diagram for explaining the configuration of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention. 1...Silicon substrate, 2...Tungsten film,
3...Tungsten silicide, 4...Silicon oxide film, 5...Al electrode.
Claims (1)
もしくはタングステンシリサイド膜を、水分を含
む水素中で熱処理することにより、上記モリブデ
ンシリサイド膜もしくはタングステンシリサイド
膜の表面に、モリブデンの酸化物もしくはタング
ステンの酸化物を実質的に含まない酸化シリコン
膜を形成する工程を有することを特徴とする半導
体装置の製造方法。 ２ 上記水素中の上記水分の含有量は、容量比で
1ppm以上50％以下であることを特徴とする特許
請求の範囲第１項記載の半導体装置の製造方法。[Scope of Claims] 1 A molybdenum silicide film or a tungsten silicide film having a predetermined shape is heat-treated in hydrogen containing moisture to form molybdenum oxide or tungsten on the surface of the molybdenum silicide film or tungsten silicide film. 1. A method for manufacturing a semiconductor device, comprising the step of forming a silicon oxide film substantially free of oxides. 2 The content of the above water in the above hydrogen is expressed as a volume ratio.
2. The method for manufacturing a semiconductor device according to claim 1, wherein the content is 1 ppm or more and 50% or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58144969A JPS6037123A (en) | 1983-08-10 | 1983-08-10 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58144969A JPS6037123A (en) | 1983-08-10 | 1983-08-10 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6037123A JPS6037123A (en) | 1985-02-26 |
| JPH0433130B2 true JPH0433130B2 (en) | 1992-06-02 |
Family
ID=15374402
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58144969A Granted JPS6037123A (en) | 1983-08-10 | 1983-08-10 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6037123A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0789549B2 (en) * | 1985-03-18 | 1995-09-27 | 株式会社日立製作所 | Method for manufacturing semiconductor device |
-
1983
- 1983-08-10 JP JP58144969A patent/JPS6037123A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6037123A (en) | 1985-02-26 |
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