JPH0434083U - - Google Patents

Info

Publication number
JPH0434083U
JPH0434083U JP7458490U JP7458490U JPH0434083U JP H0434083 U JPH0434083 U JP H0434083U JP 7458490 U JP7458490 U JP 7458490U JP 7458490 U JP7458490 U JP 7458490U JP H0434083 U JPH0434083 U JP H0434083U
Authority
JP
Japan
Prior art keywords
dropout detection
signal
dropout
video signal
detection signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7458490U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7458490U priority Critical patent/JPH0434083U/ja
Publication of JPH0434083U publication Critical patent/JPH0434083U/ja
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)
  • Optical Recording Or Reproduction (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示すブロツク図で
ある。第２図は要部の波形関係を示す図である。 １……ＨＰＦ、２……ＦＭ復調器、３……ＡＤ
変換器、４……シフトレジスタ、５……パイロツ
ト検出器、６……シフトレジスタ、７……基準信
号、８……位相比較器、９……フイルタ、１０…
…ＶＣＯ、１１……ＤＡ変換器、１３……ドロツ
プアウト検出器、１２……ＭＵＳＥデコーダであ
る。 FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a diagram showing waveform relationships of main parts. 1...HPF, 2...FM demodulator, 3...AD
Converter, 4...Shift register, 5...Pilot detector, 6...Shift register, 7...Reference signal, 8...Phase comparator, 9...Filter, 10...
...VCO, 11...DA converter, 13...dropout detector, 12...MUSE decoder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 再生信号をＨＰＦを通した後ＦＭ変調しこれを
Ａ／Ｄ変換した映像信号とドロツプアウトを検出
したドロツプアウト検出信号とを共に時間軸補正
回路に同一の組で読み込み、映像信号が時間軸補
正回路（以下Ｔ．Ｂ．Ｃ．）で生じる処理時間だ
け遅延させるのにＴ．Ｂ．Ｃ．のビツトをドロツ
プアウト検出信号に割り当てドロツプアウト検出
信号と映像信号とを相対して遅延を行ないジツタ
を補正することを特徴とするドロツプアウト検出
回路。 The playback signal is passed through an HPF, FM modulated, and then A/D converted. A video signal and a dropout detection signal that detects a dropout are both read into the time axis correction circuit as the same set, and the video signal is transferred to the time axis correction circuit ( To delay the processing time caused by T.B.C. below, T.B.C. B. C. 1. A dropout detection circuit which corrects jitter by allocating bits of 1 to a dropout detection signal and delaying the dropout detection signal and a video signal relative to each other.
JP7458490U 1990-07-13 1990-07-13 Pending JPH0434083U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7458490U JPH0434083U (en) 1990-07-13 1990-07-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7458490U JPH0434083U (en) 1990-07-13 1990-07-13

Publications (1)

Publication Number Publication Date
JPH0434083U true JPH0434083U (en) 1992-03-19

Family

ID=31614403

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7458490U Pending JPH0434083U (en) 1990-07-13 1990-07-13

Country Status (1)

Country Link
JP (1) JPH0434083U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232778A (en) * 1987-03-20 1988-09-28 Matsushita Electric Ind Co Ltd Video signal processing device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232778A (en) * 1987-03-20 1988-09-28 Matsushita Electric Ind Co Ltd Video signal processing device

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