JPH04353605A - Rush-current preventing circuit - Google Patents

Abstract

PURPOSE:To avoid an influence on a head drive circuit due to a current-limiting means and to perform the stable write operation of a magnetic data regarding an rush-current preventing circuit which is used for a power-saving type magnetic tape apparatus. CONSTITUTION:A write current from a head drive circuit 2 is supplied to a magnetic head 1 for magnetic tape use. A power supply means 3 supplies a power supply for write use to the head drive circuit 2 according to a write enable instruction (WENB) which is instructed to the magnetic head 1. A current-limiting means 6 is inserted into series between a power supply Vcc and the power supply means 3 so as to limit an rush current flowing to the power supply means 3. A switch means 7 is installed in such a way that it is turned on in synchronization with a write start instruction (WCON) generated so as to be delayed by a certain time after the write enable instruction (WENB) has been generated and that the current-limiting means 6 is made ineffective.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inrush current prevention circuit used in a power-saving magnetic tape device. For more information,
The present invention relates to a rush current prevention circuit that prevents rush current from flowing into a head drive circuit that supplies write current to a magnetic head.

With the recent demand for downsizing of computer systems, there is a need for a compact power supply circuit that can supply a stable power supply voltage. In addition, in order to reduce the power consumption of the entire device, there is a need to reduce the power supply capacity, so capacitors for the power supply path are increasingly used as voltage stabilizing means. However, in general, when an excessive inrush current flows when charging a capacitor, normal operation of the device is inhibited. Therefore, especially in small magnetic tape devices, it has been necessary to use inductance or the like to limit the current.

By the way, as a result of the use of a current limiting circuit in a power-saving magnetic tape device, there is a possibility that the write current to the magnetic head changes, resulting in malfunction. Therefore, when a power-saving magnetic tape device is provided with an inrush current prevention circuit, maintaining the writing quality of magnetic data becomes an important issue. Therefore, when a power-saving magnetic tape device is provided with a current limiting function, it is also necessary to suppress voltage fluctuations used in the write operation of the magnetic head.

0004

2. Description of the Related Art Conventional current control circuits generally use a limiting inductance to prevent inrush current, and are intended to prevent elements such as switching transistors from being destroyed by excessive current.

By the way, in devices such as magnetic tape devices for computers that require high data writing accuracy, a capacitor is provided in the power supply circuit when the maximum value of the power supply Vcc is limited. After increasing the power supply voltage for writing to a predetermined voltage required for writing, a write signal is given to the magnetic head. To this end, the power supply circuit for writing is first started to be energized at the timing of the write permission command in addition to the write start command, and then the power supply control to the write head is started at a timing delayed for a certain period of time. . That is, write permission command (write enable; WENB)
After securing the necessary driving power for the write head based on the above, power supply to the magnetic head is actually started.

[0006]

FIG. 4 is a signal waveform diagram showing a current limiting state at timing t1 of a conventional write enable command (WENB). When the write voltage Vw rises, the current I flowing into the power supply circuit is limited to a predetermined magnitude Imax by an inductance for limiting rush current. That is, in the conventional head drive circuit, at the timing t1 when commanding the start of the write operation, the power supply voltage Vw for writing is increased to a predetermined voltage value prior to the actual write operation while limiting the charging current to the capacitor. There is an advantage that it can be kept. Therefore, after that, it becomes possible to give a write start command (WCON) to quickly start energizing the magnetic head.

[0007] However, the inductance for inrush current limitation is determined at the timing t2 of the next write start command (WCON).
Since this also acts to limit the write current I that starts flowing again at , the write voltage Vw temporarily decreases. If the write voltage Vw is temporarily lowered at timing t2 due to the inductance that has the function of preventing rush current, normal data writing by the magnetic head is no longer guaranteed. In this case, if you install an abnormality detection circuit to monitor the power status and perform a write operation while checking for errors (ERR) in the write data, the non-data area used to confirm the tape position at the start of writing can be The head portion of the burst signal becomes uncertain, and if error checking is not performed, a useless non-data area must be set to avoid the effects of jitter and the like. Therefore, the detection accuracy of the abnormality detection circuit that monitors the drop in the write voltage has been relaxed to a certain extent, or the detection timing has been delayed to cope with the drop in the write voltage.

[0008] As described above, in order to apply the conventional inrush current prevention circuit to a power-saving magnetic tape device and perform write operations with high precision, it is necessary to sufficiently suppress voltage fluctuations. There was a problem that it should not be done.

The present invention has been made in view of these points, and once a power supply voltage that allows writing is secured, the influence of the current limiting means on the head drive circuit is avoided, and the head drive circuit is stably operated. An object of the present invention is to provide an inrush current prevention circuit that is capable of writing operations.

0010

SUMMARY OF THE INVENTION FIG. 1 is a block diagram illustrating the principle of the present invention that achieves the above object. In FIG. 1, a write current is supplied from a head drive circuit 2 to a magnetic head 1 for magnetic tape. Power source means 3
is the write permission command (
The power supply for writing is supplied to the head drive circuit 2 according to the signal (WENB). Note that the output voltage Vw of this write power supply is stabilized by a power supply path capacitor 4. It is also possible to check the writing state of the magnetic head 1 by providing an abnormality detection means 5 for detecting an abnormality in the head drive circuit 2.

The current limiting means 6 is, for example, an inductance inserted in series between the power source Vcc and the power source means 3, and is for limiting the rush current flowing into the power source means 3. The switch means 7 issues a write permission command (
It is turned on in synchronization with the write start command (WCON) that occurs after a certain time delay after WENB) occurs.
It is configured to nullify the effect of the current limiting means 6.

0012

[Operation] In the present invention, the inrush current is limited by the current limiting means 6 at the timing of the write enable command (WENB), and thereafter, at the time when the write current is supplied from the power supply means 3 based on the write start command (WCON). , the switch means 7 acts to short-circuit the current limiting means 6 and connect the power supply Vcc directly to the power supply means 3.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing the configuration of the write magnetic head 1 of a magnetic tape device and its inrush current prevention circuit for implementing the present invention. The head drive circuit 2 receives a write start command (WCON) and data written from the magnetic head 1 onto the magnetic tape (write data; WR).
The write data input to the AND gate 22 is inverted by an inverter 23. The drive transistors 24 and 25 have their respective collectors connected to respective terminals of the coil of the magnetic head 1, and their emitter sides are both grounded. Further, a power supply voltage Vw for writing is supplied to each terminal of the coil of the magnetic head 1 via resistors 26 and 27, respectively. The output of the AND gate 21 is applied to the base of the transistor 24, and the output of the AND gate 22 is applied to the base of the transistor 25.
The output of is given. This determines the direction of the current flowing through the magnetic head 1.

The power supply means 3 is composed of an amplifier 31, a switching transistor 32, and two resistors 33 and 34. A writing voltage reference signal (WDAC) is input to the - input terminal of the amplifier 31, and the + input terminal is input to the reference signal (WDAC) for the write voltage.
A potential at a connection point between two resistors 33 and 34 connected in series between the collector of the switching transistor 32 and ground is given. These two resistors 33 and 34 are provided as feedback resistors for the amplifier 31, and when the respective resistance values are a and b, the amplifier 3
1, the reference signal (WDAC) is multiplied by (a+b)/b and output. The output of this amplifier 31 is the write permission command (
WENB) is applied to the base of the switching transistor 32, and this transistor 3
The writing power supply voltage Vw determined by the collector potential of No. 2 is controlled to be constant.

A capacitor 4 for a power supply path for stabilizing the power supply voltage is connected in parallel with a series circuit of two resistors 33 and 34 between the collector of the switching transistor 32 and the ground. As a result, a steady current based on the writing power supply voltage Vw is supplied to the magnetic head 1 via the resistors 26 and 27.

The abnormality detection means 5 includes a write check circuit 50 for detecting a drop in the write voltage to the magnetic head 1 based on a reference voltage value set therein. This write check circuit 50 has a capacitor 4.
The power supply voltage Vw for writing is determined by the charging current of
is supplied and compared with the slice level based on the reference voltage value to check for power supply abnormalities. Further, voltage signals on the collector side of each of the drive transistors 24 and 25 are inputted, and a pulse check during a write operation is executed.

Current limiting means 6 includes an inductance 60 inserted in series between power supply Vcc and switching transistor 32, and resistors 61 and 62 connected in parallel to inductance 60. inductance 60
is for limiting the rush current flowing into the power supply means 3, and the resistors 61 and 62 are for improving the responsiveness when the rush current is applied.

The switch means 7 receives a write start command (
WCON) is supplied, and this WCON, which is inverted to L (low level) by an inverter 71, forms the gate voltage of a p-channel FET 73 via a resistor 72. A reverse voltage blocking diode 74 is connected between the source and drain of the FET 73, and further connected between both terminals of the inductance 60. Further, the power supply Vcc is supplied to the output side of the inverter 71 via a resistor 75 for pull-up.

Next, the write operation in the magnetic tape device having the inrush current prevention circuit configured as described above will be explained based on FIG. FIG. 3 shows a write enable command (WENB).
) rises at timing t1, write voltage Vw, conduction current I12, write start command (WCON)
, and the waveform of the error check output (ERR). WENB changes from L level to H level, current I12 flows from power supply Vcc to capacitor 4, and V is sufficient to command magnetic head 1 to start a write operation.
w is formed. In that case, the FET of the switch means 7
73 is in a non-operating state, the inrush current value of the current I12 flowing to the power supply means 3 due to the inductance 60 is Im
ax is suppressed to, for example, about 2 to 3 A, and the capacitor 4
The charging current to is limited. When charging of the capacitor 4 is completed, the current I12 becomes almost zero.

[0020] After a certain period of time has elapsed from timing t1,
At timing t2 synchronized with the write data, the write start command (WCON) changes from L level to H level, and drives one of drive transistors 24 and 25 via AND gates 21 and 22. here,
Assuming that the resistance value of the magnetic head 1 is Rh, the resistance values of both the resistors 26 and 27 are Ri, and the voltage drop across the collector-emitter resistance of the transistors 24 and 25 is 0.4, the power supply Vcc
The current value Ic flowing into the capacitor 4 from I12≒(
Vw-0.4)/(Ri+Rh)=Ic. That is,
When writing is started, when the FET 73 operates and the voltage drop across the inductance 60 becomes zero, the writing voltage Vw does not change at timing t2 even if the current I12 changes from zero to Ic. By short-circuiting the inductance 60 with the FET 73 in this way, a temporary voltage drop as shown by the broken line in FIG. 3 does not occur during the write operation of the magnetic head 1, and the error check output ERR due to this does not occur. It disappears. Therefore, a stable write voltage Vw can be ensured without reducing the detection accuracy of the error check circuit 50.

[0021]The write permission command (WENB) is as follows:
For example, it is formed when the presence or absence of file protection is checked and there is no write prohibition command for the magnetic tape.

[0022] In the above description, an embodiment is shown in which a FET with a small on-resistance is used as the switch means 7, but it can also be constructed using other transistors. Furthermore, even when the coil of the magnetic head 1 is of a structure having a center tap, the influence of the current limiting means on the head drive circuit 2 can be avoided.

[0023]

As described above, in the present invention, the inrush current prevention circuit is configured so that the voltage drop in the current limiting means is avoided by the switch means synchronized with the write start command. For this reason, it avoids the effect of current limiting means on the head drive circuit used in power-saving magnetic tape devices to prevent inrush current, and once a power supply voltage that allows writing is secured, stable writing is possible. Since the operation is ensured, the writing quality of the burst signal at the beginning of the non-data area at the start of writing can be guaranteed. Moreover, even when a writing voltage abnormality detection means is provided, it is possible to improve the detection accuracy. Therefore, the quality of data written to the magnetic tape is improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram illustrating the principle of the present invention.

FIG. 2 is a block diagram showing a configuration when the present invention is applied to a magnetic head for writing in a magnetic tape device.

FIG. 3 is a timing diagram illustrating a write operation of the present invention.

FIG. 4 is a timing diagram showing a current limiting state at the start of conventional writing.

[Explanation of symbols]

1 Magnetic head 2 Head drive circuit 3 Power source means 4 Capacitor 5 Abnormality detection means 6 Inductance 7 Switch means

Claims (4)

[Claims] 1. An inrush current prevention circuit that prevents an inrush current from flowing into a head drive circuit (2) that supplies a write current to a magnetic head (1) for magnetic tape, in which a write command is issued to the magnetic head (1). a power supply means (3) for supplying write power to the head drive circuit (2) in response to a permission command (WENB); and a current limiting means (6) for limiting inrush current flowing through the power supply means (3); a switch means (7) for disabling the current limiting means (6) in synchronization with a write start command (WCON) that is generated with a delay with respect to the write enable timing signal (WENB);
An inrush current prevention circuit characterized by having. 2. The inrush current according to claim 1, further comprising abnormality detection means (5) for detecting a drop in the write voltage to the magnetic head (1) based on a set reference voltage value. prevention circuit. 3. The rush current prevention circuit according to claim 1, wherein the power supply means (3) includes a capacitor (4) for a power supply path for stabilizing the power supply voltage. 4. The inrush current prevention circuit according to claim 1, wherein the switch means (7) includes a transistor switch that is turned on and off using the write start command (WCON) as a gate signal.