JPH04367131A - Line edition system - Google Patents
Line edition systemInfo
- Publication number
- JPH04367131A JPH04367131A JP16742991A JP16742991A JPH04367131A JP H04367131 A JPH04367131 A JP H04367131A JP 16742991 A JP16742991 A JP 16742991A JP 16742991 A JP16742991 A JP 16742991A JP H04367131 A JPH04367131 A JP H04367131A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- mbps
- transmission
- terminator
- 2mbps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、ディジタル伝送路およ
び局内の各種通信設備との間を接続するための回線編集
方式に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line editing system for connecting digital transmission lines and various communication equipment within a station.
【0002】0002
【従来の技術】従来の回線編集装置の構成例を図2に示
す。図2のごとく、6.3Mbpsの国内伝送路14、
1.5Mbpsの国際伝送路12、2Mbpsの国際伝
送路13及び8.4Mbpsの局内ハイウェイ15の各
伝送レートごとの終端モジュール16,21,23,1
8を用いなければならず、且つ各伝送路と局内ハイウェ
イの接続は64Kbpsごとに分割した回線接続となっ
ている。2. Description of the Related Art An example of the configuration of a conventional line editing device is shown in FIG. As shown in Figure 2, 6.3 Mbps domestic transmission line 14,
Termination modules 16, 21, 23, 1 for each transmission rate of 1.5 Mbps international transmission line 12, 2 Mbps international transmission line 13, and 8.4 Mbps intra-office highway 15
8 must be used, and the connection between each transmission line and the intra-office highway is a line connection divided into 64 Kbps units.
【0003】また、8.2Mbps共通ディジタル信号
20は、図3に示すように6回線毎にグループ化して最
大120チャンネル分の信号が収容できるフレームフォ
ーマットとなっているため、例えば2Mbps伝送路の
タイムスロット「16」の信号を取り扱う場合は、2M
bps終端モジュール23での多重数を「3」とし、8
.2Mbps共通ディジタル信号上の空きタイムスロッ
ト位置に2Mbps伝送路のタイムスロット「16」の
信号をマッピングする等の特別な操作が必要となり、ま
た任意の8.4Mbps局内ハイウェイと接続させるた
め、1回線(64kbps)単位の回線接続機能が必要
である。Furthermore, the 8.2 Mbps common digital signal 20 has a frame format that can accommodate signals for a maximum of 120 channels by grouping every 6 lines as shown in FIG. When handling the signal of slot "16", 2M
The multiplexing number in the bps termination module 23 is set to "3", and 8
.. Special operations such as mapping the signal of time slot "16" of the 2 Mbps transmission line to an empty time slot position on the 2 Mbps common digital signal are required, and in order to connect to any 8.4 Mbps internal highway, one line ( 64 kbps) is required.
【0004】0004
【発明が解決しようとする課題】上述のように、従来の
回線編集方式では、伝送レート毎に個別の多重方式で8
.2Mbps共通ディジタル信号に変換していたことか
ら、伝送レート毎に異なる装置(モジュール)を用意す
る必要があり、局内の接続構成が複雑となるとともに、
運用作業が統一されない問題があった。また、1回線(
64kbps)単位の回線接続機能のため、回線設定に
伴うデータの編集作業が多いなどの問題があった。[Problems to be Solved by the Invention] As mentioned above, in the conventional line editing system, 8
.. Because it was converted to a 2Mbps common digital signal, it was necessary to prepare different devices (modules) for each transmission rate, which complicated the connection configuration within the station.
There was a problem that operational work was not unified. Also, 1 line (
Since the line connection function is in units of 64 kbps), there were problems such as a lot of data editing work involved in setting up the line.
【0005】本発明は、このような状況に鑑み、1.5
Mbpsおよび2Mbpsの多重化系列の異なる伝送路
を統合的に収容可能とし、またそれぞれの伝送路の多重
化系列の伝送レートの相違を意識することなく、接続作
業が行える回線編集方式を提供することにある。[0005] In view of this situation, the present invention has been developed to achieve 1.5
To provide a line editing method that can integrally accommodate transmission lines with different multiplexed sequences of Mbps and 2 Mbps, and allows connection work to be performed without being aware of the difference in transmission rate of the multiplexed sequence of each transmission line. It is in.
【0006】[0006]
【課題を解決するための手段】この目的を達成するため
に、本発明の回線編集方式は、ディジタル同期伝送路と
局内ディジタルハイウェイとを収容し、これらの間を任
意に回線接続する回線編集装置において、1.5Mbp
s,2Mbps,6.3Mbps,8Mbpsの伝送レ
ートである伝送路信号と装置内で共通に用いる伝送レー
ト2Mbps信号とを相互に変換する信号変換手段、群
多重化手段と2Mbps信号により各伝送レート伝送路
対応該信号変換手段、該群多重化手段を接続するための
時分割スイッチ手段とにより、多重化系列の異なる伝送
路を統合的に取り扱えることを特徴とする構成を有して
いる。[Means for Solving the Problems] In order to achieve this object, the line editing system of the present invention provides a line editing device that accommodates a digital synchronous transmission line and an in-office digital highway, and connects these lines arbitrarily. , 1.5Mbp
Transmission at each transmission rate is performed using a signal conversion means, a group multiplexing means, and a 2Mbps signal, which mutually converts transmission line signals having transmission rates of 2Mbps, 6.3Mbps, and 8Mbps and 2Mbps signals commonly used within the device. The present invention has a configuration characterized in that transmission paths of different multiplexed series can be handled in an integrated manner by means of the signal conversion means corresponding to each channel and the time division switch means for connecting the group multiplexing means.
【0007】[0007]
【実施例】以下、本発明の実施例を図面を用いて説明す
る。図1は本発明の実施例を示すものであり、一次群終
端モジュール1は1.5Mbps伝送路終端回路2、1
.5Mbps/2Mbps信号変換回路3、2Mbps
伝送路終端回路4および一次群多重化回路5により構成
される。また、二次群終端モジュール6は6.3Mbp
s伝送路終端回路7、6.3Mbps/8.4Mbps
信号変換回路8,8.4Mbps局内ハイウェイ終端回
路9および二次群多重化回路10により構成される。
時分割スイッチ11は2Mbps一次群単位で接続動作
する時分割スイッチであり、複数の一次群終端モジュー
ル1および二次群終端モジュール6を収容する。Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an embodiment of the present invention, in which a primary group termination module 1 includes 1.5 Mbps transmission line termination circuits 2, 1.
.. 5Mbps/2Mbps signal conversion circuit 3, 2Mbps
It is composed of a transmission line termination circuit 4 and a primary group multiplexing circuit 5. In addition, the secondary group termination module 6 has a 6.3 Mbp
s Transmission line termination circuit 7, 6.3Mbps/8.4Mbps
It is composed of a signal conversion circuit 8, an 8.4 Mbps intra-office highway termination circuit 9, and a secondary group multiplexing circuit 10. The time division switch 11 is a time division switch that connects in units of 2 Mbps primary groups, and accommodates a plurality of primary group termination modules 1 and secondary group termination modules 6.
【0008】1.5Mbps伝送路12は1.5Mbp
s伝送路終端回路2により終端された後、1.5Mbp
s/2Mbps信号変換回路3により2Mbps信号に
変換される。2Mbps伝送路13は2Mbps伝送路
終端回路4により終端される。複数の1.5Mbps/
2Mbps信号変換回路3および2Mbps伝送路終端
回路4からの2Mbps信号は一次群多重化回路5によ
り多重化された後、時分割スイッチ11に接続される。
時分割スイッチ11からの信号はこれと逆の動作により
それぞれの伝送路に送出される。同じく、6.3Mbp
s伝送路14は6.3Mbps伝送路終端回路7により
終端された後、6.3Mbps/8.4Mbps信号変
換回路8により8.4Mbps信号に変換される。8.
4Mbps局内ハイウェイ15は8.4Mbps局内ハ
イウェイ終端回路9により終端される。複数の6.3M
bps/8.4Mbps信号変換回路8および8.4M
bps局内ハイウェイ終端回路9からの8.4Mbps
信号は二次群多重化回路10により多重化された後、時
分割スイッチ11に接続される。時分割スイッチ11か
らの信号はこれと逆の動作によりそれぞれの伝送路に送
出される。[0008] The 1.5 Mbps transmission line 12 is 1.5 Mbps
s After being terminated by transmission line termination circuit 2, 1.5Mbp
The signal is converted into a 2Mbps signal by the s/2Mbps signal conversion circuit 3. The 2 Mbps transmission line 13 is terminated by a 2 Mbps transmission line termination circuit 4. Multiple 1.5Mbps/
The 2 Mbps signals from the 2 Mbps signal conversion circuit 3 and the 2 Mbps transmission line termination circuit 4 are multiplexed by the primary group multiplexing circuit 5 and then connected to the time division switch 11. Signals from the time division switch 11 are sent to the respective transmission paths by an operation opposite to this. Similarly, 6.3Mbp
The s transmission line 14 is terminated by a 6.3 Mbps transmission line termination circuit 7, and then converted into an 8.4 Mbps signal by a 6.3 Mbps/8.4 Mbps signal conversion circuit 8. 8.
The 4 Mbps intra-office highway 15 is terminated by an 8.4 Mbps intra-office highway termination circuit 9. Multiple 6.3M
bps/8.4Mbps signal conversion circuit 8 and 8.4M
bps 8.4Mbps from intra-office highway termination circuit 9
After the signals are multiplexed by a secondary group multiplexing circuit 10, they are connected to a time division switch 11. Signals from the time division switch 11 are sent to the respective transmission paths by an operation opposite to this.
【0009】本構成において、1.5Mbps伝送路と
2Mbps伝送路ならびに6.3Mbps伝送路と8.
4Mbps伝送路(局内ハイウェイ)は同一の終端モジ
ュールに収容でき、また、全ての伝送路および局内ハイ
ウェイ相互間は、それぞれの伝送レートの相違を意識す
ることなく、2Mbps一次群を単位として接続可能で
ある。In this configuration, a 1.5 Mbps transmission line, a 2 Mbps transmission line, a 6.3 Mbps transmission line, and 8.
4Mbps transmission lines (intra-office highways) can be accommodated in the same termination module, and all transmission lines and intra-office highways can be connected in units of 2Mbps primary groups without being aware of the differences in their respective transmission rates. be.
【0010】0010
【発明の効果】以上説明したように、本発明では、1.
5Mbps系信号を2Mbps系信号に変換することお
よび2Mbps一次群単位の接続機能により、1.5M
bpsおよび2Mbpsの伝送レートの異なる伝送路を
1装置(モジュール)に統合的に収容可能となり、また
接続動作もそれぞれの伝送路の多重化系列の伝送レート
の相違を意識することなく可能となる。[Effects of the Invention] As explained above, in the present invention, 1.
By converting 5Mbps signals to 2Mbps signals and connecting in 2Mbps primary group units, 1.5M
Transmission lines with different transmission rates of bps and 2 Mbps can be integrated into one device (module), and connection operations can be performed without being aware of the difference in transmission rate of the multiplexed series of each transmission line.
【図1】本発明の一実施例を示す構成図である。FIG. 1 is a configuration diagram showing an embodiment of the present invention.
【図2】従来の技術の構成例である。FIG. 2 is a configuration example of a conventional technology.
【図3】従来の技術における8.2Mbps共通ディジ
タル信号のフレームフォーマット例である。FIG. 3 is an example of a frame format of an 8.2 Mbps common digital signal in the prior art.
1 一次群終端モジュール
2 1.5Mbps伝送路終端回路
3 1.5Mbps/2Mbps信号変換回路4
2Mbps伝送路終端回路
5 一次群多重化回路
6 二次群終端モジュール
7 6.3Mbps伝送路終端回路
8 6.3Mbps/8.4Mbps信号変換回路9
8.4Mbps局内ハイウェイ終端回路10,10
−1〜2 二次群多重化回路11 時分割スイッチ
12 1.5Mbps伝送路
13 2Mbps伝送路
14 6.3Mbps伝送路
15 8.4Mbps局内ハイウェイ16 6.3
Mbps終端モジュール17 6.3Mbps/8.
2Mbps信号変換回路18 局内ハイウェイ終端モ
ジュール19 8.4Mbps/8.2Mbps信号
変換回路20 8.2Mbps共通ディジタル信号2
1 1.5Mbps終端モジュール22 1.5M
bps多重化回路
23 2Mbps終端モジュール
24 2Mbps多重化回路1 Primary group termination module 2 1.5Mbps transmission line termination circuit 3 1.5Mbps/2Mbps signal conversion circuit 4
2Mbps transmission line termination circuit 5 Primary group multiplexing circuit 6 Secondary group termination module 7 6.3Mbps transmission line termination circuit 8 6.3Mbps/8.4Mbps signal conversion circuit 9
8.4Mbps intra-office highway termination circuit 10,10
-1 to 2 Secondary group multiplexing circuit 11 Time division switch 12 1.5 Mbps transmission line 13 2 Mbps transmission line 14 6.3 Mbps transmission line 15 8.4 Mbps intra-office highway 16 6.3
Mbps termination module 17 6.3Mbps/8.
2Mbps signal conversion circuit 18 Internal highway termination module 19 8.4Mbps/8.2Mbps signal conversion circuit 20 8.2Mbps common digital signal 2
1 1.5Mbps termination module 22 1.5M
bps multiplexing circuit 23 2Mbps termination module 24 2Mbps multiplexing circuit
Claims (1)
送路と局内ディジタルハイウェイとの相互間を任意に回
線接続する回線編集方式において、1.5Mbpsと2
Mbpsとの伝送レートの伝送信号と装置内で共通に用
いる伝送レート2Mbpsの多重化信号の相互信号変換
接続をする第一の終端モジュールと、6.3Mbpsと
8.4Mbpsとの伝送レートの伝送信号と前記伝送レ
ート2Mbpsの多重化信号の相互信号変換接続する第
二の終端モジュールと、前記第一の終端モジュールと前
記第二の終端モジュールから得られる前記伝送レート2
Mbpsの多重化信号を互いに時分割で接続する時分割
スイッチとを備えたことを特徴とする回線編集方式。Claim 1: A line editing method for arbitrarily connecting a digital synchronous transmission line with a different transmission rate and an in-office digital highway.
A first termination module that performs a mutual signal conversion connection between a transmission signal with a transmission rate of 6.3 Mbps and a multiplexed signal with a transmission rate of 2 Mbps commonly used within the device, and a transmission signal with a transmission rate of 6.3 Mbps and 8.4 Mbps. and a second termination module that connects the multiplexed signals with the transmission rate of 2 Mbps for mutual signal conversion, and the transmission rate of 2 obtained from the first termination module and the second termination module.
A line editing system characterized by comprising a time division switch that connects Mbps multiplexed signals to each other in a time division manner.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16742991A JPH04367131A (en) | 1991-06-13 | 1991-06-13 | Line edition system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16742991A JPH04367131A (en) | 1991-06-13 | 1991-06-13 | Line edition system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04367131A true JPH04367131A (en) | 1992-12-18 |
Family
ID=15849545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16742991A Pending JPH04367131A (en) | 1991-06-13 | 1991-06-13 | Line edition system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04367131A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61224526A (en) * | 1985-03-29 | 1986-10-06 | Oki Electric Ind Co Ltd | Line setting circuit |
| JPH01260942A (en) * | 1988-04-11 | 1989-10-18 | Fujitsu Ltd | Cross connect device |
-
1991
- 1991-06-13 JP JP16742991A patent/JPH04367131A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61224526A (en) * | 1985-03-29 | 1986-10-06 | Oki Electric Ind Co Ltd | Line setting circuit |
| JPH01260942A (en) * | 1988-04-11 | 1989-10-18 | Fujitsu Ltd | Cross connect device |
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