JPH0440028A - Receiver for scramble signal - Google Patents

Abstract

PURPOSE:To increase the number of channels for scramble signals by connecting plural descramblers in common, identifying the scramble signals and inducing signal outputs only when the descramble operation is enabled. CONSTITUTION:An input part 21 is provided to receive the plural various scramble signals to be transmitted by the same transmission line, and plural descramblers 201A1, 201A2, 201B and 201C to be connected to this input part 21 in common are provided and to respectively scramble the plural scramble signals while being correspondent to those signals, and an output part 23 connected to the plural descramblers in common, and identifying and switching circuits 202A1, 202A2, 202B and 202C are provided to induce the output to the output part 23 in the case of enabling the descramble operations and to inhibit the signal output in the case of disabling the operations. Therefore, the scramble signals are identified and only when the descramble operations are enabled, the signal outputs are induced. Thus, the number of channels for the scramble signals can be increased.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A. Industrial field of application B. Outline of the invention Conventional technology Examples of means and actions for solving the problems to be solved by the invention (Fig. 1) Effects of the invention A. Industrial field of application The present invention is applicable to, for example, televisions. The present invention relates to a scrambled signal receiving device used when transmitting a scrambled signal using a communication satellite.

B. Summary of the Invention The present invention relates to a scrambled signal receiving device in which a plurality of descramblers for descrambling a plurality of scrambled signals are connected in common, and a scrambled signal is identified and a descrambling operation is possible only when the descrambling operation is possible. By allowing the signal output to be derived, it is possible to increase the number of scrambled signal channels, and to broadcast more scrambled signals.

C. Prior Art For example, when transmitting a television signal using a communication satellite, it has been considered to scramble the signal in order to prevent unauthorized viewing by non-subscribers.

In this case, for scrambling the video signal, a so-called line shuffling technique has been proposed, for example, as disclosed in Japanese Patent Laid-Open Nos. 60-256286-8.

However, if only scrambling is performed as described above, there is a risk that the scrambled data will be decoded without permission and may be viewed and viewed relatively easily.

Therefore, it is possible to change the scramble key signal (SDA) from time to time, and to transmit this key signal together with a scrambled signal.Furthermore, this key signal is also scrambled, and the data used to descramble this key signal is considered. The idea was to send them together. According to this, unauthorized decoding of the scramble can be made considerably difficult.

However, when such a method is adopted, for example when restarting the device after an arbitrary period of inactivity or when switching channels, the key signals and data are usually saved from the last one. This caused a problem in that incorrect descrambling was performed, erroneous data was generated, and normal reception was no longer possible.

In response to this problem, the applicant of the present application has previously proposed a scrambling system (Japanese Patent Application No. 2-35722-6) designed to prevent the occurrence of such malfunctions.

That is, FIG. 3 shows the system configuration from transmission to reception, in which (100) indicates the transmitting side device and (200) the receiving side device as a whole.

In this figure, (1) is an input terminal for a video signal, and the video signal from this input terminal (1) is supplied to a scrambling circuit (2) such as the above-mentioned line shuffling, and the scrambled video signal is output. It is supplied to the transmitting circuit (3). Further, (4) is an input terminal for an audio signal, and this audio signal is supplied with a PCM audio signal sampled at, for example, 48 kHz and quantized at 16 bits. The audio signal from this input terminal (4) is sent to a scramble circuit (5).
The scrambled audio signal is sent to a multiplexing circuit (
6) to the transmitting circuit (3).

Furthermore, (7) is a key signal generation circuit, and a predetermined key signal that changes from time to time from this generation circuit (7)
is supplied to the scrambling circuit (2) as data (SDA) for scrambling the video signal.

At the same time, this key signal KS (=SDA) is supplied to an adder (exclusive OR circuit) (8), where it is scrambled by arbitrary bit inversion, etc., and this scrambled key signal is multiplexed. It is supplied to the circuit (6).

In addition, the key signal from the generation circuit (7) is 4. Ks is supplied as the first M value to random signal generation circuits (9) (10) such as M series, respectively, and these generation circuits (9) (10)
A random signal from is selected by the switch (11),
It is supplied to an audio signal scrambling circuit (5) and an adder (8). Note that the key signal is 3. 4 is the switch (11
), the values are changed sequentially while they are not selected. As a result, the audio signal and the key signal are scrambled by 5.

Furthermore, the switching of the switch (11) is performed by the switching signal generation circuit (1
2), and a flag (identification signal) indicating this switching state is supplied to the multiplexing circuit (6). Note that this switching is performed at intervals that allow for the transmission of a key signal KIK4, which will be described later.

Further, (13) is a means for generating information data, and this generating means (13), which is made up of, for example, a computer, generates broadcast data such as channel numbers, and individual information such as the subscriber number and contracted channel number of each subscriber. Included subscriber data (reception registration number), tamper-proof ID, error correction code, etc. are generated.

Information data from this generating means (13) is supplied to an information signal string forming circuit (14). Further, to the key signal from the above-mentioned generation circuit (7), and to the below-mentioned 2. K.

is supplied to the forming circuit (14).

In this forming circuit (14), information signal strings are formed, for example, in two formats as described below. That is, FIG. 4A shows the format of a common information signal sequence, and from the beginning (left) side of the time series, for example, the following 8 bits are a header ID indicating that common information, and each 16 bit key signal K r , K t, 3 to each 32-bit key signal. , 4-bit tamper-proof ID
, 4-bit channel number, etc., and 24 bits at the end.
A bit error correction code is provided, making the total 256 bits. In addition, Figure B shows the format of the individual information signal string, and the same header ID (for example, 8 bits from the beginning (left) side of the time series indicating that the following is individual information) is shown.
, 22-bit subscriber number, 4-bit tamper-proof ■D
, 192 bits of individual information for each subscriber, etc. are provided, and a 24-bit error correction code is provided at the end, making the total 25 bits.
It is set to 6 bits.

The common information signal string and the individual information signal string are respectively supplied to adders (exclusive OR circuits) (15) and (16). Further, the key signal KI from the generation circuit (force) is supplied to the random signal generation circuit (17) as an initial value, and the random signal from this generation circuit (17) is input to the adder (
15) Supplied to (16). The signal from this adder (16) is supplied to the adder (18), and the key signal from the generation circuit (7) is supplied to the random signal generation circuit (
19) as an initial value, and this generating circuit (19)
A random signal from is fed to an adder (18).

As a result, a key signal K is included in the common information signal string.

The individual information signal sequence is scrambled using the key signals KI and 2. In reality, in the common information signal string, scrambling is performed on the header and the key signal, on the key signal excluding 2, and onwards, and in the individual information signal string, the key signal is added on the part excluding the header, and 2 is being scrambled. Further, the values of these key signals and 2 are changed sequentially every 5 seconds, for example.

These scrambled common information signal sequences and individual information signal sequences are supplied to a multiplexing circuit (20), and are time-division multiplexed, for example, at a ratio of nine individual information signal sequences and one common information signal sequence. Ru. This multiplexed signal is supplied to a multiplexing circuit (6).

In this multiplexing circuit (6), for example, the following multiplexing is performed. In other words, in this device,
PCM audio signals are transmitted in a format that conforms to so-called B-mode audio on broadcasting satellites. Therefore, Fig. 5 shows a bit interleave matrix of l frame transmitted at a period of 1 ms, and this matrix consists of 32
It consists of 64 rows and columns. Here, the first and second columns are areas for control codes and range bits that indicate frame synchronization, audio signal mode, etc., and the following third to 50th columns are PCM areas.
This area is considered to be an area for audio signals. Furthermore, the 58th to 64th columns are used as error correction code areas, and the 51st to 57th columns between these are used as independent data areas for B-mode audio.

Therefore, in the above-mentioned multiplexing circuit (6), the key signal scrambled in the area of the 51st column to the 57th column is
, a flag indicating the switching state of the switch (11), and a common information signal sequence or individual information signal sequence can be multiplexed. Note that the common information signal string and the individual information signal string are transmitted, for example, 8 bits per frame, and the whole is transmitted over 32 frames.

The scrambled video signal and the scrambled and multiplexed audio signal as described above are sent to the transmission circuit (3).
and transmitted to the receiving device (200) using, for example, a communication satellite (not shown).

Therefore, in this receiving side device (200), the video signal received by the receiving circuit (21) is first supplied to the descrambling circuit (22), the above-mentioned line shuffling is returned to the original state, and the video signal is sent to the output terminal (23). is taken out.

Furthermore, the audio signal received by the receiving circuit (21) is supplied to the descrambling circuit (25) through the separating circuit (24), where any bit inversion etc. is restored to the original state and the output terminal (26
) is taken out.

Furthermore, a signal corresponding to the key signal is separated in a separation circuit (24), and this signal is supplied to a subtracter (exclusive OR circuit) (27) to perform descrambling such as arbitrary bit inversion. It will be done. The key signal K restored by this descrambling.

(=SDA) is supplied to the descrambling circuit (22).

Further, a separation circuit (24) separates signals corresponding to the above-mentioned common information signal string and individual information signal string, and these signals are supplied to a subtracter (28) and a memory (29) for the key signal KI. At the same time, the signal from the separation circuit (24) is supplied to the header detection and timing generation circuit (30), which corresponds to the period of the key signal KI immediately after the header ID of the common information from this generation circuit (30) is detected. The key signal is supplied to the memory (29), and the key signal is supplied to the memory (29).
written to. Furthermore, the key signal written in this memory (29) is supplied to the random signal generation circuit (31) as an initial value, and when the common information Heshida ID from the generation circuit (30) is detected. The generation circuit (31
), and the random signal generated during this period is supplied to the subtractor (28). As a result, the second and subsequent signals are descrambled for the key signal of the common information signal string.

The signal from this subtracter (28) is supplied to a subtracter (32) and a key signal Kt memory (33). At the same time, after the header ID of the common information from the generation circuit (30) is detected, a signal corresponding to period 2 is sent to the key signal from the memory (30).
3), and the key signal 2 is written into the memory (33). 2 is supplied to the key signal written in this memory (33) as an initial value to the random signal generation circuit (34), and addition is made when the header ID of the individual information from the generation circuit (30) is detected. A signal corresponding to the period after the user number is supplied to the generating circuit (34), and a random signal generated during this period is supplied to the subtracter (32).

As a result, the signals after the subscriber number in the individual information signal string are descrambled.

The signal from this subtracter (32) is supplied to a data latch and error correction circuit (memory) (35).

The signal from the force generation circuit (30) is transmitted to the memory control circuit (36).
), and the signal from this control circuit (36) is supplied to the circuit (35). As a result, 3. 4. Data such as the tamper-proof ID, channel number, subscriber number, tamper-proof ID, and individual information for each subscriber are latched in the circuit (35).

Further, this circuit (35) performs data error correction using the error correction code at the end of each information signal string. When this error correction is completed and there is no data error, a signal indicating this is supplied to the control circuit (36), a signal from this control circuit (36) is supplied to the memory (37), and the circuit Each data latched in (35) is transferred to memory (37).

This causes each data to be written into the memory (37).

Therefore, for these data, the subscriber number is first read out from the generation circuit (30) to the authorization circuit (3) at a predetermined timing.
8) is supplied with a decoder identification number (registration number) provided independently for each receiving device (200) from its storage means (39), and this identification number and the above-mentioned subscriber number (reception registration number) are supplied. They are compared, and when they match, the individual information for each subscriber is determined to be valid, and the information provided here, such as the contract channel number, is extracted and saved. Then, when the channel number in the common information signal sequence and the contracted channel number match, the descrambling operation is approved. Further, the tamper-proof ID provided for each of the data of the common information signal string and the data of the individual information signal string in the memory (37) is read out to the mismatch detection circuit (40) at the timing from the generation circuit (30), and the mismatch is detected. When detected, the contents of the memory (37) are reset so that all channels are in an unsubscribed state.

When the descrambling operation described above is approved, the key signal from the memory (37) is K.

are respectively supplied to the random signal generation circuits (41) (42) as initial values, and the frame synchronization signal from the separation circuit (24) is detected by the detection circuit (43) and supplied to the generation circuits (41) (42). be done. The random signal generated thereby is selected by the switch (44) and supplied to the descrambling circuit (25) and the subtracter (27), and a flag (identification signal) is the switching signal generation circuit (45)
The signal from the generating circuit (45) controls switching of the switch (44).

The video signal and PCM audio signal thus received are descrambled.

Furthermore, in this device, for example, a memory control circuit (
36), the data latch start timing signal supplied to
, are controlled so that they are not supplied until they are written into the memories (29) and (33). This causes the key signals K + and K z to be stored in the memory (29) (33)
Writing of each subscriber's individual information, etc. to the memory (37) is prohibited until the individual information signal string is accurately descrambled, and the descrambling operation is thereby approved. Such operations are prohibited.

That is, in the above-mentioned device, when the device is restarted after an arbitrary pause period or when switching channels, the previous and final key signals K + , K z are stored in the memory (29) (33). Therefore, there is a risk that the individual information signal string may be descrambled with an incorrect key signal. In that case, there is a possibility that the subscriber number descrambled by this erroneous key signal coincidentally matches the identification number of the device, and in this state, erroneous individual information for each subscriber may be written to the memory (37). There was a risk of getting caught. And when such incorrect individual information of each contractor is written,
The descrambling of the channel to which you originally subscribed will no longer be approved, and you will not be able to view the desired channel.Also, each receiving device usually transmits the corresponding individual information signal string about once an hour. In the worst case scenario, you will not be able to watch the desired channel for nearly an hour.

In contrast, the above-described device can prevent such malfunctions from occurring.

As mentioned above, the possibility that the subscriber number descrambled with the wrong key signal matches the device identification number data is extremely small (for example, the probability is about 1 in 10 million, but the system described above For example, it is assumed that up to 24 million receiving devices will be installed, and in that case, if the above-mentioned probability exists each time a device is restarted or a channel is switched, the number of malfunctions of the entire system would be quite large. On the other hand, the above-mentioned system is for providing television programs and the like to subscribers for each channel for a fee, and in this case, the above-mentioned malfunction must never occur.

Therefore, according to the above-mentioned device, the approval of descrambling is prohibited until the data for descrambling the individual information signal string is detected, so that malfunctions may occur due to incorrect data generated due to misunderstanding of the individual information signal string. It is possible to prevent this from occurring, and it is possible to receive a good scrambled signal with a simple configuration.

In addition, in the above-mentioned device, 3. Scrambling is performed by arbitrarily switching the ``-'' to ``-'' to make unauthorized deciphering extremely difficult.

Further, by providing the key signal 2 in the scrambled key signal of the individual information signal string in the scrambled information, the confidentiality of the individual information signal string is made extremely high.

Furthermore, by providing a tamper-proof ID, unauthorized viewing is effectively prohibited.

Furthermore, by latching descrambled data once and transferring it to memory only when there are no errors, the risk of malfunction is greatly reduced.

D. Problems to be Solved by the Invention However, in the above-mentioned system, each broadcast channel is assigned an individual channel number, which is used to approve the descrambling operation. For this reason, the number of channels that can be broadcast is limited by this channel number, and if this is set to 4 pintos as described above,
It could only be broadcast on 16 channels.

On the other hand, for example, the above-mentioned communication satellites are capable of broadcasting more channels.

This application was made in view of these points, and is intended to enable broadcasting of more channels with a simple configuration.

E. Means for Solving the Problems The present invention includes an input section (receiving circuit (21)) that receives a plurality of different scrambled signals transmitted through the same transmission path, and a receiver circuit (21) that is commonly connected to this input section and that receives a plurality of scrambled signals. A plurality of corresponding descramblers (201Al) (201A and (201B)) for respectively scrambling the scrambled signals of
201C), an output section (output terminal (23), etc.) commonly connected to the plurality of descramblers, and a descrambler that identifies the scramble signal from the input section provided in each of the plurality of descramblers and performs a descrambling operation. an identification switching circuit (202A I) that derives an output to the output section when possible, and prohibits signal output to the output section when it is impossible;
202Az) (202B) (202C).

F Effect According to this, a plurality of descramblers each descramble a plurality of scrambled signals are connected in common,
By identifying the scrambled signal and deriving the signal output only when descrambling is possible, it is possible to increase the number of scrambled signal channels and broadcast more scrambled signals. .

G Embodiment In FIG. 1, the video signal received by the receiving circuit (21) is transmitted to a plurality of descramblers (201AI)
t) (201B) and (201C).

Here, the descrambler (201^+) (201A) has the same configuration as the descrambling circuit (22) and the separation circuit (24) described above, and the descrambler (20iB) (201C). ) may correspond to other types of scramble signals, such as intra-line shuffling or a combination of intra-line shuffling and line shuffling.

These descramblers (201A, ) (201A,
) (201B) and (201C), respectively, are transmitted to the signal switching circuit (20
2A, ) (202^t) (202B) (202
C) and these descramblers (2
01A, ) (201Ari (201B) (20
1C), it is identified whether each descrambling operation is enabled or not, and these identification signals are sent to the signal switching circuit (2024, ) (2028z) (202B).
(202C). Then, when these identification signals are being output, the descrambler (201Aυ(2
01az) (201B) The signal from (201C) is derived, and the signal switching circuit (202A I) (202A Ri (202
B) The operation of (202C) is controlled. These signal switching circuits (202A,) (202A,) (202B)
(202C) and other signals are commonly led out to the output terminal (23) and the like.

That is, in this device, the descrambler (20]A
υ(201A2) (201B) (201C) TE can only enable the descrambling operation with corresponding scramble signals of respective types. Therefore, even if the number of channels that can be broadcast using one scrambling method is limited as described above, by changing the scrambling method for each limited number of channels, it is possible to broadcast more channels. can be made possible.

Furthermore, FIG. 2 shows, for example, the above-mentioned descrambler (201
A,) (201A,) shows the main parts of the entire system, and a specific example will be explained below using this drawing.The parts corresponding to the scramble system explained in the conventional technology are the same. Duplicate explanations will be omitted by adding symbols.

In this figure, on the transmitter (100) side, an adder (51) is provided in the signal path from the multiplexing circuit (6).

Further, the timing signal corresponding to the period of the above-mentioned independent data from this multiplexing circuit (6) is transmitted to the random signal generating circuit (
At the same time, an arbitrary system number (ship) corresponding to the descrambler (201A,) (201A,) from the setting circuit (53) is supplied to the generating circuit (52) as an initial value.
2), and the random signal from this generating circuit (52) is taken out only during the independent data period by an anti-game (54) and supplied to an adder (51). Further, an error correction code is added to the signal from the adder (51) in an error correction circuit (55), and the signal is supplied to the transmission circuit (3).

On the other hand, on the receiving device (200) side, the receiving circuit (200)
The signal from 1) is supplied to the error correction circuit (61) to perform error correction, and the signal from this error correction circuit (61) is supplied to the subtracter (62), and the above-mentioned independent data period The signal is supplied to a detection circuit (63) that detects the signal.

The timing signal from this detection circuit (63) is supplied to the random signal generation circuit (64), and the setting circuit (
Descrambler (201A,) from (201
The system number (A,) corresponding to A is the generating circuit (64
), and the random signal from this generating circuit (64) is extracted only during the independent data period by an anti-game (66) and is supplied to a subtracter (62). The signal from this subtracter (62) is then supplied to the separation circuit (24).

Therefore, in this device, the system number (A,...) from the setting circuit (53) on the transmitting device (100) side and the system number (A,...) from the setting circuit (63) on the receiving device (200) side.
A, ) match, the subsequent operation is the same as normal descrambling. On the other hand, if the system numbers (8) do not match, the signals supplied to the separation circuit (24) will be random, and for example, the header detection and timing generation circuit (30) will detect various headers, etc. Detection becomes impossible. Therefore, this generation circuit (3
For example, the video signal descrambling circuit (22)
Signal switching circuit (202A1) provided on the output side of (
202Az), and the signal switching circuit (202Aυ(202Az) is connected so that the output during this period becomes high impedance.
Az) operations are controlled.

As a result, for example, a different system number (A,...) can be set for each of the 16 channels mentioned above, and transmission can be performed.
By providing descramblers (201AI) (201az) to which respective system numbers (80) are set on the receiving side, more scrambled signals can be broadcast.

Thus, according to the above-mentioned device, a plurality of descramblers each descramble a plurality of scrambled signals are connected in common, and a signal output is derived only when a scrambled signal can be identified and a descrambling operation is possible. This makes it possible to increase the number of scrambled signal channels and broadcast more scrambled signals.

In the above-mentioned device, the audio signal descrambler circuit (25) is provided with a configuration that prohibits output when descrambling is not performed normally for the purpose of protecting the rear-stage speakers, etc. signal switching circuit (20
2A, ) (202A2) usually only needs to be provided on the output side of the video signal descrambling circuit (22).

In addition, the descrambler (201A,) (201^yo) can be used with the same configuration except for the system number (80), but this is different from, for example, the random signal generation circuit (9) (10 )...(41) By changing the parameters of the M series such as (42), it is possible to effectively prevent eavesdropping due to unauthorized tampering of system numbers, etc.

Further, according to the above-mentioned device, a descrambler (201B
) (201C), even if the scrambling format is different, the signal transmission format is the same and the receiving circuit (201C) is the same.
Any signal that can be received under 1) can be commonly incorporated into one device. In that case, if each descrambler is implemented as an LSI, a terminal for outputting the detection signal of each header, etc., and a control terminal for making the output of signals other than the detection signal high impedance are provided for each LSI. ,
By connecting these terminals, the above-described device can be easily realized.

H Effects of the Invention According to this invention, a plurality of descramblers that descramble a plurality of scrambled signals are connected in common, and a signal output is derived only when a descrambling operation is possible by identifying a scrambled signal. By doing this, it has become possible to increase the number of scrambled signal channels, and it has become possible to broadcast more scrambled signals.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an example of a scramble signal reception device according to the present invention, and FIG. 2 is a configuration diagram of an example of an entire system including main parts of the scramble signal reception device according to the present invention.
Fig. 3 is a diagram showing the configuration of the entire system including a scramble signal receiving device, Fig. 4 is a diagram showing the format of the transmitted information signal sequence, and Fig. 5 is a diagram showing the bit interleave matrix of the PCM audio signal. It is. (21) is the receiving circuit, (201AI) (201A
(201B) (201C) is a descrambler, (20
2A, ) (202At) (202B) (20
2C) is a signal switching circuit, and (23) is an output terminal. Agent Hidemori Matsukuma signal t77m circuit 1 Matakura 8J5.16 +X adder 1 device 23.26

Claims (1)

[Claims] An input section that receives a plurality of different scramble signals transmitted through the same transmission path; and a corresponding plurality of input sections that are commonly connected to this input section and that descramble the plurality of scramble signals, respectively. a descrambler, an output section commonly connected to the plurality of descramblers, and an output section provided in each of the plurality of descramblers to identify the scramble signal from the input section and when a descrambling operation is possible. and an identification switching circuit that derives an output from the output section and prohibits signal output to the output section when it is impossible.