JPH0440849B2 - - Google Patents
Info
- Publication number
- JPH0440849B2 JPH0440849B2 JP63070548A JP7054888A JPH0440849B2 JP H0440849 B2 JPH0440849 B2 JP H0440849B2 JP 63070548 A JP63070548 A JP 63070548A JP 7054888 A JP7054888 A JP 7054888A JP H0440849 B2 JPH0440849 B2 JP H0440849B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- palladium
- laminated ceramic
- layer
- chip component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Ceramic Capacitors (AREA)
- Thermistors And Varistors (AREA)
- Coils Or Transformers For Communication (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
〔産業上の利用分野〕
本発明は積層セラミツクチツプ部品に関し、特
にハイブリツドIC基板等高密度実装に供される
積層セラミツクチツプ部品に関する。
〔従来の技術〕
近年、電子装置、電子機器の小型化及びトータ
ルコストダウンを目的としてハイブリツドIC化
の進展、部品実装の高密度化が加速されている。
これに伴ない電子回路基板の高密度配線ならびに
搭載部品のチツプ化が必要不可欠の要素となつて
いる。
一方ハイブリツドIC基板の高密度配線の進展
に伴ない従来より部品実装後、搭載部品を含め基
め板表面にエポキシ樹脂、シリコーン樹脂等をオ
ーバーコートし、耐湿性能の向上、基板面配線間
あるいはチツプ部品端子電極等に用いられている
銀系材料のマイグレーシヨン防止を図つている。
さらにハイブリツドIC化に伴ない小型、薄型
でかつ表面実装可能なチツプ型部品として特に従
来より積層タイプのセラミツクチツプ部品として
コンデンサ、インダクタ、バリスタ等が多量に搭
載されている。これらの積層セラミツクチツプ部
品の構造としては第4図に示すように、セラミツ
ク焼結体1、内部電極2及び外部電極5から構成
される。これらの構成材料は内部電極2としてパ
ラジウム・主成分、外部電極15としてはガラス
フリツトを含む銀−パラジウム系金属が基本であ
る。積層化することにより、小型形状に高性能を
付与しており、今後とも積層数、すなわちセラミ
ツク焼結体1内の内部電極2の枚数も10枚程度か
ら20〜50枚程度へ増加しつつある。
〔発明が解決しようとする課題〕
上述した従来の積層セラミツクチツプ部品はハ
イブリツドIC基板、高密度電子回路基板上に搭
載後、コーテイング樹脂にオーバーコートされ
て、各種電子機器、装置に組込まれる。特にオー
バーコート樹脂が加熱硬化型シリコーン材の場合
には積層セラミツクチツプ部品の劣化を経験し
た。これは加熱硬化型シリコーンから硬化反応時
に発生した水素ガスが従来の積層セラミツクチツ
プ部品の構成要素である外部電極5の成分である
パラジウム金属に吸収され、これを径由して内部
電極2の主成分であるパラジウムあるいは白金金
属の吸蔵され、体積膨張によりセラミツク焼結体
1の破壊、すなわち積層セラミツクチツプ部品の
クラツクに至る。いわゆるパラジウムあるいは白
金金属の水素吸収現象により積層セラミツク部品
の信頼性低下につながるという欠点がある。
本発明の目的は、水素ガス放置下あるいは加熱
硬化型シリコン樹脂によりオーバーコートされる
使用環境下において水素吸収現象による信頼性劣
化を抑制できるセラミツク焼結体内に形成された
パラジウム、白金を主成分とする導電性金属の内
部電極を有する積層セラミツクチツプ部品を提供
することにある。
〔課題を解決するための手段〕
本発明の積層セラミツクチツプ部品は、セラミ
ツク焼結体とこのセラミツク焼結体内に複数枚形
成され、かつ交互にその一端部が外部に露出され
たパラジウムを主成分とする内部電極と、該内部
電極の露出端を電気的に接続する外部電極層とを
備える積層セラミツクチツプ部品において、前記
外部電極層がパラジウム、白金を含まない少くと
も1つの導電性金属被膜層を含んで構成される。
本発明によれば、水素ガスを発生する使用環境下
で、積層セラミツクチツプ部品の内部電極層へ水
素ガスが吸収誘引されるのを防止することができ
る。
また、本発明はセラミツクコンデンサ、セラミ
ツクインダクタ、セラミツクバリスタに適用で
き、また、外部電極層としてセラミツク焼結体面
と内部電極端とを接続する接続界面層と、その接
続界面層上に形成されたパラジウム、白金を含ま
ない少なとも1つの導電性金属被膜層を含んで構
成することにより効果的に実施できる。
〔実施例〕
次に、本発明について図面を参照して説明す
る。
第1図は本発明の第1の実施例の概略断面図で
ある。セラミツク焼結体1の内部に複数枚形成さ
れ、かつ交互にその一端部が外部に露出された内
部電極2を有する積層セラミツクチツプにおいて
ガラスフリツトを含む銀ペーストを塗布焼付した
接続界面層3の上部に導電性金属被膜層4を形成
する。導電性金属被膜層4の要件としては水素ガ
スの吸収性を示すパラジウム、白金を含まない金
属をスパツタ、メツキにより形成する。本実施例
ではニツケルメツキ5〜10μm付与した。第2
図、第3図は本発明の第2、第3の実施例の概略
断面図である。
第2図においては、第1の実施例の外部電極、
すなわち接続界面層3、導電性金属被膜層4の上
に更に外部電極層5を付加したもので接続特性等
を改善できる。また第3図ではスパツタや蒸着に
よりパラジウム、白金を含まない金属を直接付着
させ導電性金属被膜層4を第1層に形成した例で
ある。
次に、本発明の積層セラミツクチツプ部品を積
層セラミツクコンデンサにて試作し以下の試験を
行なつた。供試試料は長さ3.2mm、幅1.6mm、厚さ
1.0mmの外形形状を有し、内部電極材としてパラ
ジウムを用い、本発明例の外部電極としてガラス
フリツト含有銀層を接続界面層とし、次いで電気
メツキによりニツケル層を導電性金属被膜層とし
た第1図に示す構造のチツプ部品と、従来例の外
部電極としてガラスフリツトを含む銀85%−パラ
ジウム15%とし第4図の構造のチツプ部品とを用
いた。試験条件としては(1)供試サンプルをセラミ
ツク基板上に半田付け実装後、加熱硬化型シリコ
ーン樹脂をコーテイング後、温度85℃にて500時
間放置後の静電容量を測定し初期静電容量に対す
る変化率30%以上のものを不良とする。次に(2)供
試サンプルを1atm、室温の水素ガス中に48時間
放置し、その後サンプルの外観を10倍の拡大鏡で
観察し、クラツク、割れ等の不良個数を確認し
た。試験結果を第1表に示す。
[Industrial Application Field] The present invention relates to a laminated ceramic chip component, and particularly to a laminated ceramic chip component used for high-density packaging such as a hybrid IC board. [Background Art] In recent years, the development of hybrid ICs and the increase in the density of component mounting have been accelerated with the aim of downsizing and total cost reduction of electronic devices and equipment.
Along with this, high-density wiring of electronic circuit boards and chipping of mounted components have become essential elements. On the other hand, with the development of high-density wiring on hybrid IC boards, conventionally after mounting components, the surface of the board, including the mounted components, is overcoated with epoxy resin, silicone resin, etc. This is intended to prevent migration of silver-based materials used in component terminal electrodes, etc. Furthermore, with the advent of hybrid ICs, capacitors, inductors, varistors, etc., are increasingly being mounted as small, thin, and surface-mountable chip-type components, especially laminated ceramic chip components. As shown in FIG. 4, the structure of these laminated ceramic chip parts includes a ceramic sintered body 1, internal electrodes 2, and external electrodes 5. The main component of these materials is palladium for the internal electrodes 2, and a silver-palladium metal containing glass frit for the external electrodes 15. By laminating, high performance is imparted to a compact shape, and the number of laminated layers, that is, the number of internal electrodes 2 in the ceramic sintered body 1, will continue to increase from about 10 to about 20 to 50. . [Problems to be Solved by the Invention] The above-described conventional laminated ceramic chip components are mounted on a hybrid IC board or a high-density electronic circuit board, then overcoated with a coating resin and incorporated into various electronic devices and devices. In particular, when the overcoat resin was a heat-curable silicone material, deterioration of laminated ceramic chip parts was experienced. This is because the hydrogen gas generated during the curing reaction from heat-curing silicone is absorbed by palladium metal, which is a component of the external electrode 5, which is a component of conventional laminated ceramic chip parts, and is passed through this to the main part of the internal electrode 2. The component palladium or platinum metal is occluded and its volume expands, leading to destruction of the ceramic sintered body 1, that is, cracking of the laminated ceramic chip component. A drawback is that the so-called hydrogen absorption phenomenon of palladium or platinum metals leads to a decrease in the reliability of laminated ceramic parts. The object of the present invention is to provide a ceramic sintered body containing palladium and platinum as main components, which can suppress reliability deterioration due to hydrogen absorption phenomenon under hydrogen gas storage or overcoated with heat-curing silicone resin. An object of the present invention is to provide a laminated ceramic chip component having internal electrodes made of conductive metal. [Means for Solving the Problems] The laminated ceramic chip component of the present invention consists of a ceramic sintered body and a plurality of pieces formed inside the ceramic sintered body, the main component of which is palladium, one end of which is alternately exposed to the outside. A laminated ceramic chip component comprising an internal electrode and an external electrode layer electrically connecting exposed ends of the internal electrode, wherein the external electrode layer is at least one conductive metal coating layer that does not contain palladium or platinum. It consists of:
According to the present invention, it is possible to prevent hydrogen gas from being absorbed and attracted to the internal electrode layers of a laminated ceramic chip component in a usage environment where hydrogen gas is generated. Furthermore, the present invention can be applied to ceramic capacitors, ceramic inductors, and ceramic varistors, and also includes a connecting interface layer that connects the ceramic sintered body surface and the internal electrode end as an external electrode layer, and a palladium layer formed on the connecting interface layer. This can be effectively implemented by including at least one conductive metal coating layer that does not contain platinum. [Example] Next, the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a first embodiment of the invention. In a laminated ceramic chip having a plurality of internal electrodes 2 formed inside a ceramic sintered body 1 and having one end exposed to the outside alternately, a silver paste containing glass frit is applied and baked on the top of the connecting interface layer 3. A conductive metal coating layer 4 is formed. The conductive metal film layer 4 is formed by sputtering or plating of a metal that does not contain palladium or platinum and exhibits hydrogen gas absorbability. In this example, 5 to 10 μm of nickel plating was applied. Second
3 are schematic sectional views of second and third embodiments of the present invention. In FIG. 2, the external electrodes of the first embodiment,
That is, by adding an external electrode layer 5 on top of the connection interface layer 3 and the conductive metal coating layer 4, connection characteristics etc. can be improved. Further, FIG. 3 shows an example in which a metal not containing palladium or platinum is directly deposited by sputtering or vapor deposition to form the conductive metal coating layer 4 as the first layer. Next, a multilayer ceramic chip component according to the present invention was manufactured using a multilayer ceramic capacitor, and the following tests were conducted. The test sample is 3.2 mm long, 1.6 mm wide, and thick
The first electrode had an external shape of 1.0 mm, palladium was used as the internal electrode material, a silver layer containing glass frit was used as the connection interface layer as the external electrode of the example of the present invention, and then a nickel layer was formed as a conductive metal coating layer by electroplating. A chip component having the structure shown in the figure and a conventional chip component having the structure shown in FIG. 4 in which the external electrode was 85% silver and 15% palladium including glass frit were used. The test conditions are (1) After mounting the test sample on a ceramic board by soldering and coating with heat-curing silicone resin, the capacitance is measured after being left at a temperature of 85°C for 500 hours, and the capacitance is measured relative to the initial capacitance. Items with a change rate of 30% or more are considered defective. Next, (2) the test sample was left in hydrogen gas at 1 atm and room temperature for 48 hours, and then the appearance of the sample was observed with a 10x magnifying glass to confirm the number of defects such as cracks and breaks. The test results are shown in Table 1.
以上説明したように本発明はセラミツク焼結体
内に形成されるパラジウムあるいは白金を主成分
とする内部電極の露出端を電気的に接続する外部
電極層として、パラジウム、白金を含まない少く
とも1つの導電性金属被膜層を有することによ
り、(1)水素ガス放置下あるいは(2)加熱硬化型シリ
コン樹脂によりオーバーコートされる使用環境下
における積層セラミツクチツプ部品の水素吸収現
象による信頼性劣化を抑制できる効果がある。
As explained above, the present invention provides at least one layer that does not contain palladium or platinum as an external electrode layer that electrically connects the exposed ends of internal electrodes that are mainly composed of palladium or platinum and is formed inside a ceramic sintered body. By having a conductive metal coating layer, it is possible to suppress reliability deterioration due to the hydrogen absorption phenomenon of laminated ceramic chip parts under (1) exposure to hydrogen gas or (2) usage environments where they are overcoated with heat-curing silicone resin. effective.
第1図〜第3図は何れも本発明の積層セラミツ
クチツプ部品の実施例の概略断面図、第4図は従
来例の積層セラミツクチツプ部品の概略断面図で
ある。
1……セラミツク焼結体、2……内部電極、3
……接続界面層、4……導電性金属被膜層、5…
…外部電極層、15……外部電極。
1 to 3 are schematic cross-sectional views of embodiments of the laminated ceramic chip component of the present invention, and FIG. 4 is a schematic cross-sectional view of a conventional laminated ceramic chip component. 1... Ceramic sintered body, 2... Internal electrode, 3
... Connection interface layer, 4 ... Conductive metal coating layer, 5 ...
...External electrode layer, 15...External electrode.
Claims (1)
に複数枚形成され、かつ交互にその一端部が外部
に露出されたパラジウム、白金を主成分とする導
電性金属である内部電極と、前記内部電極の露出
端に電気的に接続される外部電極層とを備える積
層セラミツクチツプ部品において、前記外部電極
層がパラジウム、白金を含まない少くとも1つの
導電性金属層を含むことを特徴とする積層セラミ
ツクチツプ部品。 2 積層セラミツクチツプ部品がセラミツクコン
デンサ、セラミツクインダクタ、セラミツクバリ
スタであることを特徴とする特許請求の範囲第1
項記載の積層セラミツクチツプ部品。 3 外部電極層がセラミツク焼結体面と内部電極
の露出面との接続界面層と、該接続界面層上に形
成されたパラジウム、白金を含まない少くとも1
つの導電性金属被膜層とを含むことを特徴とする
特許請求の範囲第1項又は第2項記載の積層セラ
ミツクチツプ部品。[Scope of Claims] 1. A ceramic sintered body, and an interior made of a conductive metal mainly composed of palladium or platinum, which is formed in a plurality of sheets inside the ceramic sintered body, and one end of which is alternately exposed to the outside. A laminated ceramic chip component comprising an electrode and an external electrode layer electrically connected to an exposed end of the internal electrode, wherein the external electrode layer includes at least one conductive metal layer that does not contain palladium or platinum. A laminated ceramic chip component featuring: 2. Claim 1, characterized in that the laminated ceramic chip component is a ceramic capacitor, a ceramic inductor, or a ceramic varistor.
Laminated ceramic chip parts described in Section 1. 3. The external electrode layer includes a connecting interface layer between the surface of the ceramic sintered body and the exposed surface of the internal electrode, and at least one layer containing no palladium or platinum formed on the connecting interface layer.
3. A laminated ceramic chip component according to claim 1 or claim 2, characterized in that it comprises two conductive metal coating layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7054888A JPH01241809A (en) | 1988-03-23 | 1988-03-23 | Laminated ceramic chip parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7054888A JPH01241809A (en) | 1988-03-23 | 1988-03-23 | Laminated ceramic chip parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01241809A JPH01241809A (en) | 1989-09-26 |
| JPH0440849B2 true JPH0440849B2 (en) | 1992-07-06 |
Family
ID=13434682
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7054888A Granted JPH01241809A (en) | 1988-03-23 | 1988-03-23 | Laminated ceramic chip parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01241809A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03175711A (en) * | 1989-12-04 | 1991-07-30 | Murata Mfg Co Ltd | Chip type electronic component |
| CN105679478B (en) * | 2016-01-27 | 2018-07-03 | 深圳顺络电子股份有限公司 | A kind of small size slice heat sensitive resistor and preparation method thereof |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4168520A (en) * | 1978-01-06 | 1979-09-18 | Sprague Electric Company, Inc. | Monolithic ceramic capacitor with free-flowed protective coating and method for making same |
| JPS54156158A (en) * | 1978-05-30 | 1979-12-08 | Matsushita Electric Industrial Co Ltd | Method of producing laminated ceramic varister |
| JPS54157296A (en) * | 1978-06-02 | 1979-12-12 | Tdk Corp | Electrode structure and the manufacturing method |
| JPS5558031A (en) * | 1978-10-26 | 1980-04-30 | Youtarou Fujita | Automatic descending apparatus in automatic pruning machine |
| JPS5571016A (en) * | 1978-11-22 | 1980-05-28 | Tdk Electronics Co Ltd | Method of manufacturing laminated porcelain capacitor |
| JPS5866321A (en) * | 1981-10-15 | 1983-04-20 | 松下電器産業株式会社 | Method of producing laminated ceramic condenser |
| JPS58182811A (en) * | 1982-04-21 | 1983-10-25 | 株式会社日立製作所 | Capacitor mounting structure |
| JPS5969907A (en) * | 1982-10-15 | 1984-04-20 | 松下電器産業株式会社 | Multilayer ceramic capacitor for temperature compensation |
| JPS59202618A (en) * | 1983-04-30 | 1984-11-16 | 松下電器産業株式会社 | Method of producing laminated ceramic condenser |
| JPS60120510A (en) * | 1983-12-02 | 1985-06-28 | 松下電器産業株式会社 | Method of forming terminal electrode of laminated ceramic capacitor |
-
1988
- 1988-03-23 JP JP7054888A patent/JPH01241809A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01241809A (en) | 1989-09-26 |
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