JPH0441615U - - Google Patents

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Publication number
JPH0441615U
JPH0441615U JP8275990U JP8275990U JPH0441615U JP H0441615 U JPH0441615 U JP H0441615U JP 8275990 U JP8275990 U JP 8275990U JP 8275990 U JP8275990 U JP 8275990U JP H0441615 U JPH0441615 U JP H0441615U
Authority
JP
Japan
Prior art keywords
resolution
pulse
low
phase
pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8275990U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8275990U priority Critical patent/JPH0441615U/ja
Publication of JPH0441615U publication Critical patent/JPH0441615U/ja
Pending legal-status Critical Current

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  • Transmission And Conversion Of Sensor Element Output (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す図である。 図面中、3はバツクアツプ電池動作部、5は高
分解能磁気デイスク、6と7は中分解能磁気デイ
スク、8は低分解能磁気デイスク、9〜13は磁
気抵抗素子、16はパルスカウンタ回路、17は
演算回路、18はシリアル通信回路、25はバツ
クアツプ電池である。
FIG. 1 is a diagram showing an embodiment of the present invention. In the drawing, 3 is a backup battery operation unit, 5 is a high-resolution magnetic disk, 6 and 7 are medium-resolution magnetic disks, 8 is a low-resolution magnetic disk, 9 to 13 are magnetic resistance elements, 16 is a pulse counter circuit, and 17 is an operation unit. 18 is a serial communication circuit, and 25 is a backup battery.

Claims (1)

【実用新案登録請求の範囲】 主電源供給時にA相、B相及びZ相のパルスを
発生させるための高分解能パルスパターンが装着
された高分解能回転デイスク及びこのパルスパタ
ーンを検出する高分解能パルス検出センサと、 高分解能回転デイスクよりも周波数が1/2n−
の粗いA相及びB相パルスを発生させるための
低分解能のパルスパターンが装着された低分解能
回転デイスク及びこのパルスパターンを検出する
低分解能パルス検出センサと、 主電源停電時においてもバツクアツプ電池によ
り常に動作し、低分解能パルス検出センサのA相
、B相パルスをアツプダウンカウントすることに
より低精度の絶対位置をカウントするパルスカウ
ンタ回路と、 高分解能回転デイスクと低分解能回転デイスク
の中間精度として、高分解能回転デイスクよりも
周波数が1/2i−1(i=2〜n−1)のn−2
個のパルスを発生させるための中分解能パルスパ
ターンが装着されたn−2個の回転デイスク及び
このパルスパターンを検出するn−2個の中分解
能パルス検出センサと、 主電源立上り時にパルスカウンタ回路により得
られる低精度の絶対位置カウント値と、高分解能
及び低分解能パルス検出センサの各A相パルス並
びに中分解能パルス検出センサのパルス群の合計
nビツトのバイナリパターンのパルスより得られ
る高精度相対位置から、高精度な絶対位置を算出
する演算回路と、 主電源立上り時に演算回路により得られる高精
度絶対位置をシリアル通信にて外部へ伝送するシ
リアル通信回路とを具備するインクリメンタル型
エンコーダ。
[Claims for Utility Model Registration] High-resolution rotary disk equipped with high-resolution pulse patterns for generating A-phase, B-phase, and Z-phase pulses when main power is supplied, and high-resolution pulse detection for detecting these pulse patterns. The frequency of the sensor is 1/2 n− than that of the high-resolution rotating disk.
A low-resolution rotary disk equipped with a low-resolution pulse pattern for generating 1 coarse A-phase and B-phase pulses, a low-resolution pulse detection sensor that detects this pulse pattern, and a backup battery that can be used even in the event of a main power outage. A pulse counter circuit that constantly operates and counts low-accuracy absolute positions by up-down counting the A-phase and B-phase pulses of a low-resolution pulse detection sensor, and an intermediate accuracy between a high-resolution rotating disk and a low-resolution rotating disk. n-2 whose frequency is 1/2 i-1 (i=2 to n-1) than the high-resolution rotating disk
n-2 rotary disks equipped with medium-resolution pulse patterns for generating pulses, n-2 medium-resolution pulse detection sensors for detecting these pulse patterns, and a pulse counter circuit when the main power is turned on. From the obtained low-precision absolute position count value and the high-precision relative position obtained from the A-phase pulses of the high-resolution and low-resolution pulse detection sensors and the binary pattern pulses of a total of n bits of pulse groups of the medium-resolution pulse detection sensor. , an incremental encoder equipped with an arithmetic circuit that calculates a highly accurate absolute position, and a serial communication circuit that transmits the highly accurate absolute position obtained by the arithmetic circuit to the outside via serial communication when the main power is turned on.
JP8275990U 1990-08-06 1990-08-06 Pending JPH0441615U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8275990U JPH0441615U (en) 1990-08-06 1990-08-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8275990U JPH0441615U (en) 1990-08-06 1990-08-06

Publications (1)

Publication Number Publication Date
JPH0441615U true JPH0441615U (en) 1992-04-08

Family

ID=31629854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8275990U Pending JPH0441615U (en) 1990-08-06 1990-08-06

Country Status (1)

Country Link
JP (1) JPH0441615U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000052426A1 (en) * 1999-02-26 2000-09-08 Mitsubishi Denki Kabushiki Kaisha Absolute value encoder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000052426A1 (en) * 1999-02-26 2000-09-08 Mitsubishi Denki Kabushiki Kaisha Absolute value encoder

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