JPH0441653U - - Google Patents
Info
- Publication number
- JPH0441653U JPH0441653U JP8329590U JP8329590U JPH0441653U JP H0441653 U JPH0441653 U JP H0441653U JP 8329590 U JP8329590 U JP 8329590U JP 8329590 U JP8329590 U JP 8329590U JP H0441653 U JPH0441653 U JP H0441653U
- Authority
- JP
- Japan
- Prior art keywords
- image
- raster
- scratches
- abnormalities
- objects
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005856 abnormality Effects 0.000 claims 2
- 230000010354 integration Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 1
Landscapes
- Analysing Materials By The Use Of Radiation (AREA)
Description
第１図は、本考案のブロツク図、第２図は本考
案の実施例におけるメモリ内容図、第３図は被検
査物の斜視図、第４図は本考案実施例の動作説明
図である。
１……Ｘ線源、２……Ｘ線ＴＶカメラ、３……
多値フレームメモリ、４……多値Σ演算回路、５
……多値Σ演算メモリ、６……２値化闘値発生回
路、７……２値化回路、８……２値フレームメモ
リ、９……２値Σ演算回路、１０……２値Σ演算
メモリ。
Fig. 1 is a block diagram of the present invention, Fig. 2 is a memory content diagram in an embodiment of the present invention, Fig. 3 is a perspective view of an object to be inspected, and Fig. 4 is an explanatory diagram of the operation of the embodiment of the present invention. . 1...X-ray source, 2...X-ray TV camera, 3...
Multi-value frame memory, 4... Multi-value Σ calculation circuit, 5
...Multi-valued Σ calculation memory, 6...Binary value generation circuit, 7...Binary conversion circuit, 8...Binary frame memory, 9...Binary Σ calculation circuit, 10...Binary Σ Arithmetic memory.
Claims (1)
異常を自動的に判定するために、画像の任意のエ
リアの多値画像積分を行い、この積分結果からラ
スター毎の２値化闘値レベルを求め、ラスター毎
にことなつた２値化レベルで画像を２値化するこ
とにより物体のキズ及びはんだ付部の異常の判定
を行うことを特徴とする上記画像処理装置。 In order to automatically determine scratches on objects and abnormalities in soldered parts using X-rays, etc., multilevel image integration is performed on arbitrary areas of the image, and the binarized threshold level for each raster is calculated from this integration result. The above-mentioned image processing device is characterized in that it determines scratches on objects and abnormalities in soldered parts by determining the image and binarizing the image at different binarization levels for each raster.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329590U JPH0441653U (en) | 1990-08-08 | 1990-08-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8329590U JPH0441653U (en) | 1990-08-08 | 1990-08-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0441653U true JPH0441653U (en) | 1992-04-08 |
Family
ID=31630841
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8329590U Pending JPH0441653U (en) | 1990-08-08 | 1990-08-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441653U (en) |
-
1990
- 1990-08-08 JP JP8329590U patent/JPH0441653U/ja active Pending
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