JPH0442080U - - Google Patents

Info

Publication number
JPH0442080U
JPH0442080U JP8463690U JP8463690U JPH0442080U JP H0442080 U JPH0442080 U JP H0442080U JP 8463690 U JP8463690 U JP 8463690U JP 8463690 U JP8463690 U JP 8463690U JP H0442080 U JPH0442080 U JP H0442080U
Authority
JP
Japan
Prior art keywords
hybrid
board
utility
scope
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8463690U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8463690U priority Critical patent/JPH0442080U/ja
Publication of JPH0442080U publication Critical patent/JPH0442080U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】
第１図乃至第３図は本考案の一実施例を示して
おり、第１図はハイブリツドＩＣの平面図、第２
図は同正面図、第３図はハイブリツドＩＣを搭載
した主回路基板の平面図である。第４図は従来型
のハイブリツドＩＣを搭載した主回路基板の平面
図である。 １１……ハイブリツドＩＣ、１２……基板、１
４…クリツプ端子、１５ａ……ソケツト、１５ｂ
……プラグ。

Claims (1)

    【実用新案登録請求の範囲】
  1. 基板上に入力信号用のコネクタを固設したこと
    を特徴とするハイブリツドＩＣ。
JP8463690U 1990-08-10 1990-08-10 Pending JPH0442080U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8463690U JPH0442080U (ja) 1990-08-10 1990-08-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8463690U JPH0442080U (ja) 1990-08-10 1990-08-10

Publications (1)

Publication Number Publication Date
JPH0442080U true JPH0442080U (ja) 1992-04-09

Family

ID=31633247

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8463690U Pending JPH0442080U (ja) 1990-08-10 1990-08-10

Country Status (1)

Country Link
JP (1) JPH0442080U (ja)

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