JPH0443015U - - Google Patents
Info
- Publication number
- JPH0443015U JPH0443015U JP8553590U JP8553590U JPH0443015U JP H0443015 U JPH0443015 U JP H0443015U JP 8553590 U JP8553590 U JP 8553590U JP 8553590 U JP8553590 U JP 8553590U JP H0443015 U JPH0443015 U JP H0443015U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- capacitor
- multilayer
- external electrode
- stacked
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Coils Or Transformers For Communication (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Filters And Equalizers (AREA)
Description
第１図は、本考案の一実施例の斜視図。第２図
は本実施例の等価回路図。第３図、第４図は本実
施例の要部の積層チツプコンデンサの積層組み立
て構造図および斜視図。第５図、第６図は本実施
例の要部の積層チツプインダクタの積層組み立て
構造図および斜視図、第７図は、可変コンデンサ
付積層チツプコンデンサの斜視図である。
１……可変コンデンサ、２……積層チツプコン
デンサ、３……積層チツプインダクタ、４Ａ，４
Ｂ……短絡端子、１Ａ……可変コンデンサ１の静
電容量、２Ａ……積層チツプコンデンサ２の静電
容量、３Ａ……積層チツプインダクタ３のインダ
クタンス、８……誘電体、９Ａ，９Ｂ，９Ｃ……
電極部、１０Ａ，１０Ｂ，１０Ｃ……電極端部、
１１……セラミツク素体、１２Ａ，１２Ｂ，１６
Ａ，１６Ｂ……外部電極、１３……磁性体、１４
Ａ，１４Ｂ，１４Ｃ……導電体、１５……フエラ
イト素体、１７Ａ，１７Ｂ……可変コンデンサ電
極、１８……可変コンデンサ付積層チツプコンデ
ンサ。
FIG. 1 is a perspective view of one embodiment of the present invention. FIG. 2 is an equivalent circuit diagram of this embodiment. FIGS. 3 and 4 are a laminated assembly structure diagram and a perspective view of a laminated chip capacitor, which is the main part of this embodiment. 5 and 6 are a laminated assembly structure diagram and a perspective view of a laminated chip inductor, which is the main part of this embodiment, and FIG. 7 is a perspective view of a laminated chip capacitor with a variable capacitor. 1... Variable capacitor, 2... Multilayer chip capacitor, 3... Multilayer chip inductor, 4A, 4
B...Short-circuit terminal, 1A...Capacitance of variable capacitor 1, 2A...Capacitance of multilayer chip capacitor 2, 3A...Inductance of multilayer chip inductor 3, 8...Dielectric, 9A, 9B, 9C ……
Electrode part, 10A, 10B, 10C...electrode end part,
11... Ceramic body, 12A, 12B, 16
A, 16B...External electrode, 13...Magnetic material, 14
A, 14B, 14C... conductor, 15... ferrite element body, 17A, 17B... variable capacitor electrode, 18... multilayer chip capacitor with variable capacitor.
Claims (1)
を有する電極部を形成した複数の誘電体基板を積
層に重ね合わせた構造の積層チツプコンデンサと
、前記積層チツプコンデンサの片側表面に設けら
れた外部電極に接続されて重ね合わせた構造の可
変コンデンサと、フエライト等からなる磁性体板
の導電体材料を埋め込み積層に重ね合わせた構造
の積層チツプインダクタと、前記積層チツプコン
デンサの外部電極と前記積層チツプインダクタの
外部電極とのそれぞれの側壁同士を接続する短絡
端子板とを有することを特徴とするチツプ形共振
器。 ２ 前記積層チツプコンデンサのそれぞれの誘電
体基板に形成された各電極部の端部が前記誘電体
基板の所定の枚数おきに積層部の第１の側面部お
よび第２の側面部に接続部を形成し、前記２つの
外部電極部に接続されていることを特徴とする請
求項１記載のチツプ形共振器。 ３ 前記積層インダクタのそれぞれの磁性体板に
埋め込まれた導電体材料のインダクタンスを形成
する形状が前記磁性体板の所定の枚数おきにその
形状の向きを１８０度変えて積層されていること
を特徴とする請求項１記載のチツプ形共振器。[Claims for Utility Model Registration] 1. A multilayer chip capacitor having a structure in which a plurality of dielectric substrates each having electrode portions having a predetermined area formed on both sides of a dielectric plate made of porcelain or the like are laminated, and the multilayer chip A variable capacitor having a stacked structure connected to an external electrode provided on one surface of the capacitor, a multilayer chip inductor having a structure in which a conductive material of magnetic plates made of ferrite or the like is embedded and stacked in a stacked manner, and the above-mentioned stacked A chip-shaped resonator characterized in that it has a short-circuit terminal plate that connects the respective side walls of an external electrode of a chip capacitor and an external electrode of the multilayer chip inductor. 2. An end of each electrode portion formed on each dielectric substrate of the multilayer chip capacitor connects to a first side surface portion and a second side surface portion of the multilayer portion at intervals of a predetermined number of dielectric substrates. 2. The chip-shaped resonator according to claim 1, wherein the chip-shaped resonator is formed and connected to said two external electrode parts. 3. The laminated inductor is characterized in that the inductance-forming shape of the conductive material embedded in each magnetic plate is laminated with the direction of the shape changed by 180 degrees every predetermined number of magnetic plates. 2. The chip resonator according to claim 1, wherein
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8553590U JPH0443015U (en) | 1990-08-13 | 1990-08-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8553590U JPH0443015U (en) | 1990-08-13 | 1990-08-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0443015U true JPH0443015U (en) | 1992-04-13 |
Family
ID=31634730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8553590U Pending JPH0443015U (en) | 1990-08-13 | 1990-08-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0443015U (en) |
-
1990
- 1990-08-13 JP JP8553590U patent/JPH0443015U/ja active Pending
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