JPH0443300B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improved control method for generating a target program from an original program for an information processing system.

In creating a program to be executed by an information processing system, one well-known method is to generate a so-called target program in a format that can be executed by a processing device from a so-called original program created and input by the creator. Take the process.

This generation process is normally performed by sequentially converting program statements of the original program into instruction words that constitute the target program, in accordance with the order in which they are arranged.

In this process, the address in the program of each generated instruction word is determined sequentially by arranging the instruction words to be selected. Therefore, the address of the operand of a certain instruction word, especially the branch destination address of a branch instruction, is , ahead of the instruction word (that is, in the direction of addresses with larger values), the branch destination address has not been determined at the time the instruction word is generated.

Therefore, for example, when the instruction word is first generated, it is set as a temporary branch destination address, and information indicating the address of the instruction word and the address waiting to be decided (for example, a so-called label written in the original program) is set as a temporary branch destination address. ) is stored separately as control information, and when the processing progresses and the value of the address indicated by that label is determined (this is called address resolution), the required command word is determined by referring to the above control information. Correct the temporary branch destination address to the correct address.

[Conventional technology]

FIG. 2 is a block diagram showing an example of the configuration of an information processing system.

As is well known, the processing device 1 is configured to process data on the main storage device 2 by executing a program loaded into the main storage device 2.

The auxiliary storage device 3 is composed of, for example, a magnetic disk storage device, has a relatively large storage capacity compared to the main storage device 2, stores programs and data, and stores them in the main storage device 2 when necessary. By loading the data into the auxiliary storage device 3, the data is processed by the processing device 1, and the data resulting from the processing is output to and stored in the auxiliary storage device 3 as needed.

In the process of generating a target program from an original program, the processing device 1 reads out the original program data previously input to the auxiliary storage device 3 into the main storage device 2 and processes it, and the resulting target program is ultimately used as the main program. The data is output from the storage device 2 to the auxiliary storage device 3.

When generating a target program using such a system, focusing on the processing of the instruction word whose address is unresolved, the following method has conventionally been adopted.

In the first method, the original program is processed twice,
The first step is a process for determining the label address value, which resolves the addresses of all labels in the original program, and then the second step is to sequentially generate instruction words for the target program.

Therefore, when the instruction word is generated in the second processing, all addresses have been resolved, and there is no need to modify the addresses in the instruction word later.

In the second method, the instruction words of the target program are sequentially generated and held in a buffer on the main storage device 2,
Commands whose addresses are unresolved are kept unresolved, and each time the address of a label is determined, the previous commands are traced back and the addresses of those commands are corrected.

In this manner, the entire target program is completed on the main storage device 2 and then output to the auxiliary storage device 3.

In the third method, the instruction words of the target program are
Unresolved addresses are generated as they are in a buffer of an appropriate size in the main memory 2, and each time the buffer is filled, they are output to the auxiliary memory 3. If the label address is found in the meantime, the address of the required command word is corrected as described above.

In this way, a target program including instruction words with unresolved addresses is constructed on the auxiliary storage device 3.

During this time, when the address of the label used in the instruction word that has already been output is determined, data for modifying the instruction word (instruction word address, branch destination address, etc.) is created and stored in the auxiliary storage device 3. Output.

Thereafter, as is well known, as pre-processing for executing this target program, a program combination editing process is performed to generate a so-called executable program, so during the combination editing process,
The corresponding instruction word is corrected by referring to the above correction data.

[Problem that the invention seeks to solve]

The first method has a problem in that the original program is scanned twice, which increases the processing time.

The second method has the fastest processing speed among the three methods, but since the entire target program must be held in the main memory device 2, it requires a relatively large amount of main storage area, and especially a relatively large When creating a program, securing main storage space becomes a problem.

In the third method, the initial target program generation can be processed relatively quickly, but unless the buffer is large, it is generally necessary to modify a large number of unresolved address instructions. The problem is that it takes time.

[Means for solving problems]

The above problem is that when an information processing system having a main memory and an auxiliary memory generates a target program from an original program of the information processing system, two buffers are provided on the main memory, The buffers are used alternately to sequentially output the target program of the generation process, and each time one of the buffers is filled with the output, only the other buffer outputs the contents of the buffer to the auxiliary storage device. outputs the subsequent target program to the other buffer, and if the operand address of the target program instruction word on the two buffers is resolved after outputting the instruction word to the buffer, The problem is solved by the program generation control method of the present invention configured to output the contents of the buffer including the instruction word to the auxiliary storage device after modifying the instruction word on the buffer.

[Effect]

That is, two buffers are provided on the main memory,
This buffer is alternately used as a holding area for newly generated command words.

However, until one buffer is filled with new instruction words, the part of the target program already held in the other buffer is held without being output to the auxiliary storage, and during that time the resolved address is generated. If so, the instructions are modified on the buffer, and the contents of the buffer are thus output to auxiliary storage just before the buffer needs to be updated with new instructions.

At the time of outputting to the auxiliary storage device, there is a possibility that there are still instructions with unresolved addresses, so these instructions are corrected in the combined editing process as in the third method. Create and output the corrected data as shown below.

However, by doing the above, for example, the instruction word group first generated in one buffer by the above control is designated as A, and the instruction word group subsequently generated in the other buffer is designated as B, and in this way, If the instruction word groups sequentially generated in each of the two buffers are expressed as A, B, C, D, E, F, etc. in the order of generation, then these two
In the conventional method that uses only one buffer of the same size as A, A- According to the control of the present invention, A, A-B, B-C, CD, D-
The combinations are E, E-F, F-..., and therefore, by being on the buffer at the same time, the possibility that the address will be resolved on the buffer increases.
It becomes possible to relatively reduce the number of instruction words that require correction in the combined editing process.

For example, considering a simplified situation and assuming that the branch destination addresses of forward branching instructions are uniformly distributed up to +l address, in a buffer of length 2l, the third method If you process it with
Probably, about 1/2 of the relevant command words in the latter half of the buffer, ie, 1/4 of all the relevant command words, will need to be modified in the combined editing process.

However, if we take a buffer of the same size and have a length l,
When the control method of the present invention is applied to a single buffer, all branch destination addresses of programs with the same conditions are resolved on the buffer.

〔Example〕

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

A target program generation mechanism 10 configured by executing a program on the main storage device 2
consists of a control section 11, an instruction generation section 12, and a label definition section 13.

The control unit 11 sequentially inputs the program sentences of the original program 17 and passes them to the instruction generation unit 12 and label definition unit 13.

The instruction generation unit 12 generates instruction words based on the information of the program statement, and generates instruction words from the buffer 14 or the buffer 1.
Output to 5.

The buffers 14 and 15 are composed of main memory areas of the same length, and the instruction generation unit sequentially arranges instruction words in a predetermined format and order in one of the buffers, for example, the buffer 14, and writes them into the buffer 14. When the area runs out, the controller 11 is notified.

Based on this notification, the control unit 11 controls the buffer 15.
The instruction string previously generated and written is output to the auxiliary storage device 3, thereby making the buffer 15 usable.

The instruction generation unit 12 writes the instruction words to be generated from now on into the buffer 15, and when the buffer 15 is filled, it notifies the control unit 11 as before, outputs the contents of the buffer 14 to the auxiliary storage device 3, and then outputs the contents of the buffer 14 to the auxiliary storage device 3. Using the buffer 14, the instruction generation unit 1
2 outputs generated instruction words to buffers 14 and 15 alternately.

When generating an instruction word, the instruction generation section 12 receives the address of a required label from the label definition section 13 and completes the instruction word.

At this time, if the address of the required label indicating the branch destination etc. of the branch instruction is unresolved, the branch destination address of the branch instruction word is a temporary address and an instruction word is generated and output to the buffer 14 or 15. put.

At the same time, the label definition unit 13 is notified of the address of the instruction word and the branch destination label.

The label definition unit 13 holds correspondence information between labels and determined addresses, and when a new label address is determined, the label definition unit 13 stores the unresolved branch destination label notified from the instruction generation unit 12 as described above. Find out if there is.

If there is a corresponding instruction word, the corresponding instruction word on the buffers 14 and 15 is determined from the address of the instruction word, and the temporary branch destination address of that instruction word is corrected to the newly determined address.

Also, at this time, depending on the address of the relevant command word,
When it is detected that the instruction word has already been output to the auxiliary storage device 3, modification information consisting of the address of the instruction word, the newly determined branch destination address, and necessary control information is stored in the main storage device 2. Modified data area 16
Write it in and keep it.

The correction information created in the correction data area 16 is
For example, when this target program generation process is completed, it is output to the auxiliary storage device 3.

After that, when performing the combined editing process of the target program output to the auxiliary storage device 3, the above correction information is referred to in the combined editing process as is known in the art.
Correction of unresolved addresses is executed.

〔Effect of the invention〕

As is clear from the above description, the present invention has a significant industrial effect in that the efficiency of processing for generating a target program from an original program for an information processing system is improved by using a relatively small amount of buffer.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of the configuration of an information processing system. In the figure, 1 is a processing device, 2 is a main storage device,
3 is an auxiliary storage device, 10 is a target program generation mechanism, 11 is a control section, 12 is an instruction generation section, 13 is a label definition section, 14 and 15 are buffers, 16 is a modified data area, and 17 is an original program.

Claims (1)

[Scope of Claims] 1. When an information processing system having a main storage device and an auxiliary storage device generates a target program from an original program of the information processing system, two buffers are provided on the main storage device. , sequentially outputs the target program of the generation process by using the buffers alternately, and each time one of the buffers is filled with the output, only the other buffer outputs the contents of the buffer to the auxiliary storage device. and outputs the subsequent target program to the other buffer, and if the operand address of the instruction word of the target program on the two buffers is resolved after outputting the instruction word to the buffer, , a program generation control system characterized in that, after modifying the instruction word on the buffer, the contents of the buffer including the instruction word are output to the auxiliary storage device.