JPH044433A - Communication controller - Google Patents

Abstract

PURPOSE:To quickly and surely restore a communication controller from a faulty state by performing various kinds of fault restoring processes in accordance with the kind of fault. CONSTITUTION:A counter for counting the number of fault occurring times is provided for each kind of fault and a fault restoring processing is performed in accordance with the kind of fault and the number of fault occurring times indicated by the counter. Thus an adequate fault restoring process is performed in accordance with the kind of fault. Accordingly, restoration can be performed surely in a short time. Moreover, since the number of fault occurring times is stored by kinds of faults, an adequate restoring process can be performed when the same kind of faults continuously occur.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a communication control device, and particularly to failure recovery processing thereof.

[Prior Art] Point-of-sale system (POS) terminals, bank automatic teller machines (CDs), and the like operate by being connected to a host computer or the like. A communication control device controls data communication between lower-order devices such as PO8 terminals and CD terminals and higher-order devices such as host computers.

FIG. 4 shows a configuration diagram of a system using a communication control device. A host computer 4 and a communication control device 6 are connected via a line network 2 such as a public line or a private line. A line 8 is connected to the communication control device 6, and a POS
It constitutes a local area network (LAN) together with terminals 10 such as a computer and a CD.

The role of the communication control device 6 is to send data sent from the terminal 10 to the host computer 4, and to send data from the host computer 4 to the terminal IQ. For example, when password data is input from the CD terminal 10, the communication control device 6 receives it and sends it to the communication network 2.
The data is sent to the host computer 4 via the host computer 4. The host computer 4 that has received the password data confirms the validity of the password and sends the result data back to the communication control device 6. The communication control device 6 sends this result data back to the CD terminal 10 to which the password data was sent. A series of data communications is completed as described above.

By the way, in case a failure occurs in the communication control device 6 in operation, a communication control device 7 having the same configuration is provided as a standby device. Normally, the communication control device 7, which is a standby device, is not supplied with power and is not in operation. Operational aircraft 6
When a failure occurs in the standby machine 7, power is turned on to the standby machine 7 via the power control line 9, and the standby machine 7 operates.

[Problems to be Solved by the Invention] However, conventional systems have the following problems.

Switching from the operational machine 6 to the standby machine 7 requires complicated procedures such as data transfer, and is not preferable. On the other hand, some failures in the operational machine 6, such as temporary program bugs, can be made to operate normally again by restarting the machine. However, in a system that immediately switches to standby aircraft 7 when a failure occurs,
Even in such a case, there is a problem in that switching to the standby aircraft 7 is performed.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a communication control device that can appropriately handle failures.

[Means for Solving the Problems] In the communication control device according to the present invention, a failure occurrence count counter is provided for each failure type, and failure recovery processing is performed in accordance with the failure type and the failure occurrence count indicated by the failure occurrence count counter. It is characterized by doing the following.

[Operation] Since appropriate failure recovery processing is performed depending on the failure type, recovery time is quick and reliable recovery can be performed. Furthermore, since the number of occurrences is stored for each type of failure, appropriate recovery processing can be performed even if the same type of failure occurs consecutively.

[Embodiment] FIG. 3 shows a hardware configuration diagram of a communication control device according to an embodiment of the present invention. The pass line 22 (data line and control line) includes a ROM 24, a RAM 26,
A host communication control circuit 30, a terminal communication control circuit 32, and a power supply control circuit 34 are connected.

The CPU 20 controls each section according to programs stored in the ROM 24 and RAM 26. In addition, RAM
26 stores the number of failure occurrences for each type of failure.

That is, in this embodiment, a part of the RAM 26 is used as a failure occurrence counter. Furthermore, if battery backup is provided, there is no risk that the value of the failure occurrence counter will be lost even in the event of a failure.

The host communication control circuit 30 is for controlling communication with the host computer 4, and the terminal communication control circuit 32
is for controlling communication with each terminal 10. The power supply control circuit 34 is for turning off the power supply circuit 28 of the own machine and turning on the power supply circuit (not shown) of the other machine when the own machine fails.

FIG. 2 shows a flowchart of the programs stored in the ROM 24 and RAM 26. When the power is turned on, first, the hardware and software are initialized (steps S+, S2). Next, after performing a hardware self-diagnosis (step Sa), the business processing program is started (step S4).

If a failure occurs during business processing, CPU2
0 executes the fault handling program shown in FIG. 1A.

The fault processing program includes fault processing 1 for each fault type.
to fault processing n (in the figure, the flowchart for fault processing 2 to fault processing n is omitted). Here, the explanation will proceed assuming that a data error has occurred.

In the flowchart of Figure 1A, a data error is
It is assumed that failure processing 1 is used.

First, in step SIO, the fault occurrence counter is O.
or 1. Here, the failure occurrence counter is provided for each failure type, as shown in Table 1. Note that Table 1 lists only three types of disabilities as examples.

Table 1 Failure Type Data Error Communication Failure Hardware Failure Number of Occurrences 0 0 0 According to Table 1, the number of occurrences of data errors is O, so the CPU 20
branches to step S+1.

In step Sll, the number of data error occurrences is incremented by +1. Therefore, the failure occurrence counter is as shown in Table 2.

Table 2 Failure Type Data Error Communication Failure Hard Failure Number of Occurrences 1 0 0 Next, the CPU 20 performs a reset and restarts the system (step S, 2). When the system is restarted, steps S1 and subsequent steps in FIG. 2 are executed. Therefore, if the system operates normally due to the reset restart, business processing continues (step se). Since there is a possibility that a data error can be recovered by resetting and restarting, switching to a standby machine is not performed immediately.

By the way, if the system restarts normally, it is necessary to clear the failure counter. Therefore, in this embodiment, the timer task is executed after the start of business processing (
Step SS). The second flowchart of the timer task
Shown on the right side of the figure. Note that this timer task is executed by CPU2.
0 multitasking in parallel with the business processing program.

First, in step S5, a recovery completion timer is set. In this example, it is 3600 seconds. Next, the recovery counter is -1 (decremented) every second (steps S51 and S5□). Then, when the value of the recovery counter becomes 0, all failure occurrence counters are cleared (step 564).

That is, in this embodiment, business processing is restarted and 3
When 600 seconds have elapsed, the failure occurrence counter is cleared. By doing this, the count value of recovered failures will not remain forever.

By the way, if a data error occurs again and the process is stopped before 3600 seconds have elapsed, the following process is performed. C.P.
U20 executes the fault handling program shown in FIG. 1, and first checks the number of data error occurrences.

Here, as shown in Table 2, the counter value is 1. Therefore, step S1g is executed and the counter value is set to O. Next, the CPU 20 controls the power supply control circuit 34 to turn on the power supply circuit of the standby machine (step 51
4). Furthermore, the power supply circuit 28 of the own device is turned off (step S0.). In this way, the switch to the standby machine is performed. That is, if the failure is not recovered even after a reset and restart, the switch to the standby machine is performed.

In the above embodiment, for the same type of failure, the first stop causes a reset restart, and the second stop causes switching to a standby machine. However, the switching to the standby machine may be performed after resetting and restarting a plurality of times.

Next, FIG. 1B shows a flowchart of failure processing when a communication failure occurs. Since a communication failure is an external failure, there are cases where the RAM 26 stops even though programs, data, etc. are correctly stored. Therefore, the first stop causes a reset restart by hot start. In other words, the program is not loaded from an external storage device, but is started using the contents remaining in the RAM 26 (
Step 82a, S2□). As a result, the time required to load the program can be omitted and the computer can be restarted, thereby reducing the time required for restarting.

If the hot start does not result in a normal restart, perform a cold start (steps S21 and S21).
p□). In other words, the program is transferred from the external storage device to RA.
Load it into M26 and start it up.

Furthermore, if the machine does not start up normally even after a cold start, the machine is switched to a standby machine (step S2'
B, S*4,52s).

Next, FIG. 1C shows a flowchart of failure processing when the system stops due to a hardware failure.

In the case of a hardware failure, there is no hope that recovery will be possible by reset restart, so the system is immediately switched to a standby machine (steps S31° and S3□).

[Effects of the Invention] The communication control device according to the present invention performs various failure recovery processes depending on the type of failure.
Recovery time is quick and reliable recovery can be performed. Furthermore, since the number of occurrences is stored for each type of failure, appropriate recovery processing can be performed even if the same type of failure occurs consecutively.

[Brief explanation of the drawing]

1 (A to C) is a flowchart showing failure processing in a communication control device according to an embodiment of the present invention; FIG. 2 is a flowchart showing business processing and timer tasks in a communication control system according to an embodiment of the invention; FIG. 8 is a diagram showing the hardware configuration of the communication control device, and FIG. 4 is a diagram showing the general configuration of the communication control system. 4...Host computer 6.7...Communication control device 10...Terminal 2nd timer task hardware Initialize timer
l Counter) set program
1 second WAIT S51 initialization hardware complete s5
゜Self-returning Accrement Business Processing Start Counter=ON○ES Number of Failure Occurrence Outer Timer Mask Counter Set to 0 TsujiφΦka End Business Processing Figure 3

Claims (1)

[Claims] (1) In a communication control device that controls data communication between a lower-level device and a higher-level device, a counter for the number of times a failure has occurred is provided for each type of failure, and a counter is provided for each type of failure, and a counter is provided for each failure type and the number of times the failure occurs corresponds to the number of times the failure occurs as indicated by the failure type and the number of times the failure occurs. A communication control device characterized by performing failure recovery processing.