JPH0444770U - - Google Patents

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Publication number
JPH0444770U
JPH0444770U JP8699390U JP8699390U JPH0444770U JP H0444770 U JPH0444770 U JP H0444770U JP 8699390 U JP8699390 U JP 8699390U JP 8699390 U JP8699390 U JP 8699390U JP H0444770 U JPH0444770 U JP H0444770U
Authority
JP
Japan
Prior art keywords
line sensor
analog
photoelectric line
digital converter
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8699390U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8699390U priority Critical patent/JPH0444770U/ja
Publication of JPH0444770U publication Critical patent/JPH0444770U/ja
Pending legal-status Critical Current

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  • Image Input (AREA)
  • Image Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示すブロツク図、
第2図は同実施例の信号波形図、第3図乃至第7
図は本考案の他の実施例を示すもので、第3図は
ブロツク図、第4図は第3図におけるラインメモ
リの構成図、第5図は乗算器の構成図、第6図は
比較器の構成図、第7図はブロツク図、第8図は
従来例を示すブロツク図である。 11……CCDセンサー、12,12′……A
/D変換器、13……切替スイツチ、14,14
′……乗算器、15,15′……ラインメモリ、
16,16′……比較器、17,17′……制御
回路。
FIG. 1 is a block diagram showing an embodiment of the present invention.
Figure 2 is a signal waveform diagram of the same embodiment, Figures 3 to 7
The figures show other embodiments of the present invention, in which Fig. 3 is a block diagram, Fig. 4 is a block diagram of the line memory in Fig. 3, Fig. 5 is a block diagram of a multiplier, and Fig. 6 is a comparison diagram. FIG. 7 is a block diagram, and FIG. 8 is a block diagram showing a conventional example. 11...CCD sensor, 12, 12'...A
/D converter, 13... selector switch, 14, 14
'... Multiplier, 15,15'... Line memory,
16, 16'... Comparator, 17, 17'... Control circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 画像読取りを行う光電ラインセンサーと、
この光電ラインセンサー出力をデジタル信号に変
換するアナログ・デジタル変換器と、前記光電ラ
インセンサーが基準白を読取つたときの前記アナ
ログ・デジタル変換器からのデジタルデータをn
(0<n<1)倍する乗算手段と、この乗算手段
により乗算された内容を記憶するメモリと、前記
光電ラインセンサーが原稿を読取つたときの前記
アナログ・デジタル変換器からのデジタルデータ
と前記メモリに記憶されたデジタルデータを比較
し2値画像信号を出力する比較手段を設けたこと
を特徴とする画像信号処理装置。 (2) 乗算手段は、n値を複数設定し、その各n
値を選択可能にしたことを特徴とする請求項(1)
記載の画像信号処理装置。 (3) 画像読取りを行う光電ラインセンサーと、
この光電ラインセンサー出力をデジタル信号に変
換するアナログ・デジタル変換器と、前記光電ラ
インセンサーが基準白を読取つたときの前記アナ
ログ・デジタル変換器からのデジタルデータを少
なくとも1ライン分記憶するメモリと、前記光電
ラインセンサーが原稿を読取つたときの前記アナ
ログ・デジタル変換器からのデジタルデータと前
記メモリに記憶されたデジタルデータを比較し2
値画像信号を出力する比較手段からなり、前記ア
ナログ・デジタル変換器は、高低2つの基準信号
電圧のレベル差に応じた閾値で入力信号をデジタ
ル化する構成とし、前記光電ラインセンサーが基
準白を読取るときの2つの基準信号電圧のレベル
差を前記光電ラインセンサーが原稿を読取るとき
の2つの基準信号電圧のレベル差の2倍に設定し
たことを特徴とする画像信号処理装置。
[Scope of claim for utility model registration] (1) A photoelectric line sensor that reads images;
An analog-to-digital converter converts the photoelectric line sensor output into a digital signal, and digital data from the analog-to-digital converter when the photoelectric line sensor reads the reference white.
(0<n<1); a memory for storing the multiplied contents by the multiplication means; digital data from the analog-to-digital converter when the photoelectric line sensor reads the document; An image signal processing device comprising a comparing means for comparing digital data stored in a memory and outputting a binary image signal. (2) The multiplication means sets a plurality of n values, and each n
Claim (1) characterized in that the value can be selected.
The image signal processing device described. (3) A photoelectric line sensor that reads images;
an analog-to-digital converter that converts the photoelectric line sensor output into a digital signal; and a memory that stores at least one line of digital data from the analog-to-digital converter when the photoelectric line sensor reads the reference white; Compare the digital data from the analog-to-digital converter when the photoelectric line sensor reads the original with the digital data stored in the memory.
The analog-to-digital converter is configured to digitize the input signal with a threshold corresponding to the level difference between two high and low reference signal voltages, and the photoelectric line sensor is configured to output a reference white signal. An image signal processing device characterized in that the level difference between the two reference signal voltages when reading is set to twice the level difference between the two reference signal voltages when the photoelectric line sensor reads the document.
JP8699390U 1990-08-22 1990-08-22 Pending JPH0444770U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8699390U JPH0444770U (en) 1990-08-22 1990-08-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8699390U JPH0444770U (en) 1990-08-22 1990-08-22

Publications (1)

Publication Number Publication Date
JPH0444770U true JPH0444770U (en) 1992-04-16

Family

ID=31818978

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8699390U Pending JPH0444770U (en) 1990-08-22 1990-08-22

Country Status (1)

Country Link
JP (1) JPH0444770U (en)

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