JPH044627B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] With the advancement of VLSI technology, the digitalization of broadcasting technology has progressed, and it has become possible to store and process images at high speed with high quality and stability, and to also transmit images digitally. Now I can do it. However, it is difficult to process moving images at 30 frames per second in real time, comparable to broadcast television, by rewriting every cell in the frame memory. Therefore, the number of pixels in one frame is reduced, the number of pixels in each frame of the video is reduced, and the digital information corresponding to each frame of the video is transmitted with a small number of bits and stored in multiple memories in the display device. There is a loop movie image processing system that enlarges and displays continuous images. An image system using such special effects is used, for example, in the case of television broadcasting of weather forecasts, in which continuous images of changes in clouds taken from an artificial satellite are displayed on a fixed geographic map.

The present invention transfers continuous images to an image display device in an image control device having such an image memory,
The present invention relates to a continuous image display system that efficiently displays continuous images consisting of a finite number of frames by instructing information such as switching and enlarging the display memory of an image display device using a main control unit.

Conventionally, this type of continuous image processing system has been based on simple control in which the contents of an image memory of an image control device are repeatedly transferred in a one-to-one correspondence to the display memory of an image display device to perform continuous processing.

The present invention relates to such an image processing system,
A continuous image processing system that makes it possible to continuously display continuous images transferred from a host computer via an image control device in an image display device having multiple display memories while avoiding conflicts with memory switching and address count control. provide.

[Industrial application field]

The present invention relates to a continuous image processing system for loop movies that performs digital special effects that cannot be achieved with analog technology, and in particular, the present invention relates to a continuous image processing system for loop movies that performs digital special effects that cannot be achieved with analog technology. The present invention relates to means for transferring an image from an image memory in a control device to a display memory of an image display device, and a continuous image processing system capable of executing continuous display control in the image display device.

[Prior art]

With the development of integration technology, digital image processing technology, which performs image processing digitally, has progressed because conventional analog image technology has problems in terms of quality, stability, and processing performance.

Image processing includes gradation processing, correction, spatial filtering, image movement and contour extraction, and processing to compress the image transmission band. In particular, in order to process moving images such as television broadcasts in real time, many attempts have been made to compress the transmission bandwidth by utilizing the redundancy of television signals. In the past, many band compression algorithms have already been proposed, including an intra-frame method that compresses the number of bits per pixel within the same television frame, and a method that utilizes the high correlation between adjacent frames in temporally consecutive frames. There are two types of interframe compression methods:

Along with such moving image compression technology, attempts have been made in television broadcasting to improve the quality of programs by using digital special effects that could not be achieved with analog technology.

For example, there is a freeze frame effect that freezes the movement of an image for a certain moment by utilizing the function of a frame memory that digitally stores each frame of a moving image. Alternatively, there is a reduction effect in which the size of the image is reduced once and the image is inserted into an arbitrary position on the screen, and conversely, there is an enlargement effect in which an image captured by a camera is reduced, transmitted, and then enlarged and displayed on a display device. Although there are processes that cannot be efficiently performed using analog or optical methods,
It has become possible to create such special effects digitally. This type of special technology is centered around a random access memory (RAM) that digitally stores binary information, and is achieved by freely controlling the write address and read address of the RAM.

Address control for writing and reading RAM can be performed using software using a microcomputer, but with the advancement of VLSI technology, it is now possible to perform high-speed processing using a dedicated microprocessor. It became like that. It is expected that high-speed image processing systems will be developed that process a wide variety of special effects using methods such as parallel processing.

In a continuous image processing system for loop movies, which is one of the special effects for moving images, conventionally, a finite number of image frames are transferred from an image memory in an image control device connected to a host computer to multiple display memories on an image display device. There is a method in which the image is compressed and transmitted, and enlargement processing is performed within the image display device on the display side. Such an image system is used, for example, in television broadcasts of weather forecasts in which moving images of clouds are continuously shown on still images showing the surroundings of a map of Japan. However, in the prior art, the contents of the image memory of the image control device are simply made to correspond one-to-one with the display memory of the image display device, and each frame is transferred and enlarged for display, which is a continuous process.

In such a conventional loop movie image processing system, the area contents corresponding to each frame are transferred from an image memory consisting of a plurality of memories in an image control device to an image memory consisting of a plurality of memories of an image display device. In this case, there was a problem in that memory switching and control for simultaneously switching the display start address conflicted, resulting in a screen other than the one requested at the time of memory switching being displayed.

A continuous image display method of a conventional continuous image processing system will be explained with reference to FIG.

Assume now that the display memory consists of three memories 1, 2, and 3, each memory is divided into four areas, and each of the areas corresponds to a frame of an image. Transferring each area from similar memories 1, 2, and 3 in the image control device to the display memory that stores such a finite number of frames to each corresponding area of the storage display memory on the display device side, After the transfer, when displaying each area on a display device, the areas are switched in the order of the numbers shown in FIG. That is, area 1 of memory 1 is read out by switching the display address, and after displaying, area 2 is moved to memory 2 and displayed under memory switching control. After displaying, memory switching is performed from memory 2 to memory 3, and area 3 is displayed. Thereafter, memory switching is performed from memory 3 to memory 1, and area 4 of memory 1 is displayed. However, at this time, it is necessary to switch the display start address to the start address of area 4 of memory 1 simultaneously with memory switching from memory 3 to memory 1. However, in the process of simultaneously performing this memory switching and converting the start address of the display address, since the address specified area 3 of memory 3, area 1 of memory 1 corresponding to area 3 of memory 3 There was a problem that it was displayed momentarily.

[Problem that the invention seeks to solve]

The present invention eliminates the drawbacks of the prior art and transfers each image frame from the image memory in the image control device to the corresponding area of the display memory in the image display device without performing memory switching and display start address switching at the same time. Provided is a continuous image processing system that transfers images and continuously displays images on a display unit in the image display device.

[Means for solving problems]

In order to achieve the above object, the present invention divides the memory space of a plurality of memories into a plurality of frame areas and stores each frame of a continuous image in each of the areas,
In the continuous image processing device that performs memory switching control of the plurality of memories and address control of each area of each memory, each memory is address counter control means for specifying a starting address of each frame area and reading out all of the frame area; memory switching means for switching to a consecutive adjacent memory after the frame area has been read and displayed; After reading out and displaying one area under the control of the address counter, the memory switching means
After performing the address counter control of each memory from the th memory to other consecutive memories, reading and displaying the frame area of each memory, and reading and displaying the specific frame of the last memory by the address counter control, , the other frame areas in the final memory are read out and displayed under the control of the address counter without being controlled by the memory switching means, and thereafter the final memory is used as a starting memory and the adjacent memory is changed to the adjacent memory by the memory switching means. The present invention is characterized in that it has a control means that continuously performs the same control as described above by switching, and performs memory switching and display start address control sequentially without conflict.

[Effect]

For example, in a display memory configuration in which each of three display memories is divided into four areas and each area stores one frame of an image, the present invention provides memory switching control and address counter control in each memory. If you do so, you access one area of memory 1, then access one area of memory 2, and then access one area of memory 3, but after that, you access the same memory without switching to memory 1. I am trying to access 3 different areas. Thereafter, another area of memory 2 is accessed, and another area of memory 1 is accessed. Then, without moving to memory 3, the same memory 1
If other areas are accessed, display address switching and memory switching will be performed successively, and the problem of displaying both sides that are not required when memory is switched can be eliminated.

〔Example〕

Next, an embodiment of the loop movie continuous image processing system of the present invention will be described with reference to the drawings. FIG. 1a is a block diagram of the continuous image processing system of the present invention.

This device is composed of an image control device 4, an image display device 5, and a host computer 6.

The image control device 4 is a random access memory (RAM) that stores a finite number of image frames of moving images.
That is, a microprocessor unit (MPU) includes the image memory 10 and controls data transfer between the host computer 6 and the image display device 5 and controls reading and writing of the image memory 10.
11, and further includes a memory transfer processing section 12 that performs processing for transferring each frame in the image memory 10 in the image control device 4 to the image display device 5.

The image memory 10 is divided into 12 memory spaces to store, for example, 12 frames.
It is assumed that this image memory 10 is connected to the host computer 6 via a data bus, and is also connected to an address bus. Therefore, the internal memory area can be accessed by the host computer 6, making it possible to process any pixel of any frame using the software of the host computer 6. Furthermore, the MPU 11 included in the image control device 4 similarly controls the address of the image memory 10 and sends a gray value signal corresponding to any pixel value of any frame in the image memory 10 to the host computer 6 or the image display. It controls the writing of gray value signals transferred to the device 5 or sent from the host computer 6 or other input/output devices to arbitrary addresses in the image memory 10. For example, an image input device (not shown) may be used without going through the host computer 6.
DMA the digital image signal input from
is used to control writing to the image memory 10. Therefore, the MPU 11 generates signals to ensure data transmission and reception to the host computer 6, the image input device, or the image display device 5. For example, when performing the above DMA transfer,
The MPU 11 generates a DMA request signal to the host computer 6, and upon receiving a DMA approval signal from the host computer, transfers the digital signals continuously transmitted from the image input device to an appropriate location in the image memory 10. Executes address counter control and memory chip enable control for storing in the area. Furthermore, the MPU 11 controls the microprocessor of the image display device 5 in order to DMA transfer the image information in the image memory 10 to the corresponding display memory 2 of the image display device 5 via the memory transfer processing section 12.
Generates control signals for transmission and reception to the MPU 21. For example, an initial address for DAM transportation is generated, and when the memory contents specified by the address are latched in the memory transfer processing unit 12 and ready for transfer, a request signal from the MPU 21 of the image display device 5 is responded to. A control is executed to give an approval signal to the MPU 21. Thereafter, the MPU 11 executes address counter control and chip enable control (memory switching control) from the initial address, and transfers the image signal via the memory transfer processing section 12. In this case, also on the image display device 5 side.
The MPU 21 controls transportation so that the image information transferred from the image control device 4 can be stored in the corresponding area of the internal display memory 20.
Perform address control. Furthermore, in order to store each image frame transmitted from the image memory 10 of the image control device 4 into the corresponding memory area of the display memory 20 in the image display device 5, the MPU 11 in the image control device 4 reads out the address. Simultaneously with the counter control, the MPU 21 also performs memory switching control for a plurality of memories, and similarly, for write control within the image display device 5, the MPU 21 performs address counter control and simultaneously executes chip enable control for memory switching for a plurality of memories.

The image display device 5 includes a display memory 2 that stores each frame of the moving image transferred from the MPU 21 and the image control device 4 in a corresponding area.
0 and the plurality of display memories 20, the memory switching circuit 22 controls which memory to read each frame from. That is, the memory switching circuit 22 switches between the image memory 20
It is connected to the output of the MPU 21 and is controlled by the memory switching control signal of the MPU 21. The output of the memory switching circuit 22 is connected to an enlargement processing circuit 23.
When transferring from the image memory 10 of the image control device 4 to the corresponding area of the display memory 20 of the image display device 5 via the memory transfer processing unit 12, the size of each image frame is adjusted to increase transfer efficiency. is made smaller. Therefore, the enlargement processing circuit 23 is a circuit that performs processing so that the frame size can be enlarged and displayed on the display device 24 of the display unit 24 in accordance with the size of the frame at the time of transfer. A display section 24 is connected to the output of the enlargement processing circuit 23, and the display section 24
internally includes a display processing circuit 240 and a display device 241 that execute display control.

The enlargement rate required in the enlargement processing circuit 23 is given to the MPU 11 from the host computer 6 and is
Information indicating the enlargement rate is given from the MPU 11 to the MPU 21, and information indicating the enlargement rate is provided from the MPU 21 to the enlargement processing circuit 23. Further, in the display section 24, a display start instruction signal is applied from the MPU 11 to the MPU 21, and when the MPU 21 generates an address for starting display, display is executed. A timer 25 is connected to the MPU 21 for asynchronously measuring the waiting time until the image information is read from the display memory 20 and displayed on the display device 241 of the display unit 24.

Using the continuous image processing system described above, continuous images are transferred from the image memory 10 in the image control device 4 to the display memory 20 of the image display device 5, and in memory address and display start address and memory switching control of the memory. A method for executing memory switching and display start address without switching them at the same time will be described below.

In this embodiment, the configuration of the image memory 10 and the display memory 20 is such that the number of frames is 12, and each memory has four frame areas with three memories to perform memory switching and address control. I will explain it below.

FIG. 1b shows the display memory 20 of the image display device 5 corresponding to the three memories memory 1, memory 2, and memory 3 of the image memory 10 of the image control device 4.
This figure shows the area configuration of three memories, memory 1, memory 2, and memory 3. That is, display memory 2
Each element of memory 1, 2, and 3 of 0 is divided into 4 parts to store 4 frames, each area stores 1 frame, and 3 memories store 12 bounded frames. be able to. In this case, the MPU 21 of the image display device 5 continuously accesses each area, so that the display unit 24 in the image display device 5 executes display processing. The memory switching control of the memories 1, 2, and 3 of the MPU 21 and the address control of the four areas of each memory are performed in accordance with the numerical order shown in FIG. 1b.

That is, first, area 1 of memory 1 is accessed and displayed under address counter control. After that, memory 2 is specified by memory switching,
Area 2 of memory 2 is accessed and displayed under address control. Thereafter, the memory is switched to memory 3, and area 3 of memory 3 is read out and displayed under address counter control. Thereafter, unlike the prior art, in the present invention, the memory is not switched to memory 1, but the address start position of area 4 of the same memory 3 is changed, and area 4 is read out and displayed under address counter control. After displaying area 4,
Memory switching is performed to memory 2, and area 5 is accessed and displayed. Then, memory switching is performed to memory 1, and area 6 is displayed. After the area of memory 1 is displayed, the address start position is controlled to be moved to the top address of area 7 in order to read area 7 of the same memory 1. After displaying area 7, memory switching moves to memory 2, area 8 is displayed, and then area 9 of memory 3 is displayed. Thereafter, the address start position is changed and moved to area 10, area 11 of memory 2 and area 12 of memory 1 are displayed, and the display of all areas is finished.

If such control is executed, area 3 of memory 3
Since the memory is not switched and only the address is changed when moving from to area 4, memory switching and address changes do not conflict and are executed one after the other. Similarly, in memory 1, area 6
When moving from area 7 to area 7, only changing the address start position does not conflict with the memory switching operation, and successive control becomes possible. Therefore, the problem of displaying an unrequired area due to conflict between memory switching and display address switching as in the conventional system can be solved.

Next, the operation of the continuous image processing system of the present invention will be explained using the flowchart shown in FIG.

When the operation starts, the MPU 11 of the image control device 4
is memory 1 of the three memories in image memory 10.
The frames corresponding to the four areas 1, 6, 7, and 12 are transferred via the memory transfer processing unit 12,
The MPU 21 controls the frame to be written in each corresponding area of the memory 1 of the corresponding image display device 5. In this case, MPU1 of the image control device 4
1 controls the reading of an address space equal to the capacity of the frame from the start address corresponding to each frame using only the address counter, and therefore does not require memory switching control. Also in the image display device 5, the MPU 21
Similarly, a start address corresponding to the area of memory 1 is generated, addresses are sequentially generated in the address space corresponding to each frame, and writing control is executed, so memory switching control is not required.

When the transmission/reception of the memory 1 is completed, the image control device 4
The MPU 11 performs memory switching operations and controls transfer of areas of the memory 2. The contents are then copied to the area of the memory 2 of the image display device 5. Next, transfer of the area of memory 3 is executed in the same manner.

With the above procedure, the MPU 11 performs memory switching after controlling the address counter for four frames, moves to memory 2, performs address counter control on the area of memory 2, performs memory switching to memory 3, and then switches to memory 3. Control will be executed to count the addresses of the area. The writing operation of the MPU 21 to the display memory 20 is also similar.
The MPU 21 performs address control on the area of memory 1, performs memory switching to the area of memory 2, and after controlling the address of the area, performs memory switching to memory 3, and executes address control of the area. In this way, all the areas are transferred from the image memory 10 to the display memory 20 in the numerical order shown in FIG. 1b. After completing the transfer regarding memories 1, 2, and 3,
The MPU 11 transfers information on the magnification rate to the MPU 21. Then, display designation of memory 1 is executed. When the MPU 11 specifies display of memory 1, the MPU 21 specifies memory 1 of the display memory 20 and provides a control signal for memory switching to the memory switching circuit 22.
outputs the frame in area 1 of memory 1 to the output of memory switching circuit 22, and then outputs the frame in area 1 of memory 1 to the output of enlargement processing circuit 23.
Execute the enlargement process with . After the enlargement process, the MPU 11 instructs the display start designation.
21 acts on the display processing circuit 240, and controls the display processing circuit 240 to display the frame in area 1 of the memory 1 on the display device 241.
During this time, the MPU 21 operates the timer 25, and the MPU 21 is in a waiting state until area 1 is displayed on the display device 241. After the timer ends,
The MPU 21 determines whether frames up to memory 3 have been displayed. Assuming that area 1 is currently being displayed, but area 2 of memory 2 and area 3 of memory 3 have not yet been displayed, the control of the MPU 21 is transferred to the direction of N in the flowchart, and the next memory is displayed. Specify the display of following route A. In other words, execute memory switching to memory 2,
Control then moves to displaying the frame in area 2. That is, at the stage when the MPU 21 generates a start address specifying area 2 of the memory 2, a display start instruction signal from the MPU 11 is received and display processing begins. Then, it confirms that the timer has finished, and when the display of area 2 is finished, executes memory switching to memory 3.
Similarly, area 3 of memory 3 will be displayed.

After going through the loop of route A three times in this way, the end of memory 3 display is determined to be Y instead of N.
When the answer is yes, the MPU 21 indicates the final address of area 3 of the memory 3.

In the present invention, the memory is not switched in this state, but the start address of area 4 of the same memory 3 is moved. In other words, address conversion for the same memory 3 is performed without memory switching.

After performing such address conversion, memory 1
The MPU 21 determines whether the display of has ended.
Since it is memory 3 at this stage, the display end of memory 1 is N. Therefore, the display start instruction
MPU11 gives instructions, and under its control, MPU21
acts on the display processing circuit 240, the memory 3
Area 4 will be displayed on the display device 241. During this time, a timer 25 connected to the MPU 21 counts the time, and after the timer expires, the next memory, that is, memory 2 is specified, and it is determined again whether or not the display of memory 1 has ended. Since it is not memory 1, area 5 of memory 2 is accessed, a display start instruction is given, display processing is controlled, and area 5 is displayed. During this time, the timer 25 counts the time, and after the timer ends, the data is transferred to the memory 1. Returning again to the determination as to whether the display of the memory 1 has ended, since the display has not ended, the display start instruction is executed, the display process is executed, and the area 6 of the memory 1 is displayed. During this time, the timer 25 counts the time, and after the timer ends, it is again determined whether the display of the memory 1 has ended. At this time, since area 6 of memory 1 has already been displayed, the answer is yes. Therefore, the next step is to determine whether the operation has ended. Since it is not finished yet, the next address specification is executed. That is, memory switching from memory 1 to another memory is not performed, and the MPU 21 that specifies area 7 of the same memory 1 performs address conversion. That is, it is moved to route B in order to display area 7. The control is exactly the same as moving from area 7 to area 1, area 2 of memory 2, and area 3 of memory 3, so after displaying area 7 of memory 1, it moves to area 8 of memory 2. Up to 9 are displayed. After that, control moves from 9 to area 10 of the same memory 3, and similarly to the control that moves to area 4 of memory 3, area 5 of memory 2, area 6 of memory 1, area 10 of memory 3, area 11 of memory 2, Each area of the display memory 20 of the image display device 5 is displayed starting from the area 12 of the memory 1.
In this way, the flow of operations ends.

〔Effect of the invention〕

As explained above, the present invention makes it possible to sequentially perform memory switching and display start address switching for consecutive images transferred from an image control device in an image display device having multiple memories, thereby avoiding conflicts in which switching is performed simultaneously. This has the effect of allowing continuous images to be displayed smoothly and efficiently.

[Brief explanation of drawings]

FIG. 1a is a block diagram of the configuration of the continuous image processing system of the present invention, FIG. 1b is an explanatory diagram illustrating the control system for display address switching and memory switching in the continuous image processing system of the present invention, and FIG. 2 is a conventional system. FIG. 3 is a flowchart of processing in the continuous image processing system of the present invention. 1, 2, 3...memory, 4...image control device,
5... Image display device, 6... Host computer, 10
...Image memory in the image control device, 11...
MPU, 12...Memory transfer processing unit, 20...Display memory in image display device, 21...MPU, 2
2...Memory switching circuit, 23...Enlargement processing circuit, 24...Display section, 25...Timer, 240...
...Display processing circuit, 241...Display device.

Claims (1)

[Claims] 1. A memory space of a plurality of memories is divided into a plurality of frame areas, each frame of a continuous image is stored in each of the areas, and memory switching control of the plurality of memories and each area of each memory are performed. In a continuous image processing device that performs address control, the start address of each frame area of each memory is specified for the memories arranged consecutively from the first start memory to the last memory, and all of the frame areas are read. address counter control means for reading out and displaying the frame area; memory switching means for switching to a consecutive adjacent memory after the frame area has been read and displayed; The memory switching means controls the address counter of each memory from the second memory to other consecutive memories, reads out and displays the frame area of each memory, and selects the specific frame of the last memory from the address counter. After reading and displaying under the control, other frame areas in the final memory are read and displayed under control of the address counter without being controlled by the memory switching means, and thereafter, the final memory is used as a starting memory and adjacent frame areas are read and displayed. Continuous image processing, characterized in that the memory has a control means that continuously performs the same control as described above by switching by the memory switching means, and performs memory switching and display start address control sequentially without conflict. system.