JPH0446486A - Three-line median comb-line filter in pal system - Google Patents

Abstract

PURPOSE:To prevent cross color obstruction by providing a BPF, a 2H delay element, an intermediate value selection circuit, an addition circuit, and a subtraction circuit. CONSTITUTION:A signal which is not delayed, the one 2H delayed, and the one 4H delayed by 2H delay memories 11 and 12 are respectively made in a composite video signal. The signals around 4.43MHz respectively pass through a 3-line signal by BPFs 13, 14, and 15. Inverters 16 and 17 turn a 2-line opposite phase signal to be the same phase against a 2H-delayed chroma signal. An intermediate value selection circuit 18 compares the dimension of 3-line chroma signals turned to be the same phase, selects a line of the middle dimension when the dimension of 3-line chroma signals are different, and selects one of the 2-line chroma signals of the same dimension when 2-line chroma signals are the same dimension. The output of the circuit 18 is added with the 2H delay signal by the addition circuit 19 to be obtained as the output of the chroma signal. A luminance signal can be obtained by a subtraction circuit 20 by subtracting the chroma signal output of the circuit 19 from the composite video signal from an element 11.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention improves the separation performance of luminance signals and chroma signals in PAL television receivers, VCRs, and PAL composite video signal reproducing equipment. PAL
This relates to a 3-line median comb filter in the system.

2. Description of the Related Art In recent years, there has been a demand for higher image quality in video signal reproducing equipment, including televisions. For this reason, NTS
In the Y/C separation circuit of C-type video signal reproducing equipment, the conventional combination of a bandpass filter and a notch filter has been replaced with a comb-shaped filter that greatly reduces the occurrence of cross-color interference. However, the Y/C separation circuit of PAL video signal playback equipment still uses a combination of a bandpass filter and a notch filter, so cross-color interference is noticeable and hinders the improvement of screen quality. .

An example of the conventional PAL type Y/C separation circuit described above will be described below with reference to the drawings.

FIG. 4 shows a schematic block diagram of a conventional PAL type Y/C separation circuit. In FIG. 4, 41 is a bandpass filter for extracting a chroma signal. 42 is a notch filter for extracting the luminance signal.

The operation of the Y/C separation circuit in the PAL system configured as described above will be described below. The composite video signal includes a luminance signal and 4.43M+1. This is frequency multiplexed chroma signals distributed around the frequency of . The bandpass filter 41 is 4.43MII.

A filter that extracts 4.4 from the composite video signal.
The notch filter 42 extracts the chroma signal by mainly extracting the signals around 3MH2.
By widening the notch around the frequency of , the chroma signal is removed and the luminance signal is extracted.

Problems to be Solved by the Invention However, in the above configuration, the surrounding high frequency luminance signal also passes through the band pass filter 41.

At this time, cross color interference occurs because the luminance signal is mixed with the extracted chroma signal.

In view of the above problems, the present invention provides a 3-line median comb filter for the PAL system that prevents cross-color interference by preventing luminance signals from being mixed in during the chroma signal reproduction process.

Means for Solving the Problems In order to solve the above problems, the 3-line median comb filter in the PAL system of the present invention includes a first bandpass filter for manually inputting a composite video signal in the PAL system, and a PAL system.
The first 2 delays the AL system composite video signal by 2H period.
a second bandpass filter that inputs the output from the first 2H delay element, and a second 2H delay element that further delays the output from the first 2H delay element by a period of 2H.
i! ! a third bandpass filter that manually inputs the output from the second 2H delay element, and a first inversion element that inverts the output of the first bandpass filter;
a second bandpass filter that inverts the output of the third bandpass filter;
Compare the magnitudes of the outputs of the three lines of the inverting element, the first inverting element, the second bandpass filter, and the second inverting element, and if the three lines have different magnitudes, select the middle one. an intermediate value selection circuit that selects a line of the same size and selects one of the two lines of the same size if two of the three lines have the same size, and outputs of the second bandpass filter and the intermediate value selection circuit. and a subtraction circuit that subtracts the output value of the addition circuit from the output value of the first 2H delay element.

Alternatively, a bandpass filter that inputs a PAL composite video signal, a first 2H delay element that delays the PAL composite video signal by a 2H period, and a first inversion element that inverts the output from the bandpass filter. a second 2H delay element that delays the output from the bandpass filter for a 2H period; a third 2H delay element that further delays the output from the second 2H delay element for a 2H period; A second inverting element that inverts the output from the 2H delay element, the first inverting element, the second 2H delay element, and the second inverting element are compared in magnitude. an intermediate value selection circuit that selects a line with a middle size when the lines have different sizes, and selects one of the two lines of the same size if two lines out of the three lines have the same size; an addition circuit that adds the output of the 2H delay element and the intermediate value selection circuit and divides the result by 2; and a subtraction circuit that subtracts the output value of the addition circuit from the output value of the first 2H delay element. It is equipped with the following.

Operation The present invention operates as follows due to the above-described configuration. P
The phase of the AL system chroma signal is inverted every 2H. Therefore, the phases of the undelayed chroma signal and the 4H delayed chroma signal are opposite to the 2H delayed chroma signal. The first inverting element and the second inverting element function to bring these two lines of antiphase signals into the same phase with the 2H delayed chroma signal. Finally, the chroma signal is selected by the intermediate value selection circuit and the summer circuit to determine whether it is the chroma signal of the line with the middle size among the 3 lines of chroma signals, or the chroma signal of the same size if 2 of the 3 lines are the same size. The average of one of the two lines and the 2H delayed chroma signal is output from the addition circuit.

However, in the case of a luminance signal, the undelayed signal, 2H
The three lines, the delayed signal and the 4H delayed signal, are all in phase. The 3-line input to the intermediate value selection circuit uses a first inverting element and a second inverting element in the front so that the undelayed luminance signal and the 4H-delayed luminance signal are opposite in phase to the 2H-delayed luminance signal. be done. At this time, in the intermediate value selection circuit, since only the 2H delayed signal is inverted in phase with the other two lines, either the undelayed signal or the 4H delayed signal is selected. The addition circuit performs addition of a signal delayed by 2H and an undelayed signal having an opposite phase or a signal delayed by 4H. This is the same as in-phase subtraction. If the signal amplitudes of the line to be drawn and the line to be drawn are the same, the output of the adder circuit will be O. Furthermore, even if the amplitude is increased to a certain extent, the output of the addition circuit is very small because of subtraction.

Therefore, the chroma signal that has passed through the bandpass filter is outputted by the addition circuit, but the high frequency luminance signal is not outputted by the addition circuit, or even if it is output, it is small, so that cross color interference can be prevented.

Example Below A 3-line system in the PAL system according to an example of the present invention.
The median comb filter will be explained with reference to the drawings. FIG. 1 shows a schematic block diagram of a three-line median comb filter using a digital circuit in a first embodiment of the present invention.

In FIG. 1, 11 and 12 are 2H delay memories that delay the composite video signal for 2H periods. 13 to 15 is 4.43
This is a bandpass filter that mainly extracts MH2. I
This is an inverter that inverts the input signals 6 and 17'. I8 compares the sizes of the 3 lines manually, and if the 3 lines are different in size, selects the line with the middle size, and if 2 of the 3 lines are the same size, selects the 2 lines of the same size. This is an intermediate value selection circuit that selects one side of the line.

19 is an addition circuit. 20 is a subtraction circuit.

3 lines in PAL system configured as above
The operation of the median comb filter will be explained below with reference to FIG.

It is assumed that the composite video signal in FIG. 1 has already been converted into a digital, two-dimensional, 8-bit signal. The composite video signal is divided into undelayed signals, 2H delayed signals, and 4 by 2H delay memo January 1 and 2H delay memo January 2.
H-delayed signals are respectively produced. The signals of the three lines are filtered by bandpass filter 13, bandpass filter 14, and bandpass filter 15, respectively, to 4.43M82.
Surrounding signals pass through. Bandpass filter 14.15
．． The signal passed through 16 includes not only a chroma signal but also a luminance signal.

In the PAL system chroma signal, the phase is inverted every 2H, so the chroma signal delayed by 2H is compared to the undelayed chroma signal and 4HI! The extended chroma signals have opposite phases. The inverter 16 and the inverter 17 function to bring the two lines of signals having opposite phases into the same phase with respect to the 2H delayed chroma signal. In the intermediate value selection circuit 18, the magnitudes of the chroma signals of the three lines having the same phase are compared, and if the magnitudes of the three lines are different, the line with the middle magnitude is selected, and two of the three lines are selected. If they are the same size, select one of the two lines of the same size. The output of the intermediate value selection circuit 18 is added to the 2H delayed signal by an addition circuit 19. Since the output bit of the adder circuit 19 discards the LSB and becomes 8 bits, the chroma signal will eventually be the chroma signal of the line with the middle size among the 3 lines of chroma signals, or the chroma signal of the line with the same size among the 3 lines. If the size is the same, the average of one of the two lines of the same size and the 2H delayed chroma signal is obtained as the chroma signal output.

The luminance signal is 2H delayed by 2H by the subtraction circuit 20.
Addition surface from the composite video signal from the delay element 11! It is obtained by subtracting the chroma signal output of 19.

However, in the case of a luminance signal, the undelayed signal that has passed through the bandpass filter 13, the bandpass filter 14
The 2H delayed signal passed through the bandpass filter 15
The three lines of the 4H delayed signal that have passed through are all in phase. In the three lines of input to the intermediate value selection circuit 18, the front inverter 16 and inverter 17 make the undelayed luminance signal and the 4H delayed luminance signal opposite in phase to the 2H delayed luminance signal. At this time, the middle (11!
In the one-selection circuit 18, only the 2H delayed signal has a phase inversion with respect to the other two lines, so the non-delayed signal or 4H
The delayed signal is selected. The addition circuit 19 performs addition of a 2H delayed signal and an undelayed signal that is antiphased or a 4H delayed signal, which is the same as in-phase subtraction. If the signal amplitudes of the drawn line and the drawn line are the same, the output of the adding circuit becomes 0. Also, even if the amplitudes are different, since it is a subtraction, the output will be smaller than human power.

As described above, according to this embodiment, with the above configuration, the chroma signal that has passed through the bandpass filter is outputted by the addition circuit, but the high frequency luminance signal is not outputted by the addition circuit or is much smaller, so it is crossed. Color interference can be prevented.

Next, one embodiment of the circuit configuration of the intermediate value selection circuit 18 shown in FIG. 1 will be described with reference to the drawings.

FIG. 2 is an example of the circuit configuration of the intermediate value selection circuit shown in FIG. 1 for one day.

Reference numeral 21 in FIG. 2 is an inverter that inverts the MSB of the 8-bit signal from the inverter 16 in FIG.

22 is an inverter that inverts the MSB of the 8-pin signal from the 141K bandpass filter 14.

23 is an inverter that inverts the MSB of the 8-bit signal from inverter I7 in FIG. It is a comparator that judges the magnitude of the two lines P and Q that are input from 24 to 26 frames, and if P is larger than Q, outputs r□, and otherwise outputs 'IJ. 27 is an inverter that inverts the judgment signal from the comparator 24. 28 to 30 are exclusive
, 5ive OR circuit #31 is exclusive
ve This is a selector with three gates that open and close the outputs from the OR circuits 2B and 29.30 using control signals. The operation will be explained below using FIG. 2.

Inverter 16 in FIG. For simplicity, the output signals from the bandpass filter 14 and inverter 17 are referred to as signal a, signal S, and signal C, respectively. Since each 8-bit signal of signal a, signal S, and signal C is a 2's combination binary signal, by inverting the MSB of each line using inverters 2122 and 23, the signal of each line can be compared in magnitude. It can be easily converted to a straight binary signal. Comparators 24, 25, 26 and inverter 27 and ex
The exclusive OR circuits 28, 29 and 30 are logic circuits that perform magnitude comparisons.

With this configuration, the 3 gates in the selector 31 are 1
Only one is turned on and the remaining two are turned off.

The logic is that if the signal sizes of the three lines are different, the gate of the line with the middle size is selected, and two of the three lines
If the lines have the same size, one of the two lines with the same thickness is selected. For example, when the signal a has the middle magnitude, the output of the exclusive OR circuit 28 is output to rl, and the exclusive
The outputs of OR circuits 29 and 30 are output as "0". As a result, the gate of only the 3-gate signal a in the selector 31 becomes ○N, and the signal a is selected.

If the above configuration is adopted, the intermediate value selection circuit 1
8 compares the sizes of the three lines to be input and if the sizes of the three lines are different, selects the line with the middle size,
If two of the three lines are of the same size, one of the two lines of the same size can be selected.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a PAL display showing a second embodiment of the present invention.
FIG. 3 is a schematic block diagram of a 3-line median comb filter in the method.

32 in FIG. 3 is a band pass filter. 33 to 3
5 is a 2H delay memory that delays by 2H period.

36 & 37 are inverters that invert the signal.

38 is an intermediate value selection circuit. 39 is an addition circuit.

40 is a subtraction circuit. The difference from the configuration in Figure 1 is that by changing the positions of the bandpass filters and 2H delay memories, the number of bandpass filters is reduced from three to one, and the number of 2H delay memories is reduced from two to three. This is an increase.

3 lines in the PAL system configured as above.
The operation of the median comb filter is exactly the same as that of FIG. As a result of reducing the number of bandpass filters from three to one instead of increasing the number of 2H delay memories from two to three as in the configuration shown in Figure 3, the overall number of components is lower than that in Figure 1. You can reduce it by 1 point.

Effects of the Invention As described above, according to the present invention, cross-color interference can be prevented by providing a pandopass, a C filter, a 2H delay element, an intermediate value selection circuit, an addition circuit, and a subtraction circuit. .

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of a 3-line median layered filter in the PAL system according to the first embodiment of the present invention.
FIG. 2 is a circuit configuration diagram shown as an embodiment of the intermediate value selection circuit 18 in FIG. 1, and FIG. 3 is a schematic block diagram of a 3-line median comb filter in the PAL system according to the second embodiment of the present invention. , FIG. 4 is a schematic block diagram showing a conventional example of a Y/C separation circuit. II~12...2HIl extended memory, ■3~15
...Band pass filter, 16~[7...
...Inverter, intermediate value selection circuit for 18..., I9.
...Addition circuit, 2o...Subtraction circuit, 21
~23...Inverter, 24-26...
Comparator, 28-30...exclusive
OR circuit, 31...Selector 32...
・Band pass filter, 33-35...2HJ
Extended memory, 36-37... Inverter, 38.
...Intermediate value selection circuit, 39...Addition circuit,
4o...Subtraction circuit, 41...Band pass filter, 42...Notch filter. Name of agent: Patent attorney Shigetaka Awano Haka 1 name: Ryo and Ryo ＾ V RO!

Claims (2)

[Claims] (1) A first bandpass filter that inputs a PAL composite video signal, a first 2H delay element that delays the PAL composite video signal by a 2H period, and an output from the first 2H delay element. a second bandpass filter that inputs the input, a second 2H delay element that further delays the output from the first 2H delay element by 2H period, and a third bandpass filter that inputs the output from the second 2H delay element. a bandpass filter, a first inversion element that inverts the output of the first bandpass filter, a second inversion element that inverts the output of the third bandpass filter, and the first inversion element; Compare the output sizes of the three lines of the second bandpass filter and the second inverting element, and if the three lines have different sizes, select the line with the middle size, and select two of the three lines. an intermediate value selection circuit that selects one of the two lines of the same size if they are the same size, and an addition that adds the outputs of the second bandpass filter and the intermediate value selection circuit and divides by 2. A 3-line median comb filter in the PAL system, comprising: a circuit; and a subtraction circuit that subtracts the output value of the addition circuit from the output value of the first 2H delay element. (2) A bandpass filter that inputs a PAL composite video signal, a first 2H delay element that delays the PAL composite video signal by a 2H period, and a first inversion that inverts the output from the bandpass filter. and a second 2H delay element for delaying the output from the bandpass filter by 2H period.
H delay element, a third 2H delay element that further delays the output from the second 2H delay element by 2H period, and the third 2H delay element.
A second inverting element that inverts the output from the 2H delay element, the first inverting element, the second 2H delay element, and the second inverting element. an intermediate value selection circuit that selects the line with the middle size when the three lines have different sizes, and selects one of the two lines with the same size if two of the three lines have the same size; an adder circuit that adds the outputs of the second 2H delay element and the intermediate value selection circuit and divides the result by 2; and an adder circuit that subtracts the output value of the adder circuit from the output value of the first 2H delay element. A 3-line median comb filter in the PAL system equipped with an arithmetic circuit.