JPH0446771U - - Google Patents
Info
- Publication number
- JPH0446771U JPH0446771U JP8921690U JP8921690U JPH0446771U JP H0446771 U JPH0446771 U JP H0446771U JP 8921690 U JP8921690 U JP 8921690U JP 8921690 U JP8921690 U JP 8921690U JP H0446771 U JPH0446771 U JP H0446771U
- Authority
- JP
- Japan
- Prior art keywords
- scanner
- normalization
- circuit
- reading device
- reference plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Facsimile Scanning Arrangements (AREA)
- Facsimile Image Signal Circuits (AREA)
Description
第１図は本考案の実施例を示す画像読取装置の
斜視図、第２図は従来の画像読取装置の一部切欠
斜視図、第３図は従来の画像読取装置の制御ブロ
ツク図、第４図は画像信号の比較図、第４図Ａは
白基準メモリからの出力を示す図、第４図Ｂは増
幅器からの出力を示す図、第４図Ｃは正規化回路
からの出力を示す図、第５図は第１図のＢ−Ｂ断
面拡大図である。
６０……筺体、６０ａ……切欠窓、６０ｂ……
案内穴、６０ｅ……小窓、６１……カバー、６１
ａ……案内ピン、６１ｂ……引つ掛け部、６２…
…正規化基準板、６２ａ……基準面、６２ｂ……
記号。
FIG. 1 is a perspective view of an image reading device showing an embodiment of the present invention, FIG. 2 is a partially cutaway perspective view of a conventional image reading device, FIG. 3 is a control block diagram of the conventional image reading device, and FIG. The figure is a comparison diagram of image signals, Figure 4A is a diagram showing the output from the white reference memory, Figure 4B is a diagram showing the output from the amplifier, and Figure 4C is a diagram showing the output from the normalization circuit. , FIG. 5 is an enlarged cross-sectional view taken along line BB in FIG. 1. 60...Housing, 60a...Notch window, 60b...
Guide hole, 60e...Small window, 61...Cover, 61
a...Guide pin, 61b...Hook part, 62...
...Normalization reference plate, 62a...Reference surface, 62b...
symbol.
Claims (1)
と、 (c) 該正規化基準板が配設された位置にスキヤ
ナを移動させ、基準面を読み取つて基準信号とし
て白基準メモリに格納する手段と、 (d) 上記スキヤナで読み取つた画像信号を上記
基準信号と比較して補正する正規化回路と、 (e) 該正規化回路からの出力信号をスレツシユ
ホルドレベルを基準として２値化する２値化回路
を有することを特徴とする画像読取装置。[Scope of Claim for Utility Model Registration] (a) a scanner, (b) a normalization reference plate removably disposed on the housing, and (c) a scanner at the position where the normalization reference plate is disposed. (d) a normalization circuit that compares and corrects the image signal read by the scanner with the reference signal; (e) means for correcting the image signal read by the scanner; An image reading device comprising a binarization circuit that binarizes an output signal from the conversion circuit using a threshold level as a reference.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8921690U JPH0446771U (en) | 1990-08-28 | 1990-08-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8921690U JPH0446771U (en) | 1990-08-28 | 1990-08-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0446771U true JPH0446771U (en) | 1992-04-21 |
Family
ID=31823052
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8921690U Pending JPH0446771U (en) | 1990-08-28 | 1990-08-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0446771U (en) |
-
1990
- 1990-08-28 JP JP8921690U patent/JPH0446771U/ja active Pending
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