JPH0447717U - - Google Patents

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Publication number
JPH0447717U
JPH0447717U JP9007990U JP9007990U JPH0447717U JP H0447717 U JPH0447717 U JP H0447717U JP 9007990 U JP9007990 U JP 9007990U JP 9007990 U JP9007990 U JP 9007990U JP H0447717 U JPH0447717 U JP H0447717U
Authority
JP
Japan
Prior art keywords
circuit
voltage
resistors
transistor
reference voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9007990U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9007990U priority Critical patent/JPH0447717U/ja
Publication of JPH0447717U publication Critical patent/JPH0447717U/ja
Pending legal-status Critical Current

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  • Control Of Electrical Variables (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の主要部の回路図、第2図は従
来例の回路図、第3図は本考案と従来例との出力
電圧を比較するための特性図。 図中、CC……定電流源、10……レベルシ
フト回路。
FIG. 1 is a circuit diagram of the main part of the present invention, FIG. 2 is a circuit diagram of a conventional example, and FIG. 3 is a characteristic diagram for comparing the output voltages of the present invention and the conventional example. In the figure, CC... constant current source, 10... level shift circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電流供給源に対して少なくとも3つの抵抗器と
トランジスタとの直列回路を接続し、前記3つの
抵抗器のうちの1つの抵抗器の両端電圧を、2つ
の差動トランジスタを含む差動増幅器のそれぞれ
の入力に与えるようにした回路を有する基準電圧
回路において、前記2つの差動トランジスタのコ
レクタ側と前記直列回路との間に、トランジスタ
によるレベルシフト回路を接続したことを特徴と
する基準電圧回路。
A series circuit of at least three resistors and a transistor is connected to a current supply source, and the voltage across one of the three resistors is applied to each of the differential amplifiers including two differential transistors. What is claimed is: 1. A reference voltage circuit having a circuit configured to apply the voltage to an input of the reference voltage circuit, wherein a level shift circuit including a transistor is connected between the collector side of the two differential transistors and the series circuit.
JP9007990U 1990-08-30 1990-08-30 Pending JPH0447717U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9007990U JPH0447717U (en) 1990-08-30 1990-08-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9007990U JPH0447717U (en) 1990-08-30 1990-08-30

Publications (1)

Publication Number Publication Date
JPH0447717U true JPH0447717U (en) 1992-04-23

Family

ID=31824520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9007990U Pending JPH0447717U (en) 1990-08-30 1990-08-30

Country Status (1)

Country Link
JP (1) JPH0447717U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54953A (en) * 1977-06-06 1979-01-06 Mitsubishi Electric Corp Differential amplifying circuit
JPS61147317A (en) * 1984-12-20 1986-07-05 Fujitsu Ltd Reference voltage generating circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54953A (en) * 1977-06-06 1979-01-06 Mitsubishi Electric Corp Differential amplifying circuit
JPS61147317A (en) * 1984-12-20 1986-07-05 Fujitsu Ltd Reference voltage generating circuit

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