JPH0447880A - Digital signal recording and reproducing system - Google Patents

Abstract

PURPOSE:To attain recording/reproduction processing for a video signal and an audio signal in a same timing in the unit of a compression reference period by forming picture, audio and control areas with parts of bits in N bits. CONSTITUTION:Bits [b15-b4], bits [b3-b1] and a bit [b0] are used for picture, audio and control areas respectively. A video signal of the NTSC system is used, a picture data by 30 frames is arranged to the picture area for each compression reference period and the data is compressed within 1152000 bits. Reference picture data VB1, VB2,... corresponding to a picture data of a 1st frame and differential compressed picture data DELTAc1, DELTAc2,... corresponding to the picture data are arranged sequentially to the picture area. An audio data by the compressed reference period is arranged to the audio area, the ADPCM system is adopted for the coding system and the data is compressed within 288000 bits. The control area is provided with the synchronization, mode and control code section. A code is selected under the control of a CPU and the video signal and the audio signal are recorded and reproduced in the same timing in the unit of the compression reference period.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a recording and reproducing method for simultaneously recording and reproducing a digital video signal for a moving image and a digital audio signal.

[Prior art] The current digital audio technology
ATJ) is designed to record and reproduce only digital audio signals.

[Problems to be Solved by the Invention] However, it would be very convenient if not only digital audio signals but also other signals, such as digital video signals for moving images, could be recorded and reproduced simultaneously.

When recording and reproducing a digital video signal for a moving image in this manner, it is necessary to precisely match the timing of the reproduced audio from the speaker and the moving image displayed on the monitor.

Therefore, in the present invention, a digital video signal for a moving image and a digital audio signal are simultaneously recorded and reproduced using compression processing, and the timings of the reproduced image and audio coincide with each other.

[Means for solving the r4 problem] This invention records and reproduces a digital signal of N bits (N is an integer), and a portion of these N bits forms an image area, an audio area, and a control area, respectively. is,
The image area in each compression reference period contains compressed digital video signals for multiple screens that make up a moving image, and the audio area in each compression reference period contains digital audio signals for the compression reference period. It is something that will be done.

Recording signal processing and reproduction signal processing of the digital video signal and digital audio signal are performed at the same timing in units of compression reference periods.

[Operation] The amount of information in digital video signals for moving images is extremely large;
It is difficult to record and reproduce data simultaneously with digital audio signals using DAT as is.

However, in this example, since the moving digital video signal is compressed and recorded, it is easy to record and reproduce the digital audio signal simultaneously.

Further, since the recording signal processing and the reproduction signal processing of the digital video signal and the digital audio signal are performed at the same timing using the compression reference period as a unit, the timings of the reproduced image and audio always match.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. In this example, a DAT is used as the recording/reproducing device.

FIG. 2 shows the format of the digital signal recorded and reproduced in this example. 16 bits) [b15~b
o], bits [b15 to b4, bits [b3 to bl], and bit [bO] are respectively an image area, an audio area, and a control area.

Here, the conventional audio sampling clock is 48k
If the DAT transmission rate is 48kHzX2X16bit = 1536kbps, as in the case of recording left and right two-channel digital audio signals at Hz, the transmission rate in the image area is 48kHzX2X12bit = 1152kbps, and the transmission rate in the audio area is: 48kHzX2X3bit = 288kbps, and the transmission rate in the control area is 48kHzX2X1bit = 96kbps (Book 3 M).

The recorded data is configured for a predetermined period, in this example, one second as a unit period (hereinafter referred to as "compression reference period").

That is, in each compression reference period, the image area is 115
The audio area is 288,000 bits, and the control area is 96,000 bits.

In this example, an NTSC video signal is used, and image data for 30 frames is arranged in the image area in each compression reference period. In this case, the image data for 30 frames has too much information as it is. For example, one frame of pixel data is 256H x 240V,
And when the luminance signal Y1, the red difference signal U, and the blue difference signal ■ are each 8 bits, the amount of information for 30 frames is 2
56X240X8X30X3: 44236800 bits.

Therefore, the image data for 30 frames is 115,200
It is compressed to within 0 bits.

For example, 256H x 240V painting data is set to 172 by subsampling processing.

Further, a total of 24 bits of the luminance signal Y1, red difference signal U, and blue difference signal V are compressed into 9 bits.

As a result, the amount of information for l frames is 256×24
0X1/2X9 = 276480 bits.

Further, the image data of the second to 29th frames are each differentially compressed image data using the image data of the first frame as reference image data, and the information amount of this differentially compressed image data is, for example, 27,200 bits. .

Therefore, the amount of information for 30 frames is 276,480
X 1 +27200X29=1065280 bits, which is within 1152000 bits.

Note that the remaining 86,720 bits are used for fixed length adjustment.

FIG. 4 shows an example of the structure of recorded data. At the beginning of the image area of each compression reference period are reference image data corresponding to the image data of the first frame, VBI, VB2, etc.
・ is arranged, followed by differentially compressed image data ΔC1, ΔC2, . . . corresponding to the image data of the second to 29th frames.
, Δc29 are sequentially arranged.

Furthermore, audio data for this compression reference period is arranged in the audio area for each compression reference period.

This audio data is data within 288,000 bits.

For example, the ADPCM method is adopted as the audio data encoding method, and the data is compressed.

As a result, the sampling frequency is 32 kHz.

When one sample is 4 bits and 2 channels (stereo or monaural 2 channels), the amount of information is 32 kHz x 4 bits x 2 channels = 256,000 bits, which is data within 288,000 bits.

Note that the remaining 32,000 bits are used for frequency adjustment.

As mentioned above, the 16 bits b15 to b15 of the digital signal
A voice region is formed by 3 bits (3 bits) b3 to bt of bO, and the transmission rate of the voice region is 96 kHz x 3 bits = 288 kbps (see FIGS. 2 and 3).

This can also be considered as 32kHz x 9 bits = 288kbpS. Therefore, for example, as shown in FIG. 5, audio data is allocated to 8 bits out of each 9 bits, and the bit rate is adjusted. That is, 32k
Hz x 8 bits = 256 kbps.

Furthermore, the control area in each compression reference period is provided with a synchronization code section, a mode code section, and a control code section.

A plurality of synchronization code sections are provided in each compression reference period, and in this example, four synchronization code sections are provided at intervals of 0.25 seconds. For example, a 64x1 bit area is secured in each synchronization code section. A framing code is used as a synchronization code,
Different types of synchronization codes 1-4 are arranged in the four synchronization code sections, respectively.

As shown in FIG. 4, synchronization code 1 is assigned to the synchronization code section immediately before the next compression reference period, and synchronization code 4 to 2 is assigned to the three previous synchronization code sections, respectively.
will be arranged.

A mode code section is provided following each synchronization code section. In other words, each compression standard U leap has 4
Each is provided. For example, each mode code section contains 64×1
The bit area is secured.

In this case, the end of the mode code section that follows the synchronization code section having synchronization code 1 is arranged so as to be located at the beginning of the next compression reference period.

The same data is allocated to the four mode code sections in each compression reference period. In this mode code section, data between image data, audio data, etc. to be arranged in the next compression reference period is arranged.

The following data can be considered as data between image data.

■Resolution data 256HX240V 512HX480V 768HX480V Others ■Frame data 30 frames/second 24 frames/second 20 frames/second 10 frames/second Others ■Signal type data Bright signal Y, red difference signal U, Blue difference signal V Red signal R1
Green signal G, blue signal B Other bit data 24 bits (8 [V, R] + 8 [U, G] + 8 [V, 81
) 16 bits (6 [Y] + 5 [U] + 5 [V] ) 9 bits (Y, U, V or R, G, 8 (7) compressed data) Other data between audio data is as follows. The following are possible.

■Encoding method data DPCM PCM (linear) PCM (nonlinear) Other ■Bit data 4 bits, 6 bits, 8 bits, 10 bits 12 bits, 16 bits, etc. ■Sampling frequency data 16 kHz, 32 kHz , 44. 1
kHz, 48 kHz, etc. ■ Channel number data 1 channel, 2 channels, etc. In addition to the data related to the image data and audio data described above, the data for the number of channels includes the scene data in the next compression reference period as described later. When there is a scene change, data indicating the presence or absence of a scene change is also arranged.

A control code section is provided following each mode code section. That is, four are provided for each compression period.

For example, an area of 23136×1 bits is secured in each control code section.

The same data is placed in the four control coat sections in each compression reference period. This control code section includes a microcode for decompressing image data to be placed in the next compression reference period, and is made compatible with compression methods such as the above during playback.

Although not shown in FIG. 4, a 736-bit guard area in which each bit is set to "0" is provided between the control code section and the synchronization code section.

As mentioned above, by distributing the same data to the four mode code sections and the control code section, during playback, the mode code and control code can be efficiently obtained no matter where the playback is started. The operation of the playback signal processing system can be smoothly controlled.

FIG. 6 shows the structure of recorded data when there is a scene change.

When there is a scene change, the distribution state of the image data is reset at a point in the middle of the compression reference period (time point telljM? in FIG. 6). That is, from time tc, the image area contains the reference image data VBN+2 after the scene change.
, differentially compressed image data Δcl, Δc2, etc. are sequentially arranged and recorded.

In addition, along with this, the recording state of data in the control area is also reset, and a synchronization code section having synchronization code 1 is provided immediately before the reference image data V B N+2. Data indicating that there is a scene change is placed in the mode code section of the compression reference period before the scene change.

1st t! 1 represents an example of a signal processing device used when recording and reproducing recorded data as shown in FIGS. 4 and 6 using DAT.

First, the recording system will be explained.

The NTSC color video signal S2 supplied to the video in terminal 11 is amplified by an amplifier 12 and then supplied to a decoder 13. A luminance signal Y, a red difference signal U, and a blue difference signal V are output from the decoder 13 and supplied to the A/D converter 14, respectively.

Further, the video signal SV output from the amplifier 12 is supplied to the 0 circuit 1 which is supplied to the synchronous separation and clock generation circuit 15.
From 5, frequency 8 synchronized with the synchronization signal of video signal S■
fsc/3 (fsc is the color subcarrier frequency of 3.158M
Hz) clock CKRI is output, and this clock C
KRI is A/D conversion! ! 14 as a sampling clock.

In the A/D conversion 1114, each of the signals Y%U and V(7) is sampled so that the number of samples in one effective horizontal period is 256, and converted into a digital signal with 8 bits per sample.

Signals Y, U, and ■ output from the A/D converter 14 are supplied to a movable terminal of a changeover switch 16.

Although the control line is not shown, the changeover switch 16 is controlled by a controller 110 including a CPU.
It is sequentially connected to all, bill, c side, a side, . . . during one frame period.

The fixed terminals on the side a to C of the changeover switch 16 are connected to the RAM 17.
It is connected to the input terminals of a to 17c. RAM l7a
~17c write/read is performed by RAM controller 1
20. In addition, RAM controller 1
The operation of 20 is controlled by controller 110.

The RAM controller 120 is supplied with the clock CKRI output from the circuit 6 and also supplied with the vertical synchronization signal VDR1 and the horizontal synchronization signal HDR as reference synchronization signals. Further, the controller 110 is supplied with a clock CKR2 having a frequency of 8 fsc output from the circuit 15 as a master clock, and a vertical synchronization signal VD.
R1 horizontal synchronization signal HDR is supplied as a reference synchronization signal.

Furthermore, the controller 110 receives a bit clock BCK (shown in FIG. 7B) from the DAT 130 and a clock LRCK (shown in FIG. 7B) for switching between left and right channels.
Same 1! IA) is provided as a reference clock for timing with DAT 130.

Note that the operation of the DAT 130 is controlled by the controller 110.

RAM17a to 17c each have a selector switch a=
During l frame periods connected to cll, the signal y,
For each of u and v, 256 pieces of sample data are written in the horizontal direction and 240 pieces of sample data in the vertical direction. Signals y written in these RAMs 17a to 17c,
256H x 240V for each of u and v
The data is read out twice in the next two frame periods.

The signal read out from the RAM 17a is transferred to the selector switch 1.
All of 8a, 18b, and 18c, respectively.

alPl is supplied to the fixed terminal on the c side. RAM17b
The signal read out from the selector switch 18a.

It is supplied to the b side, b side, and all fixed terminals of 18b and 18c, respectively. The signals read from the RAM 17c are supplied to the fixed terminals of the changeover switches 18a, 18b, and 18c on the cll, Cl11, and b sides, respectively.

Although the control lines are not shown, there are changeover switches 18a to 18c.
are switched and controlled by the controller 110. These changeover switches 18 & ~ 18c change the changeover switch 16 to the a side, the b side, the C side, all I, . . .
When sequentially connected to..., cll, am, bll, c
The changeover switches 18a to 18 are sequentially connected to ll, .
The output signals of c are respectively supplied to the image compression section 19. The operation of this image compression section 19 is controlled by a controller 110.

The image compression unit 19 performs the following processing on the first frame of image data among the 30 frames of image data constituting each compression reference period (lem). First, subsampling processing is performed, and the signals Y, U,
The number of samples in one frame for each of V is 1
/2. Next, the 24-bit data is compressed to 9 bits. Thereby, reference image data VBN is formed.

Moreover, for the image data of the 2nd to 30th frames,
The following processing is performed respectively. First, subsampling processing is performed to obtain signals Y and U.

The number of samples in one frame between each of ■ is 172
Next, 24-bit data is compressed to 9 bits. Furthermore, a difference from the reference image data is taken.

As a result, differentially compressed image data Δcl to Δc29 are formed.

Reference image data VBN and differentially compressed image data Δc1 to Δc2 formed by the image compression unit 19 in each compression reference period
9 are supplied to the video RAMs 22a to 22c via the connection switch 20 and the changeover switch 21, and are sequentially written to predetermined addresses.

Although the control lines are not shown, the connection switch 20 and the changeover switch 21 are controlled by the controller 110. The connection switch 20 is turned on during recording. The changeover switch 21 selects all, bl for each compression reference period.
It is connected sequentially to l, cll, all, and sea.

Writing/reading of the video RAMs 22a to 22c is performed by R.
Controlled by AM controller 120.

The reference image data VBN formed by the image compression unit 19 and the differentially compressed image data Δcl to Δc29 are written to the video RAMs 22a to 22c during one compression reference period (even if the changeover switches 21 are connected to a to cl, respectively). It will be done.

The reference image data VBN and the differentially compressed image data Δc written in these video RAMs 22a to 22c
l to Δc29 are read out during one common compression reference period.

Reference image data VBN and differentially compressed image data Δc1 to Δc2 read from video RAMs 22a to 22c
9 is supplied to the mixing circuit 24 via the changeover switch 23 and arranged in the image area of the recording data.

Although the control line is not shown, the changeover switch 23 is controlled by the controller 110. Changeover switch 23
are connected to the &C side, respectively, during a period when image data is read from the video RAMs 22a to 22b.

The operation of mixing circuit 24 is controlled by controller 110.

Further, the left and right channel audio signals SAL and SAR supplied to the audio in terminal 31 are amplified by an amplifier 32 and then supplied to an audio digital signal processor (audio DSP) 33.

The operation of the audio DSP 33 is controlled by the controller 110. In this audio DSP 33, the left and right channel audio signals SAL and SAR are each sampled with a 32k) (z clock), and further encoded using the ADPCM method using the RAM 34 so that one sample has 4 bits. As a result, 258,000 bits of audio data are formed corresponding to each compression reference period.

The audio data formed by the audio DSP 33 is supplied to the mixing circuit 24, and is added to the audio area of the recorded data by the fifth
Arranged as shown in the figure.

In this case, the audio data output from the audio DSP is controlled so as to correspond to the image data supplied to the mixing circuit 24.

Further, 25 is a circuit for generating control data such as a doro code, a mode code, and a control code. The operation of this generating circuit 25 is controlled by a controller 110. The control data output from the generation circuit 25 is supplied to the mixing circuit 24 and arranged in the control area of recording data.

In this way, recording data as shown in FIG. 4 is formed in the mixing circuit 24, and this recording data is transferred to DAT 1.
30 and recorded in DAT format.

Further, 26 is a scene change detection circuit.

This detection circuit 26 includes changeover switches 18a-18.
Two consecutive frames of signals are supplied from 0 to the image compression unit 19. And RAM controller 12
Data at a plurality of sample points are compared based on the comparison position signal starting from 0, and it is determined whether the difference exceeds a specified value. When the predetermined number or more exceeds the specified value, it is determined that a scene change has occurred, and the determination signal is supplied to the controller 110 and the RAM controller 120.

When a scene change occurs, the signal processing state is reset even during the 1 second compression reference period. In other words,
The image compression unit 19 starts forming the reference image data VBH based on the image after the scene change, and the changeover switch 21 is also switched to the next video RAM.

Note that the signal processing state of the audio system is also reset in the same way as the video system. The operation of the control data generation circuit 25 is also controlled, the generation timing of the synchronization code is controlled, and data indicating that a scene change has occurred is allocated to the mode code of the compression reference period before the scene change.

In this way, when there is a scene change, the mixing circuit 2
4, record data as shown in FIG. 6 is formed, and this record data is supplied to the DAT 130 and
It is recorded in this format.

FIG. 8 shows a timing chart of a recording system between a video signal and an audio signal.

A and B in the figure are a video signal SV1 and an audio signal SAL and SAR supplied to terminals 11 and 31, respectively. VGI, VG2,---AGI, AC2,
. . . are the video signal and audio (previous issue) of each compression reference period, respectively.

As shown in FIG.
Gl, CVG2, Φ... are sequentially written.

In addition, although not mentioned above, the RAM 34 also contains the above-mentioned video R.
Similar to AM22a to 22c, RAM a to C areas are provided, and as shown in the figure, audio DSP
Compressed audio data CAGI, C converted into ADPCM with 33
A G2, ·ψ· are sequentially written.

In this way, the video signal and the audio signal are processed at the same timing, and even if there is a scene change, the DAT 130 can store the compressed image data CV of each compression reference period.
Gl, CV G2,... and compressed audio data CAGI
, CAG2, . . .φ are recorded in correspondence (see E in the figure).

Next, the reproduction system will be explained.

Data as shown in FIGS. 4 and 6 reproduced from the DAT 130 is supplied to the separation circuit 41. The operation of the separation circuit 41 is controlled by the controller 110, and image data, audio data, and control data are separated from the reproduced data.

The control data separated by the separation circuit 41 is supplied to a control data discrimination circuit 42, where a synchronization code, mode code, and control code are discriminated, and the discrimination results are supplied to the controller 110.

Under the control of this controller 110, a reproduction signal processing system such as an image decompression section and an audio DSP 33, which will be described later, performs processing corresponding to the format and compression method of the reproduced image data and audio data.

This makes it possible to deal with any situation regarding the image data and audio data to be reproduced. In the following, a case will be described in which data as shown in FIG. 4 or 6 is reproduced.

Further, 43 is a synchronization signal and clock generation circuit. The operation of this generating circuit 43 is controlled by a controller 110. Then, from the generation circuit 43, the frequency 4
f sc/3 clock CK circle, vertical synchronization signal VD
P, a horizontal synchronizing signal HDP, and a clock CK P2 with a frequency of 8 fsc are output.

The RAM controller 120 is supplied with the clock CKPI output from the generation circuit 43, and also supplied with the vertical synchronization signal VDP and the horizontal synchronization signal HDP as reference synchronization signals. The controller 110 also has a clock CKP2 with a frequency of 8fsc output from the generation circuit 43.
is supplied as a master clock, and a vertical synchronization signal VDP and horizontal synchronization signal HDP are supplied as reference synchronization signals.

Further, reference image data VBN and differential compressed image data Δcl~ of each compression reference period are separated by the separation circuit 41.
Δc29 is the connection switch 44 and the changeover switch 45
The data is supplied to the video RAMs 22a to 22c via the video RAMs 22a to 22c, and sequentially written to predetermined addresses.

Although the control lines are not shown, the connection switch 44 and the changeover switch 45 are switched and controlled by the controller 110. The connection switch 44 is turned on during playback. The changeover switch 45 selects am, b@,
It is connected sequentially to the C side, the A side, . . .

Writing/reading of the video RAMs 22a to 22c is performed by R.
Controlled by AM controller 120. RAM2
2a to 22c have changeover switches 46 for a to c, respectively.
During one compression reference period connected to ll, the separation circuit 41
The reference image data VBN and the differentially compressed image data Δcl to ΔC29 separated by are written.

Reference image data VBN and differentially compressed image data Δc1 to Δ written in these video RAMs 22a to 22c
c29 is read out during the following one compression reference period.

Reference image data VBN and differentially compressed image data Δc1 to Δc2 read from video RAMs 22a to 22c
9 is supplied to the image expansion section 46 via the changeover switch 23. Although the control line is not shown, the changeover switch 23 is controlled by the controller 110. The changeover switch 23 is connected to the a side to cll, respectively, during a period when image data is read from the video RAMs 22a to 22c.

The operation of the image decompression section 46 is controlled by the controller 110 based on the control code as described above, and performs the opposite process to that of the image compression section 19.

In the image decompression unit 46, the following processing is performed on the reference image data VBH. First, 9 bits of data are expanded to 8 bits each for signals Y, U, and V. Next, interpolation processing is performed, and the signals y, u,
The number of samples in one frame for each of v is doubled. This forms the first frame of image data.

Further, the following processing is performed on each of the differentially compressed image data Δc1 to Δc29. First, the difference data is returned to 9-bit data using the reference image data.Then, the 9-bit data is converted into signals Y, U, V.
are expanded to 8 bits each.

Furthermore, interpolation processing is performed, and the signals Y, U, V
The number of samples in one frame between each is doubled. As a result, image data of the second frame to the 30th frame is formed.

Signals Y, U, V output from the image decompression unit 46
are supplied to a matrix circuit 47, and primary color signals R, G, and B output from this matrix circuit 47 are supplied to a D/A converter 48. The D/A converter 48 is supplied with a clock CKPI from the generation circuit 43. And D
/A converter 84B outputs analog primary color signal R,
G and B are video out terminals 49R and 4, respectively.
9G and 49B.

The terminal 50 is a synchronization signal output terminal, and this terminal 50 receives the decoded synchronization signal 5YNC output from the generation circuit 43.
is derived.

Further, the audio data separated by the separation circuit 41 is supplied to the audio DSP 33, where ADPCM multiplied signal demodulation is performed. The left and right audio signals SAL% SAR outputted from the audio DSP 33 are led out to the audio out terminal 36 via the amplifier 35.

Note that when a scene change occurs, the signal processing state is reset even during the 1 second compression reference period. In other words, the changeover switch 45 is switched and writing to the next video RAM is started. Even during the processing performed by the image decompression unit 46 after one compression reference period, the formation of the first frame of image data is started from the reference image data VBN after the scene change.

Note that the signal processing state of the audio system is also reset in the same way as the video system.

FIG. 9 shows a timing chart of a reproduction system between a video signal and an audio signal.

From DAT 130, compressed image data CVGL, CVG2, etc. of each compression reference period and compressed audio data CA
GI, CAG2, . . . are reproduced in correspondence (see FIG. 9A).

The video RAMs 22a to 22c contain reproduced compressed image data CVGI, CV G2, and
... are written sequentially.

In addition, in the RAM a - c area of the RAM 34, as shown in FIG.
, CA G2, . . . are sequentially written.

In this way, the compressed image data and compressed audio data are processed at the same timing, and the terminals 49R to 49B and 36
are the video signals VGI and V of each compression reference period, respectively.
G2, . . . and audio signals AGI, AC2, . . . are output in correspondence (see figure E@).

FIG. 10 is a flowchart showing the operation of the video system during normal playback.

In the figure, when the playback key of the keyboard 140 is turned on, a step 61 determines whether synchronization code 2, 3, or 4 has been entered manually.

When any of these sync codes are human-powered,
At step 52, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 53, it is determined whether synchronization code 1 has been input. When the synchronization code F'I is input, in step 64, one of the video RAMs (video R
AM22a to AM22c are used sequentially) and start inputting compressed image data for one compression reference period.

Next, in step 55, it is determined whether synchronization code 1 was entered manually. When synchronization code 1 is input, in step 56, manual input of compressed image data for one compression reference period to the next video RAM is started.

Next, in step 57, the video RA
The compressed image data written in M is sequentially read out and the image decompression section 46 starts decompression processing.

The image is then displayed on a monitor (not shown) connected to the terminals 49R to 49B.

Next, in step 58, it is determined whether synchronization code 1 has been input. When synchronization code 1 is input, it is determined in step 59 whether or not the stop key of keyboard 140 is on.

When the stop key is not on, the process returns to step 56 and repeats the above-described operation, while when the stop key is on, the playback operation is stopped.

Note that the decompression process in step 57 is based on the previous compression base?
! After the decompression process of the compressed image data written in any of the L Homma visit video RAMs 22a to 22c is completed,
Processing begins for the subsequent compression reference period.

Therefore, when there is a scene change in the middle, while the compressed image data of a certain compression reference period is being read out from the - video RAM and decompressed, the writing process of the compressed image data is performed across the other two video RAMs. (see pH in the scene change part of C0D in Figure 9), that is, the compressed image data (CVGN+1) before the scene change is written to one of the two video RAMs, and the compressed image data after the scene change is written to the other. Data (CV G
N+2) is written. In this sense, three videos R
AM22a-22c are used.

Although not mentioned above, as an IC that performs compression processing in the image compression section 19 and decompression processing in the image decompression section 46, there is, for example, Intel Corporation's compression/decompression IC [82750PB].

Next, special playback such as still playback and strobe playback will be explained.

First, still playback will be explained. The playback tape running speed in still playback is the same as in normal playback.

FIG. 11 is a flowchart showing the operation of still playback (first still playback) in which still images based on reference image data are sequentially displayed by manual operation.

In the figure, when the first still playback is designated by operating the keyboard 140, it is determined in step 61 whether synchronization code 2, 3, or 4 has been input manually.

When any of these sync codes are entered,
At step 62, the mode code and ii'JIII code placed following the synchronization code are taken into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 63, it is determined whether or not the synchronization code l was manually input. When synchronization code 1 is entered manually, step 64 is performed to access one of the video RAMs (Video RAM).
Reference image data is written into M22a to M22c (used sequentially).

Next, in step 65, the reference image data is read from the video RAM, and the image decompression section 46 performs decompression processing to form image data for one frame, and stores the image data for one frame in the memory. Store.

Then, image data for one frame is repeatedly read out from this memory, and a still image based on the reference image data is displayed on a monitor connected to terminals 49R-49B.

Next, in step 66, the DAT 130 is placed in a playback pause.

Next, in step 67, it is determined whether the playback key on keyboard 140 is on. If the playback key is on, the playback pause state of the DAT 130 is released in step 68, and the process returns to step 61. Then, by the same operation as described above, a still image based on the reference image data of the next compression reference period is displayed.

If the playback key is not on in step 67, it is determined in step 69 whether the stop key on keyboard 140 is on. If the stop key is not on, the process returns to step 67.

In step 69, when the stop key is on, the first
Stops the still playback operation.

FIG. 12 is a flowchart showing the operation of still playback (second still playback) in which still images based on reference image data immediately after a scene change are sequentially displayed by manual operation.

In the figure, when second still playback is designated by operating the keyboard 140, it is determined in step 71 whether synchronization code 2, 3, or 4 has been input.

When any of these sync codes are entered,
In step 72, the mode code placed next to the synchronization code is loaded into the control area, and in step 73, based on data indicating the presence or absence of a scene change in the mode code,
It is determined whether there is a scene change or not. If there is no scene change, the process returns to step 71.

When there is a scene change, the control code placed following the mote code is fetched in step 74.

Then, based on the mode code and the control code, the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 75, it is determined whether the synchronization court 1 has been manually operated. When the synchronization code l is entered manually, in step 76 any video RAM (Video RAM
22a to 22c are used sequentially) to write the reference image data immediately after the scene change.

Next, in step 77, the reference image data is read from the video RAM, and the image decompression unit 46 performs decompression processing to form image data for one frame, and stores the image data for one frame in the memory. Store.

Then, image data for one frame is repeatedly read out from this memory, and a still image based on the reference image data immediately after the scene change is displayed on the monitor connected to the terminals 49R-49B.

Next, in step 78, the DAT 130 is placed in a playback pause state.

Next, in step 79, it is determined whether the playback key on the keyboard 140 is on. If the playback key is on, the playback pause state of the DAT 130 is released at step 8o, and the process returns to step 71. Then, by the same operation as described above, a still image based on the reference image data immediately after the next scene change is displayed.

If the playback key is not on in step 79, it is determined in step 81 whether the stop key on keyboard 140 is on. If the stop key is not on, the process returns to step 79.

In step 81, when the stop key is on, the second
Stops the still playback operation.

FIG. 13 shows still playback (3rd stage) in which still images based on reference image data are automatically displayed sequentially at predetermined time intervals.
12 is a flowchart showing the operation of still playback. Steps corresponding to those in FIG. 11 are indicated with the same reference numerals.

In the figure, after the DAT 130 is placed in a reproduction pause state in step 66, it is determined in step 91 whether or not time t has elapsed.

When time t has elapsed, it is determined in step 92 whether the stop key of keyboard 140 is on. If the stop key is not on, then in step 68 the DAT
The playback pause state of 130 is released and the process returns to step 61.

Step 92, when the stop key is on, the third
Stops the still playback operation.

The rest is the same as the example in FIG. 11.

In this third still playback, still images based on the reference image data of each compression reference period are automatically displayed on the monitor one after another at time intervals determined by time t.

Figure 14 shows still playback (fourth stage) in which still images based on standard image data immediately after a scene change are automatically displayed one after another.
12 is a flowchart showing the operation of still playback. Steps corresponding to those in FIG. 12 are indicated with the same reference numerals.

In the figure, after the DAT 130 is placed in a playback pause state in step 78, it is determined in step 94 whether or not time t has elapsed.

When time t has elapsed, it is determined in step 95 whether the stop key of keyboard 140 is on. If the stop key is not on, at step 80, the DAT
The reproduction pause state of 130 is released, and the process returns to step 71.

In step 95, when the stop key is on, the fourth
Stops the still playback operation.

The rest is the same as the example in FIG. 12.

In this fourth still playback, the next scene change is detected after time t has elapsed, and still images based on the reference image data immediately after the scene change are automatically displayed on the monitor one after another.

Note that when the pause key of the keyboard 140 is turned on to enter the playback pause state during the normal playback operation shown in the flowchart of FIG. It is also possible to configure a still image to be displayed on a monitor so that a still image of an arbitrary frame can be monitored.

Next, strobe playback will be explained. The playback tape running speed in strobe playback is the same as in normal playback.

FIG. 15 is a flowchart showing the operation of strobe playback.

In the figure, when strobe playback is designated by operating the keyboard 140, it is determined in step 151 whether synchronization code 2, 3, or 4 has been input.

When any of these sync codes are human-powered,
At step 152, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 153, it is determined whether synchronization code l has been input. When synchronous court 1 is manually operated,
In step 154, one of the video RAMs (Video R
AM22a to AM22c are used sequentially) and start inputting compressed image data for one compression reference period.

Next, in step 155, it is determined whether synchronization code 1 has been input. When synchronous code 1 is input,
In step 156, N=0 is set, and in step 15
7, L=1 is set, and in step 158, input of compressed image data for one compression reference period to the next video RAM is started.

Next, in step 159, video R is
The reference image data written in the AM is read out and expanded by the image expansion section 46. And terminals 49R to 49
A still image based on the reference image data is displayed on a monitor (not shown) connected to B.

Next, in step 160, N:N+1 is set, and the differentially compressed image data ΔcN is read out from the video RAM and decompressed.

Next, in step 161, it is determined whether N is equal to LXM+1. Here, M is the number of frame skips in strobe display, and is set in advance using the keyboard 140.

In step 161, if they are not equal, in step 16
Returns to 0 and performs the same processing as described above. On the other hand, if they are equal, a still image based on the differentially compressed image data ΔcN is displayed on the monitor in step 162.

Next, in step 163, it is determined whether synchronization code 1 has been input. When synchronization code 1 is not input, L=L+1 is set at step 164, and step 1
Returning to step 60, the same operation as described above is performed.

When the synchronization code I is entered manually in step 163, it is determined in step 165 whether or not the stop key of the keyboard 140 is on.

When the stop key is not on, the process returns to step 156 and the same operation as described above is repeated, while when the stop key is on, the strobe playback operation is stopped.

In such a strobe playback operation, in each compression reference period, still images based on image data of every M frame are sequentially displayed on the monitor, so-called strobe display.

Next, fast-forward playback will be explained.

FIG. 16A shows reproduced image data during normal reproduction, and VBI, VB2, . . . are reference image data of each compression reference period, and are reproduced at 1 second intervals during normal reproduction.

In this example, when certain reference image data, for example VBI, is played back, the playback tape running speed of the DAT 130 is doubled from the normal speed and run for 2 seconds, and then the playback tape running speed is returned to the normal speed and the next The reference image data is reproduced (as shown in Figure B).

Thereafter, similar operations are repeated.

The reason why the reproduction tape running speed is returned to normal before reproducing the reference image data is to allow the rotary head to scan correctly without crossing the recording track.

By the above-described playback operation, the reference image data VBI,
VB6, VB 111. , , regenerate.

Note that in the portion shown by the broken line, the rotary head scans across the recording track, and correct image data cannot be obtained.

The reference image data VBI, VB6, reproduced in this way
As shown in the figure, V BIL is sequentially written into the video RAMs 22a to 22c.

Then, the reference image data written in the video RAMs 22a to 22c is read out, supplied to the image expansion section 46, and expanded, thereby forming image data for one frame. Then, the still image based on the image data for one frame continues to be displayed until the image data for one frame is formed using the next reproduced reference image data (E in the same figure).
(illustrated).

In this way, during normal playback, the contents displayed at intervals of 5 seconds (for example, images based on the reference image data VB1 and VB6) are changed by the above-described playback operation to 3.
Displayed at intervals of 15 seconds. Therefore, 5/3
．． 15: Fast-forward playback is performed at about 1.6 times.

FIG. 17 is a flowchart showing the operation of this fast-forward playback.

In the figure, when fast-forward playback is specified by operating the keyboard 140, the controller 110 moves to step 171.
The DAT 130 is controlled to be in a normal speed playback state.

Next, in step 172, it is determined whether or not the same daylight code 2, 3, or 4 has been input.

When any of these sync codes are human-powered,
At step 173, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 174, it is determined whether synchronization code l has been input. When sync code 1 is input,
In step 175, one of the video RAMs (Video R
A M 22 a to 22 c are used sequentially) to write reference image data.

Next, in step 176, the reference image data is read from the video RAM, and the image decompression section 46 performs decompression processing to form one frame worth of image data, and this one frame worth of image data is stored in the memory. Then, image data for one frame is repeatedly read out from this memory, and a still image based on the reference image data is displayed on the monitor connected to the terminals 49R to 49B.

Next, in step 177, the controller 110 controls the DAT 130 to double the tape running speed.

Next, in step 178, it is determined whether two seconds have elapsed. When two seconds have elapsed, it is determined in step 179 whether the stop key on keyboard 140 is on.

When the stop key is not on, the process returns to step 171 and the same operation as described above is performed, and when the stop key is on, fast-forward playback is stopped.

In the above description, an example was shown in which fast-forward playback at a speed of about 1.6 times is performed, but fast-forward playback at any speed is possible by adjusting the playback tape running speed and running time.

Next, slow playback will be explained.

FIG. 18A shows reproduced image data during normal reproduction, and CVGL CVG2, φ... are compressed image data (reference image data VBN and differential compressed image data Δcl to ΔC29) of each compression reference period. , are played back sequentially every second during normal playback.

In this example, the DAT 130 is placed in a normal speed playback state for three compression reference periods, then put into a playback pause state for the same period of time, and so on.

By the operation of AT 130 as described above,
As shown in , compressed image data (CV
GI-CVG3) is played back consecutively, and then after the same period, the compressed image data (CVG
4 to CVG6) are played continuously. Hereinafter, the same process will be repeated.

The compressed image data cVGL CVG2 of each compression reference period reproduced in this way is sequentially written into the video RAMs 22a to 22c as shown in FIG.

The compressed image data written in the video RAMs 22a to 22c is then read out and supplied to the image decompression section 46 for decompression processing. In this case, in the same way as during normal playback, 30 frames worth of image data VGI, VG2, . . . are generated from the compressed image data CVGLCVG2, .
is formed.

Then, a moving image based on the image data VGI% VG2, φ゛φ conflict is displayed on the monitor, but the same screen is displayed continuously two frames at a time. In other words, image data VG
The time axes of the moving images of I, VG2, . . . are expanded twice and displayed (as shown in the figure).

In this way, the time axis of the moving image displayed on the monitor is expanded by twice, so that a 1/2 slow-motion image is displayed on the monitor.

FIG. 19 is a flowchart showing the operation of this slow playback.

In the figure, when slow playback is specified by operating the keyboard 140, in step 181, the controller 110
The DAT 130 is controlled to be in a normal speed playback state.

Next, in step 182, it is determined whether synchronization code 2, 3, or 4 has been input.

When any of these sync codes are entered,
At step 183, the mode code and control code placed following the synchronization code are loaded into the control area, and the image expansion section 46 and the like are set to operate in accordance with the compressed image data to be reproduced.

Next, in step 184, N=0 is set, and then in step 185, it is determined whether synchronization code 1 has been input.

When synchronization code 1 is input, N=N+1 is set at step 186, and then N=N+1 is set at step 187.
2 or not is determined. If N=2, proceed directly to step 188; if N=2, proceed to step]
89, the process proceeds to step 18B.

In step 189, reading of compressed image data for three compression reference periods that are continuously written to the video RAMs 22a to 22c is started, and the image decompression section 46 starts decompression processing, and the monitor connected to the terminals 49R to 49B (see FIG. (not shown)
Display video images.

In this case, the same screen is displayed continuously two frames at a time.

In step 188, manual input of compressed image data corresponding to one compression standard arr+ is started in one of the video RAMs (the video RAMs 22a to 22c are sequentially used).

Next, in step 190, it is determined whether synchronization code 1 has been input. When sync code 1 is input,
At step 191, it is determined whether N=3. N
If not equal to 3, the process returns to step 186 and the same operations as described above are repeated.

When N=3, in step 192, the DAT 13o is i#Jlled by the controller 110, and is placed in a playback pause state. At this point, the video RAM 22a
22c, compressed image data corresponding to three consecutive compression standards UJl'llff are written.

Next, in step 193, it is determined whether the same time T3 as the three compression reference periods described above has elapsed.

Here, the reason why it is not set to 3 seconds is because the 3 compression reference periods may become shorter than 3 seconds when there is a scene change as described above.

Next, in step 194, the DAT 130 is controlled by the controller 110 to release the playback pause state, and in step 195, N=0 is set, and then step 1
At 96, it is determined whether the stop key on keyboard 140 is on.

When the stop key is not on, the process returns to step 186 and repeats the above-described operation, while when the stop key is on, the slow playback operation is stopped.

Note that the above description is based on an example in which the normal speed playback state for 3 compression reference periods and the playback pause state for the same period are repeated, but the 3 compression reference periods correspond to the three video RAMs 22a to 22C. However, it is not limited to this. For example, it is also possible to use one compression standard interval or two compression standard intervals.

Furthermore, although the above example shows an example in which 1/2 slow playback is performed, slow playback at any speed is possible by adjusting the pause period. For example, if the pause period is twice the compression reference period played back at normal speed,
If the same a-frame screen is displayed, the time axis of the moving image displayed on the monitor is expanded three times, resulting in 1/3 slow playback.

Next, reverse playback will be explained.

In order to realize reverse playback, the recorded data is structured as shown in FIG. The data structure of the control area is changed with respect to the example in FIG. 4.

That is, four synchronization codes IA~4 are used in each compression reference period.
A and mode codes IA to 4A are arranged. These are similar to the synchronization code and mode code in the example of FIG.

In the one shown in FIG. 20, the synchronization code IA
~4A, symmetrical position with mode code IA~4A (4th
In the example shown, the control coat area) has synchronization codes IB to 4B.
, mode codes IB to 4B are arranged.

Synchronization codes IA to 4A and mode codes IA to 4A can be detected during normal playback, while synchronization code IB
~4B and mode code IB-4B can be detected during reverse playback.

Similar to the mode codes in the example of FIG. 4, mode codes IA to 4A contain data corresponding to the next compression reference period in the normal reproduction direction.

Mode codes IB to 4B contain data corresponding to the next compression reference period in the reverse playback direction.

In addition to data similar to mode codes IA to 4A, this includes differential compressed image data Δc in the next compression period.
Variation data on the amount of data l to Δc29, data on whether or not the period is immediately before the occurrence of a scene change, data on the period in that case, etc. are arranged.

In the above description, the amount of data of the differentially compressed image data ΔC1 to ΔC29 is fixed, and therefore the arrangement position of each differentially compressed image data is fixed. However, as described later, differentially compressed image data Δcl to Δ
The amount of data of c29 may be varied to improve the performance of image data. In this case, the arrangement position of each differentially compressed image data changes. Therefore, as will be described later, in order to control the addresses of the video RAMs 22a to 22c during reverse playback and write playback data from the reverse direction to exactly the same address as during normal playback, each differentially compressed image data Δcl
It is necessary to consider the data amount of ~Δc29.

This is the mode code, differentially compressed image data Δcl~
This is the reason why the fluctuation data of the data amount of Δc29 is arranged.

This variation in data amount will be described later.

By configuring the recorded data as shown in FIG. 20, during normal reproduction, the reproduction operation is performed using the synchronization codes F'IA-4A and the mode codes IA-4A.

Furthermore, during reverse playback, the playback operation is performed using synchronization codes IB-4B and mode codes IB-4B. In this case, the addresses of the video RAMs 22a to 22c are controlled based on the fluctuation data of the data amount of the differentially compressed image data arranged in the mode codes IB to 4B, and the addresses of the video RAMs 22a to 22c are controlled from the opposite direction to exactly the same addresses as in the case of normal playback. Playback data is written.

As a result, the subsequent decompression processing in the image decompression section 46 is performed in the same manner as during normal playback, and a reverse playback screen is displayed on the monitor.

It should be noted that with the structure of the recorded data as shown in FIG. 20, still playback in the reverse direction, fast forward playback, and slow playback can be performed in the same way.

Next, fluctuations in the amount of data of the differentially compressed image data Δc1 to Δc29 will be explained.

FIG. 21 shows an example of realizing variation in data amount.

As in the case where the amount of data is fixed, 276,480 bits are provided as the area for the reference image data.

Also, the differentially compressed image data ΔC! As the area of ~Δc29, there are 31 areas 81~ of 27200 bits each.
B31 is provided. The total area is 843,200 bits.

27200x31=843200 bits The image area of one compression reference period is 1152000 bits as described above, and the remaining 32320 bits are used for fixed length adjustment.

Reference image data is arranged in the reference image data area. This is similar to the case where the amount of data is fixed as described above.

Also, basically, the differentially compressed image data Δcl to Δc2
9 are placed in areas 81 to B29, respectively, but if the image changes rapidly from an image with little movement to an image with large movement and the differentially compressed image data cannot be accommodated in the 27200-bit area, two or more area is used.

In this way, when two or more areas are used for one piece of differentially compressed image data, the information is placed and recorded at the beginning of the control code, for example, as shown in the figure.

Data 1 to 29 indicating differentially compressed image data using two or more areas are arranged in the block number section. Also,
In the number part, data indicating the number of areas to be used (for example, 2 is "0" and 3 is "1") is arranged.

For example, when two areas are used for each of the differentially compressed image data Δc5 and Δc20, the first block number part data is "5" and the number part data is "5".
0'', ``20'' as the next block number part data, and ``0'' as the number part data.

As a result, image data ΔC1 to ΔC4 are arranged in areas 81 to B4, respectively, image data Δc5 is arranged in areas B5 and B6, image data Δc6 to Δc19 are arranged in areas 87 to B20, respectively, and image data Δc5 is arranged in areas 87 to B20, respectively. Δc20
is arranged in areas B21 and B22, and image data Δc2
1 to Δc29 are shown to be arranged in regions 823 to B31, respectively.

At the time of playback, this information is taken into the controller 110, and the addresses of the video RAMs 22a to 22c are controlled, so that the playback signal processing is performed correctly as in the case where the amount of data of each differentially compressed image data is fixed. Ru.

FIG. 22 shows another example of realizing variation in data amount.

As in the case where the amount of data is fixed, 276,480 bits are provided as the area for the reference image data.

Moreover, the area of differentially compressed image data Δcl to Δc29 is
Only the bits corresponding to the amount of data are provided.

Then, differentially compressed image data Δc provided in the image area
1 to Δc29, the control area includes video RAMs 22a to 22 which are written during playback.
The address information of 2c is arranged as, for example, one-day bit data.

During playback, this address information is taken into the controller 110, and the addresses of the video RAMs 22a to 22c are controlled, so that the playback signal processing is performed correctly as in the case where the data amount of each differentially compressed image data is fixed. be made into

By varying the amount of data as shown in FIGS. 21 and 22, it is possible to record and reproduce differentially compressed image data with an amount of data that corresponds to the image condition, and the performance of the image data can be improved. .

In addition, from the perspective of being able to use the image area effectively, the second
Although the example in FIG. 2 is better, the example in FIG. 21 is better from the viewpoint of effective use of the control area.

Next, time code will be explained.

Although not mentioned above, it is conceivable to arrange a time code in the control area of recording data.

In the above example, the synchronization code section is 64 bits, but as shown in FIG. establish.

Like the synchronization code section and the mode code section, for example, four time code sections are provided in one compression reference period (1 second), and the same data is allocated to the four time code sections.

The 16-bit data in the time code section represents, for example, absolute time (seconds). In this case, each digit of the decimal number is represented by a 4-bit binary number, so-called BCD (2
If it is data (evolved), it can represent time from 0 to 9999 seconds. Also, if it is 16-bit binary data, 0
It can represent a time of ~(216-1) seconds.

During playback, by importing the time code recorded in this way, it can be used to control searches, display of remaining tape capacity, position adjustment during editing, etc.

In addition, by using the time code mentioned above, 1
Searches can be performed with an accuracy of seconds, but by using different types of synchronization codes 1 to 4, searches can be performed with an accuracy of 174 seconds.

Furthermore, as described above, by using the variation data of each differentially compressed image data arranged in the control area, it becomes possible to search with frame accuracy, which is effective for screen adjustment during editing, for example.

Note that the structure, arrangement position, and number of bits of the time code are not limited to the example shown in FIG. 23. For example, the time code structure may be expressed in hours, minutes, and seconds.

Next, by using the signal processing device shown in FIG.
The signal with the data structure of the example in Figure 4 or the example in Figure 20 is DA
An example will be described in which a tape recorded with T is digitally dubbed using two DATs.

FIG. 24 shows a configuration for digital dubbing using two DATs.

In the same figure, 201 is the DAT on the master side, and 201 is the DAT on the master side.
02 is a DAT on the slave side. These DAT201
and 202 are connected by a so-called digital audio interface DAI, and DAT2
From 01 to DAT202, in order to synchronize both,
Synchronizing signals such as , clock, clock, and clock BCK are supplied.

Further, the DAT 201 supplies the DAT 202 with various control flags for controlling the operation of the DAT.

Further, the DAT 201 is equipped with at least a video reproduction circuit of the signal processing device shown in the example in FIG. 1, and a monitor 20361 is connected to the video out terminal.

Further, the DAT 201 is provided with a dubbing start key 201a, a dubbing stop key 201b, and a dubbing period setting key 201C in addition to normal recording/reproducing keys (not shown).

First, the 251st! An example of executing dubbing for an arbitrary period while monitoring the playback screen will be described in accordance with the flowchart of I. In addition, in this dubbing example, as in the example in FIG. 20, in addition to the synchronization code IA-4A,
It is necessary that synchronization codes IB to 4B for reverse playback be arranged and recorded.

When the dubbing start key 201a is turned on and dubbing is instructed while the DAT 201 is in the normal playback state and a moving image is displayed on the monitor 203, step 211
Then, the recording pause flag is supplied from the DAT 201 to the recording pause flag 202, and the DAT 202 is placed in a recording pause state.

Next, in step 212, the frame image data at the time when the dubbing start key 201a was turned on is sequentially read out from the image expansion section 46, and a still image is displayed on the monitor 203.

Next, in step 213, the DAT 201 starts reverse playback. Even during this reverse playback, still images continue to be displayed on the monitor 203.

Next, in step 214, it is determined whether the synchronization code IB was entered manually. When the synchronization code IB is manually operated, it is determined in step 215 whether or not the synchronization code 4B is manually operated. When synchronization code 4B is input, it is determined in step 216 whether synchronization code 3B has been input.

At step 216, when the synchronization code F' 3 B is input, step 21? Then, the reverse playback of the DAT 201 is stopped.

Next, in step 218, a pause release flag is supplied from the DAT 201 to the DAT 202, and the DAT 202 is placed in a recording state.

Next, in step 219, normal playback of the DAT 201 is started, and the digital audio interface DAI
The reproduced data is supplied to the DAT 202 via the DAT 202, and recording is started.

Then, in step 220, the monitor 203ζ starts displaying a moving image.

Next, in step 221, it is determined whether the dubbing stop key 201b is on. When the dubbing stop key 201b is on, the synchronization coat I
It is determined whether A was made manually. When the synchronization code IA is manually generated, the synchronization code F' is inputted in step 223.
2 A is input].

When the synchronization court 2A is operated manually, the step 22
4, a recording stop flag is supplied from the DAT 201 to the DAT 202, the DAT 202 is placed in a stopped state, and recording is stopped.

Then, in step 225, reproduction of the DAT 201 is stopped, and the dubbing operation is ended.

According to the dubbing example shown in FIG. 25, a still image based on the frame image data at the time when the dubbing start key 201a is turned on is displayed, so that it is possible to confirm the image at which dubbing is to be started. Furthermore, the synchronization code 4A is controlled based on the synchronization code.

It is recorded from the part immediately before 4B, and the synchronous court 2A
, 2B, the necessary parts can be recorded efficiently.

Next, an example will be described in which dubbing for an arbitrary period is executed while monitoring the playback screen along the flowchart of FIG. 26. It should be noted that this dubbing example can be applied to recording in either the configuration shown in the example shown in FIG. 4 or the example shown in FIG. 20. In the figure, synchronization codes 1 to 4 correspond to synchronization codes IA to 4A in the example of FIG. 20.

When the dubbing start key 201a is turned on and dubbing is instructed while the DAT 201 is in the normal playback state and a moving image is displayed on the monitor 203, step 231
Then, the recording pause flag is supplied from the DAT 201 to the recording pause flag 202, and the DAT 202 is placed in a recording pause state.

Next, in step 232, it is determined whether synchronization code 3 was entered manually. When sync code 3 is entered,
In step 233, a pause release flag is supplied from the DAT 201 to the DAT 202, and the DAT 202 is placed in a recording state. As a result, recording of playback data supplied from the DAT 201 via the digital audio interface DAI is started.

Next, in step 234, it is determined whether the dubbing stop key 201b is on. When the dubbing stop key 201b is on, it is determined in step 235 whether synchronization code 1 has been input. When synchronization code 1 is input, it is determined in step 236 whether synchronization code 2 has been input.

When synchronization code 2 is input manually,
At step 37, the DAT 201 supplies 202t: Tomiki recording stop flag, the DAT 202 is placed in a stopped state, and recording is stopped.

Then, in step 238, reproduction of the DAT 201 is stopped, and the dubbing operation is ended.

In the dubbing example shown in Fig. 26, the control based on the synchronization code records from the part immediately before synchronization code 4, and also records up to the part immediately after synchronization code '2, so that the necessary parts can be efficiently recorded. can.

Next, an example of dubbing during a set dubbing period will be described in accordance with the flowchart of FIG. 27. In addition, this dubbing example ζ is the 23rd! ! I
As shown in the figure, the time code force 1B can be applied to those that are self-recorded.

First, in step 241, the dubbing period setting key 201
The dubbing start time and dubbing end time are set using c. The time is input as, for example, hours, minutes, seconds.

Next, in step 242, when the dubbing start key 201a is turned on, in step 243, DAT20! The recording pause flag is supplied to the DAT 202.
is considered to be in a recording pause state.

Next, in step 244, playback of the DAT 201 is started, and in step 245, the time code detected from the control area of the playback data is "dubbing start time - 1 second".
It is determined whether or not. When the time code is "dubbing start time - 1 second", it is determined in step 246 whether synchronization code 3 has been input.

In step 246, when the synchronous court 3 is manually operated, in step 247, a pause release flag is supplied from the DAT 201 to the DAT 202, and the DAT 202 is placed in a recording state. As a result, recording of playback data supplied from the DAT 201 via the digital audio interface DAr is started.

Next, in step 248, it is determined whether the time code detected from the control area of the reproduced data is "dubbing end time + 1 second". When the time code is "dubbing end time + 1 second", in step 249, the DA
A recording stop flag is supplied from T201 to 202, and DA
T 202 is placed in a stopped state and recording is stopped.

Then, in step 250, reproduction of the DAT 201 is stopped, and the dubbing operation is ended.

According to the dubbing example shown in FIG. 27, dubbing for a set period can be automatically performed. Further, by controlling based on the synchronization code, the data is recorded starting from the part immediately before synchronization code 4, and is also recorded up to the part immediately after synchronization code 2, so that the necessary part can be efficiently recorded.

In addition, in the example in FIG. 24, the DAT20 on the master side
Although the DAT 202 on the slave side is provided with operation keys and is operated by keys, it is also possible to configure the DAT 202 on the slave side to be operated by keys.

By the way, in the above example, only image data for a moving image is recorded, but it is also possible to record image data for a still image by switching.

In this case, as shown in FIG. 28, after certain moving image compressed image data is arranged, still image image data St,
S2, . . . are recorded.

In this way, recording of image data S1, S2, etc. for still images can be easily realized using the signal processing apparatus shown in FIG. 1.

In other words, the image data of each frame that is manually entered into the RAMs 17a to 17c in sequence is read out and recorded as still image data in the data area.

In this case, the image compression unit 19 performs compression processing to make the image data S1, S2, . . . for still images the same as the reference image data VBN for moving images.
Image data for still images of higher image quality can be recorded by enlarging the area and recording with a reduced rate or without compression.

According to the signal processing device shown in the example in Figure 1, 3 frames (7)
Since it has the RAMs 17a to 17c, even if the image data for still images is of high image quality, it is possible to record at least three consecutive frames, so-called continuous shooting of three images.

In addition, as shown in FIG. 28, image data S for still images
A synchronization code section and a mode code section are provided in the control areas immediately before the start of each of S1, S2, . . . . In the mode code section, data indicating the still image mode is arranged.

During playback, control is performed to shift from moving image playback processing to still image playback processing based on data indicating that the still image mode is detected from the control area of the playback data.

In the example shown in FIG. 28, image data S for still images
1. S2. ... are arranged consecutively, but they may be arranged at predetermined intervals.

In the above embodiment, for the total number of bits of the digital signal recorded and reproduced in the DAT, which is 16 bits,
12 bits are used for the image area, 3 bits are used for the audio area, and 1 bit is used for the control I area, but it goes without saying that the number of bits and the arrangement position are not limited to these.

In the above embodiment, the video signal is NTSC.
This is an example of handling C method, but PA
Video signals of other formats such as L format or SECAM format can also be handled in the same way. In that case, changes will be required depending on the number of frames, etc. For example, when the number of frames is 25 frames/second, there are 24 pieces of differentially compressed image data from Δcl to Δc24.

Further, in the above-described embodiments, the recording/reproducing apparatus is a DAT, but the present invention can be similarly applied to a disc or an optically recorded recording medium.

[Effects of the Invention] As described above, according to the present invention, not only audio signals but also video signals for moving pictures can be simultaneously digitally recorded and reproduced through compression processing. therefore,
A very convenient recording and reproducing device, such as a DAT, can be obtained.

Furthermore, since the recording signal processing and reproduction signal processing of the digital video signal and digital audio signal are performed at the same timing using the compression reference period as a unit, the timing of the reproduced image and audio are always the same, and the timing of the reproduced image and audio is always the same. It is possible to avoid a situation where the audio is out of sync.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a signal processing device according to the present invention, FIGS. 2 to 6 are diagrams for explaining recorded data, and FIGS. 7 to 9
The figure is a diagram for explaining the example in Figure 1, Figure 10 is a flowchart showing the operation during normal playback, Figures 11 to 15 are flowcharts showing the operation in still playback, and Figure 16 is the operation in fast forward playback. 17 is a flowchart showing the operation of fast-forward playback, FIG. 18 is an explanatory diagram of the operation of slow playback, FIG. 19 is a flowchart showing the operation of slow playback, and FIG. 20 is a flowchart showing the operation of reverse playback. Figures 21 and 22 are diagrams showing the configuration of recorded data when varying the amount of data, Figure 23 is a diagram for explaining time codes, and Figure 24 is a diagram for explaining digital dubbing. FIGS. 25 to 27 are flowcharts showing the dubbing operation, and FIG. 28 is a diagram showing the structure of recording data when switching between moving images and still images. 17a-17c. 22a to 22c -RAM ・・Image compression unit ・・Video RAM ・・Mixing circuit ・・Control data generation circuit ・・Scene change detection circuit ・・Audio DSP ・・・Separation circuit ・・Control data discrimination circuit ・・Image expansion unit・・Controller・RAM controller 130゜201, 202 φ φ ・DAT 140＠・-Keyboard 203 meeting・φ monitor 1/(48Hz x 2) Digital signal format system *G area (I pit) Still playback (1st Still playback) Fig. 11 Still playback (3rd still playback) ■ 3 Fig. 17 Fig.

Claims (1)

[Claims] (1) A digital signal of N bits (N is an integer) is recorded and reproduced, and a portion of the N bits forms an image area, an audio area, and a control area, respectively, and the image area in each compression reference period is In the above, compressed digital video signals for multiple screens constituting a moving image are arranged, and digital audio signals for the compression reference period are arranged in the audio area in each compression reference period, and the digital video signal is A digital signal recording and reproducing method in which recording signal processing and reproduction signal processing of a digital audio signal are performed at the same timing using the compression reference period as a unit.