JPH0448411A - Data pulse reproducing circuit for magnetic disk device - Google Patents

Abstract

PURPOSE:To prevent an omission in a data pulse at the part of a signal amplitude decreased from a constant amplitude due to the delay of an AGC flow-up by holding successively the peak value of the waveform amplitude of an AGC output as a slice level signal, and preparing the data pulse from the peak part of an AGC output waveform exceeding this peak holding value. CONSTITUTION:This circuit is equipped with a peak holding means 20 which holds successively the peak value of the AGC output signal, and outputs the peak value to a gate signal preparing means 16 as the slice level signal. At this time, the AGC output signal inputted to a differentiation circuit 14 and a gate signal preparing means 16 against the AGC output signal inputted to the peak holding means 10 is delayed in the prescribed time so that the peak holding means 20 can precede the differentiation circuit 14 and the gate signal preparing means 16. Then, the differentiation circuit 14 differentiates the AGC output signal, and the peak holding means 20 holds successively the peak value after rectifying the AGC output signal and converting it to a unipolar signal waveform. Thus, the gate signal corresponding to the amplitude peak part can be certainly prepared, and the omission in the data pulse can be surely prevented.

Description

Detailed Description of the Invention [Summary] Regarding a digital data pulse reproducing circuit of a magnetic disk device that reproduces an original digital data pulse signal from a reproduced signal read from a head, the signal amplitude decreases from a constant amplitude due to AGC tracking delay. In order to prevent pulse dropout in the part where the pulse is
The data pulse is generated from the peak portion of the C output waveform.

[Field of Industrial Application] The present invention relates to a data pulse reproducing circuit for a magnetic disk device that reproduces an original digital data pulse signal from a reproduced signal read from a head.

In recent years, magnetic recording devices such as magnetic disk devices have been required to have a larger capacity. With the demand for larger capacity, the data bit interval on the recording medium has become narrower, and the playback signal read from the head has become smaller between the bits. The peak value tends to decrease due to interference. The reproduced signal from the head is made to have a constant amplitude by AGC amplification. However, in the part where the waveform amplitude suddenly decreases, the amplitude does not become constant due to the AGC tracking delay, but partially decreases, and the data pulse signal based on the peak differentiation cannot be reproduced because the amplitude falls below the slice level for peak detection. In some cases, it is desirable to prevent data pulses from being dropped due to such fluctuations in the reproduced signal.

[Prior Art] Conventionally, a digital data pulse signal reproducing circuit for a magnetic disk device has a configuration shown in FIG.

In FIG. 4, the reproduced signal read from the head 10 is amplified to some extent by the preamplifier 22 and input to the AGC amplification circuit 12. The AGC amplifier circuit 12 includes an AGC loop that serves as an AGC amplifier 24, a low-pass filter (LPF) 26, an amplitude detection circuit 28, and a control signal generation circuit 30, and automatically adjusts the gain of the AGC amplifier 24 to keep the output amplitude constant. control.

The output signal of the AGC amplifier circuit 12 is input to a differentiating circuit 14 and a gate pulse generation circuit 16, and an original digital data pulse signal is generated by a data pulse generation circuit 18 based on the output of each circuit.

That is, as shown in the operation timing chart of FIG.
AGC from the AGC amplifier circuit 12 amplified to a constant amplitude
The output signal is input to the differentiating circuit 14, where it is first differentiated, and a differentiated output having a zero cross at the peak portion is obtained. At the same time, the AGC output signal is input to the gate signal generation circuit 16, where it is rectified and converted into a unipolar waveform as shown by the broken line, and then the gate signal is turned on (H level) at the portion exceeding the externally set slice voltage. Create. The data pulse generation circuit 18 detects the zero cross of the differential signal of only the part where the gate signal is on and generates a digital data pulse signal. A gate signal based on such a slice voltage setting prevents generation of an erroneous data pulse signal at a zero cross caused by noise such as a burst in the differential signal.

[Problems to be Solved by the Invention] However, as the density of magnetic disk devices has increased in recent years, the bit spacing has become narrower as shown in FIG.
As shown in the figure, the amplitude peak value of the reproduced signal decreases in the portion where the magnetic recording pattern changes from a long period to a short period due to the narrowed bit interval. Since there is a limit to the speed at which the AGC can follow the decrease in the amplitude of the reproduced signal, as shown in FIG.
It takes time for the amplitude of the GC output to become constant.

In particular, in the part where the signal amplitude decreases, the AGC output amplitude may fall below the slice voltage indicated by the broken line due to the AGC tracking delay, and the gate signal cannot be created, so the data pulse cannot be reproduced, and the data pulse is dropped. There was a problem with it.

The present invention has been made in view of such conventional problems, and provides a digital data pulse re-main circuit for a magnetic disk device that reliably prevents pulse dropout in areas where the amplitude is not constant due to AGC follow-up delay. The purpose is to provide

[Means to solve the problem] FIG. 1 is a diagram explaining the principle of the present invention.

First, the present invention includes an AGC amplifying means 12 for amplifying a reproduced signal from a head 10 into a signal of constant amplitude, a differentiating means 14 for differentiating an AGC output signal, and an externally set slice level at a portion exceeding the AGC output signal. Gate signal generation means 16 that generates a gate signal that turns on; and data pulse generation that generates a data pulse signal based on the differentiated output of the differentiator 14 that is obtained only while the gate signal of the gate signal generation means 16 is on. The present invention is directed to a data pulse reproducing circuit for a magnetic disk device having means 18.

In the present invention, such a data pulse regeneration circuit is provided with peak hold means 20 for sequentially holding the peak values of the AGC output signal and outputting the peak values to the gate signal generation means 16 as a slice level signal. This is what I did.

Here, the AGC output signal input to the differentiation means 14 and the gate signal generation means 16 is delayed by a predetermined time with respect to the AGC output signal input to the peak hold means 20, and the peak hold is preceded.

Further, the differentiating circuit 14 differentiates the AGC output signal, and the peak hold circuit 20 is configured to rectify the AGC output signal and convert it into a unipolar signal waveform, and then sequentially hold peak values.

[Function] The data pulse reproducing circuit of the magnetic disk device according to the present invention having the above-mentioned configuration provides the following function.

That is, even if the AGC output amplitude decreases due to AGC tracking delay, the slice level is set by peak hold to follow this decrease in amplitude, and the amplitude of the AGC output waveform always exceeds the slice bell, and the amplitude peak portion A gate signal corresponding to the data pulse is reliably generated, and data pulses can be reliably prevented from being dropped.

[Embodiment] FIG. 2 is a block diagram showing an embodiment of the present invention.

In FIG. 2, a head 10 performs a write operation or a read operation on a recording medium such as a magnetic disk. It should be noted that the following explanation shows only the circuit state in the read operation. The head 10 is connected to a preamplifier 22,
A preamplifier 22 preamplifies the reproduced signal from the head 10. An AGC amplification circuit 12 is provided following the pre-stage amplifier 22. The AGC amplifier circuit 12 includes an AGC amplifier 24,
An AGC loop consisting of a low-pass filter 26, an amplitude detection circuit 28, and a control signal generation circuit 30 is provided, and the preamplifier 2
AGC so as to keep the output amplitude of the reproduced signal from 2 constant.
The gain of amplifier 24 is automatically controlled.

The output signal of the AGC amplifier circuit 12 is input to a differentiating circuit 14 and a gate signal generating circuit 16.

The differentiating circuit 14 differentiates the AGC output signal and outputs a differentiated signal whose amplitude peak portion crosses zero. The gate signal generation circuit 16 rectifies the AGC output signal and converts it into a unipolar signal waveform, and then generates and outputs a gate signal that turns on (H level) at a portion exceeding an externally set slice level.

A slice voltage for the gate signal generation circuit 16 is generated by a peak hold circuit 20. The peak hold circuit 20 inputs the AGC output signal and generates the gate signal generation circuit 1.
6, after converting into a unipolar signal waveform by rectification, a peak hold operation is performed to sequentially hold the peak values of the signal waveform, and the peak hold signal is outputted to the gate signal generation circuit 16 as a slice voltage.

Here, in order to advance the peak hold operation that follows the peak value for the AGC output voltage by the peak hold circuit 20, the processing in the differentiator circuit 14 and the gate signal generation circuit 16 is performed after the AGC Iff force signal is delayed for a predetermined time of Δt. I have to.

Each output signal of the differentiating circuit 14 and the gate signal generating circuit 16 is given to a data pulse generating circuit 18. The data pulse generation circuit 18 detects the zero cross of the differential signal obtained while the gate signal is on (H level), and uses this zero cross detection time as a trigger to generate and output a data pulse with a constant pulse width. .

Next, the operation of the embodiment shown in FIG. 2 will be explained with reference to the operation timing chart shown in FIG.

The reproduced signal from the magnetic disk read by the head 10 is amplified by the preamplifier 22 and then sent to the AGC amplification circuit 12.
is amplified to a constant amplitude by the gain control of the AGC amplifier 24 using the AGC loop.

However, with the increase in the capacity of magnetic disk drives, the data bit spacing of recording tracks has been determined, and as a result, the short-period recording portions where the magnetic recording pattern changes rapidly are becoming smaller, as shown in the first and second half of Figure 3. The peak level of the reproduced signal has decreased. Then, when switching from a short period to a long period reproduction signal, the input amplitude of the reproduction signal to the AGC amplifier circuit 12 increases, but due to the AGC tracking delay with respect to this amplitude increase, the AGC output signal becomes constant over a certain period of time. Controlled by amplitude. Also, as shown in the second half, when the signal waveform changes from a long period signal waveform to a short period signal waveform, the AG
The input signal waveform to the C amplifier circuit 12 decreases, and the AGC
Due to the tracking delay, the AGC output amplitude also temporarily drops and gradually recovers to a constant amplitude.

In response to such changes in the AGC output signal, in the embodiment shown in FIG. 2, after rectifying the AGC output signal and converting it into a unipolar waveform, a peak hold operation is performed to sequentially detect and hold the peak values. A peak hold voltage that follows the amplitude change of the AGC output signal is generated and outputted to the gate signal generation circuit 16.

The gate signal generation circuit 16 rectifies the AGC output signal to produce a unipolar rectified signal waveform, and further includes a peak hold circuit 20.
In order to advance the operation, the rectified signal is delayed by a predetermined time Δt, and as shown in the figure, a ligated signal is generated by comparison with a peak hold voltage that is not subject to time delay. That is, a gate signal that is turned on (H level) is created in the rectified signal portion that exceeds the slice voltage based on the peak hold voltage.

At the same time as the gate signal creation circuit 16 creates the gate signal, the differentiation circuit 14 also differentiates the AGC output signal, but as in the case of the gate signal creation circuit 16, the differentiation circuit 14 also generates a signal delayed by a predetermined time Δt. is differentiated to match the timing at which the gate signal is generated by the gate signal generation circuit 16. Each output signal of the differentiating circuit 14 and the gate signal generating circuit 16 is given to the data pulse generating circuit 18, which detects the zero crossing of the differential signal obtained at the timing when the gate signal turns on (H level) and generates a constant pulse width. Generate data pulses.

In the operation timing chart of Fig. 3, even if the AGC output signal decreases in the latter half, the peak hold voltage, that is, the slice voltage is set to follow this amplitude decrease, so even if the amplitude decreases, the amplitude peaks. can reliably create a gate signal exceeding the slice level (peak hold voltage), and can reliably prevent data pulses from being dropped due to a decrease in the AGC output signal.

[Effects of the Invention] As described above, according to the present invention, even if the AGC output amplitude decreases due to AGC tracking delay, a gate signal can be reliably created by setting the slice level by peak hold, and the gate signal can be It is possible to reliably prevent data pulses from being lost due to failure to create them, and to regenerate highly reliable data pulses.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of the principle of the present invention; Fig. 2 is a block diagram of an embodiment of the present invention; Fig. 3 is an operation timing chart of the embodiment of Fig. 2; Fig. 4 is a block diagram of a conventional circuit; FIG. 6 is an operational timing chart of a conventional circuit; FIG. 6 is an explanatory diagram of reproduced signals with respect to data bit intervals; FIG. 7 is an explanatory diagram of AGC follow-up delay. In the figure, 10: Head 12: AGC amplifying means (circuit) 14: Differentiating means (circuit) 16: Gate signal generating means (circuit) 18: Data pulse generating means (circuit) 20: Peak hold means (circuit) 22: Previous stage Amplifier 24: AGC amplifier 26: Low pass filter (LPF) 28: Amplitude detection circuit 30: Control signal generation circuit

Claims (3)

[Claims] (1) AGC amplifying means (12) for amplifying the reproduced signal from the head (10) into a signal of constant amplitude; differentiating means (14) for differentiating the AGC output signal; a gate signal generating means (16) for generating a gate signal that turns on at a portion where the output signal exceeds; In a data pulse reproducing circuit of a magnetic disk device, the data pulse generating circuit (18) generates a data pulse signal based on a differential output; A data pulse generation circuit for a magnetic disk device, characterized in that a peak hold means (20) is provided for outputting the signal to the gate signal generation means (16) as a slice level signal. (2) AG input to the peak hold means (20)
2. The data pulse signal reproducing circuit for a magnetic disk drive according to claim 1, wherein the AGC output signal inputted to the differentiating means (14) and the gate progression generating means (16) is delayed by a predetermined time with respect to the C output signal. . (3) The differentiator circuit (14) differentiates the AGC output signal, and the peak hold circuit (20) rectifies the AGC output signal to convert it into a unipolar signal waveform and then sequentially holds peak values. A data pulse generation circuit for a magnetic disk device according to claim 1 or 2, characterized in that: