JPH0448712U - - Google Patents

Info

Publication number
JPH0448712U
JPH0448712U JP9043890U JP9043890U JPH0448712U JP H0448712 U JPH0448712 U JP H0448712U JP 9043890 U JP9043890 U JP 9043890U JP 9043890 U JP9043890 U JP 9043890U JP H0448712 U JPH0448712 U JP H0448712U
Authority
JP
Japan
Prior art keywords
slot
strip
line
converter
strip line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9043890U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9043890U priority Critical patent/JPH0448712U/ja
Publication of JPH0448712U publication Critical patent/JPH0448712U/ja
Pending legal-status Critical Current

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  • Superheterodyne Receivers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案によるバランス型ミキサの回
路パターン図、第2図は従来のバランス型ミキサ
の回路パターン図である。 図中、T1はRF信号入力端子、T2は局発信
号入力端子、T3は中間周波出力端子、1はスト
リツプ/スロツト変換器、2は2個のダイオード
、3はストリツプ/スロツト変換器、4は低減通
過フイルタ、5はスルーホール、6は局発信号し
や断回路、7は基板である。なお、図中同一部分
には、同一符号を付して示してある。
FIG. 1 is a circuit pattern diagram of a balanced mixer according to this invention, and FIG. 2 is a circuit pattern diagram of a conventional balanced mixer. In the figure, T1 is an RF signal input terminal, T2 is a local signal input terminal, T3 is an intermediate frequency output terminal, 1 is a strip/slot converter, 2 is two diodes, 3 is a strip/slot converter, and 4 is a strip/slot converter. 5 is a through hole, 6 is a local signal cutoff circuit, and 7 is a substrate. Note that the same parts in the figures are indicated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板の表面に形成されたストリツプ線路と基板
の裏面に形成されたスロツト線路で構成され、ス
トリツプ線路の入力端子を有する第1のストリツ
プ/スロツト変換器と、このストリツプ/スロツ
ト変換器のスロツト線路に接続された異なる極性
端子を接地した2個のダイオードと、この2個の
ダイオードにスロツト線路を接続されたストリツ
プ線路の入力端子を有する第2のストリツプ/ス
ロツト変換器と、このストリツプ/スロツト変換
器のスロツト線路に接続されたスロツト低減通過
フイルタと、スロツト低減通過フイルタに接続さ
れたストリツプ線路の出力端子を有するスルーホ
ールとから成るバランス型ミキサにおいて、裏面
のスロツト線路をまたぐように複数2個のスルー
ホールを設け、上記複数2個のスルーホール間を
ストリツプ線路で接続した局発信号しや断回路を
設けたことを特徴とするミキサ。
A first strip/slot converter consists of a strip line formed on the front surface of the substrate and a slot line formed on the back surface of the substrate, and has a strip line input terminal, and a slot line of this strip/slot converter. a second strip/slot converter having two connected diodes with different polarity terminals grounded, and a strip line input terminal having a slot line connected to the two diodes; and this strip/slot converter. In a balanced mixer consisting of a slot reduction pass filter connected to the slot line on the back side, and a through hole having a strip line output terminal connected to the slot reduction pass filter, two or more A mixer characterized in that through-holes are provided, and a local oscillator signal connecting and disconnecting circuit is provided between the plurality of two through-holes by a strip line.
JP9043890U 1990-08-29 1990-08-29 Pending JPH0448712U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9043890U JPH0448712U (en) 1990-08-29 1990-08-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9043890U JPH0448712U (en) 1990-08-29 1990-08-29

Publications (1)

Publication Number Publication Date
JPH0448712U true JPH0448712U (en) 1992-04-24

Family

ID=31825195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9043890U Pending JPH0448712U (en) 1990-08-29 1990-08-29

Country Status (1)

Country Link
JP (1) JPH0448712U (en)

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