JPH0448780U - - Google Patents
Info
- Publication number
- JPH0448780U JPH0448780U JP8999990U JP8999990U JPH0448780U JP H0448780 U JPH0448780 U JP H0448780U JP 8999990 U JP8999990 U JP 8999990U JP 8999990 U JP8999990 U JP 8999990U JP H0448780 U JPH0448780 U JP H0448780U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- timing signal
- timing
- generates
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Synchronizing For Television (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
第1図及び第2図は本考案の一実施例を示し、
第1図はタイミングを発生回路を示す構成説明図
、第2図はフイールドカウンタの動作を説明する
ための図、第3図は従来のタイミング発生回路を
示す構成説明図、第4図はLC表示装置を示す構
成説明図である。
1……メインフイールドカウンタ、2,10…
…デコーダ、3……LC駆動回路用信号発生器、
4……メインカウンタリセツト信号発生器、8…
…サブカウンタリセツト信号発生器、9……サブ
フイールドカウンタ。
1 and 2 show an embodiment of the present invention,
Fig. 1 is a configuration explanatory diagram showing a timing generation circuit, Fig. 2 is a diagram for explaining the operation of a field counter, Fig. 3 is a configuration explanatory diagram showing a conventional timing generation circuit, and Fig. 4 is an LC display. FIG. 2 is a configuration explanatory diagram showing the device. 1... Main field counter, 2, 10...
...decoder, 3...signal generator for LC drive circuit,
4... Main counter reset signal generator, 8...
...Sub counter reset signal generator, 9...Sub field counter.
Claims (1)
数する第1のカウンタと、 この第1のカウンタの出力に基づいてタイミン
グ信号を発生する第1のタイミング信号発生手段
と、 前記第1のカウンタが予め設定された計数値に
達した際に計数を開始する第2のカウンタと、 この第2のカウンタの出力に基づいて所定の期
間にタイミング信号を発生する第2のタイミング
信号発生手段と を具備することを特徴とするタイミング信号発生
回路。[Claims for Utility Model Registration] A first counter that counts one field period of a video signal from its beginning; a first timing signal generating means that generates a timing signal based on the output of the first counter; a second counter that starts counting when the first counter reaches a preset count value; and a second timing that generates a timing signal in a predetermined period based on the output of the second counter. 1. A timing signal generation circuit comprising signal generation means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8999990U JPH0448780U (en) | 1990-08-30 | 1990-08-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8999990U JPH0448780U (en) | 1990-08-30 | 1990-08-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0448780U true JPH0448780U (en) | 1992-04-24 |
Family
ID=31824389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8999990U Pending JPH0448780U (en) | 1990-08-30 | 1990-08-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0448780U (en) |
-
1990
- 1990-08-30 JP JP8999990U patent/JPH0448780U/ja active Pending
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