JPH0449882A - Control device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a control device, such as a motor speed control device, a motor phase control device, etc., for matching a controlled variable to a target reference value.

BACKGROUND OF THE INVENTION FIG. 2 is a block diagram of a motor speed control device used to control the rotational speed of a motor to a reference rotational speed. In FIG. 2, 1 is a motor, 2 is a frequency generator (hereinafter referred to as FG) that generates a frequency signal with a frequency proportional to the rotational speed of motor 1 (hereinafter referred to as FG multiplied signal), and 3 is FG. Speed error detection means for detecting the error of the signal frequency with respect to the reference frequency; 4 is speed error detection means 3;
This is a low frequency compensation means for enhancing the low frequency components (including direct current) of the output of the converter, and has a transfer characteristic such that the gain increases in the low frequency range, as shown in the frequency characteristic illustrated in FIG. 5
is a motor drive circuit that amplifies the power of the output of the low frequency compensation means 4 and drives the motor 1. Motor 1 described above.
FG2. Speed error detection means 3. The low frequency compensation means 4 and the motor drive circuit 5 constitute a speed control loop.

In FIG. 2, the FG multiplied signal obtained from FG2 is input to speed error detection means 3, and the error of the FG signal frequency with respect to the reference frequency is detected. The speed error detected by the speed error detection means 3 has its low frequency components (including direct current) enhanced by the low frequency compensating means 4 which increases the low frequency gain.
Further, the motor drive circuit 5 amplifies the power of the output of the low frequency compensation means 4 and drives the motor 1. By using the low frequency compensating means 4 having the frequency characteristics shown in FIG. 3, the loop gain of the control system increases in the low frequency range and becomes infinite in the DC region, so that the steady state deviation cannot be reduced to zero. can. That is, the rotational speed of the motor can be made to match the reference speed.

Problems to be Solved by the Invention As mentioned above, in the conventional motor speed control device,
In order to make the steady-state error zero, it is necessary to make the loop gain in the DC region of the control system infinite by using, for example, a low-frequency compensating means having a transfer characteristic that increases the low-frequency gain. However, low frequency compensation means are practical.

(1) When implementing the low-frequency compensation means using an operational amplifier, the gain in the DC region cannot be greater than the bare gain of the operational amplifier, and the loop gain in the DC region of the control system can be completely increased to infinity. It is not possible to do so.

(2) If the low-frequency compensation means is implemented, for example, as digital filter calculation processing within a microcomputer, the gain in the DC region will be infinite, but the calculation time will become a wasted time element in the control system. impairs responsiveness.

There were problems such as.

In view of this, an object of the present invention is to provide a control device that can reduce the steady-state deviation to zero without making the loop gain in the DC region of the control system infinite by using a low-frequency compensation means or the like. shall be.

Means for Solving the Problems In order to achieve the above object, the control device of the present invention includes a first error detection means for detecting an error between a controlled variable and a reference value, and a first error detecting means for detecting an error between a controlled variable and a reference value. a second error detection means for detecting, a driving means for driving a controlled object according to the output of the second error detection means, and a maximum value and a minimum value of the output of the first error detection means for each predetermined period. a maximum value/minimum value detection means for detecting a difference between the maximum value and the minimum value; a fluctuation range detection means for detecting the average value of the maximum value and the minimum value; Reference value setting means for setting a value obtained by subtracting the average value from the reference value as a new reference value if the difference between the maximum value and the minimum value is less than or equal to a predetermined value.

Effect of the present invention With the above-described configuration, the error between the control amount and the reference value is detected by the second error detection means, and the controlled object is driven by the drive means in accordance with the error between the control amount and the reference value. The first error detecting means detects an error between the controlled variable and the reference value, the maximum value/minimum value detecting means detects the maximum and minimum values of the error between the controlled variable and the reference value every predetermined period, The fluctuation range detection means detects the difference between the maximum value and the minimum value, the average value detection means detects the average value of the maximum value and the minimum value, and the reference value setting means determines that the fluctuation range is less than or equal to a predetermined value. If so, the reference value is corrected by the average value, and as a result, the reference value is corrected so that the average value becomes zero.

Embodiment FIG. 1 shows a block diagram of a motor speed control device which is an embodiment of the control device of the present invention. In FIG. 1, 1 is a motor, 2 is an FGl that generates an FG multiplied signal with a frequency proportional to the rotational speed of the motor 1, 6 is a first speed error detection means for detecting an error in the FG signal frequency with respect to a reference frequency, and 7 is a A second speed error detection means detects the error of the FG signal frequency with respect to the reference frequency; 5 is a motor drive circuit that amplifies the output of the second speed error detection means 7 and drives the motor; 8 is a motor drive circuit that amplifies the output of the second speed error detection means 7 and drives the motor; Maximum/minimum value detection means detects the maximum and minimum values of the output of the first speed error detection means 6 every 15 seconds or every 1 second; 9 detects the difference between the maximum and minimum values; Fluctuation range detection means; 10 is an average value detection means for detecting the average value of the maximum value and the minimum value; 11 is reference frequency setting means for setting the value of the reference frequency in the second speed error detection means 7; If the difference between the maximum value and the minimum value detected by the fluctuation width detection means 9 is less than a predetermined value, the average value of the maximum value and the minimum value detected by the average value detection means 10 is set as the current reference frequency. The value subtracted from the value is set as a new reference frequency value. It is assumed that the reference frequency value is initially set to a value equal to the reference frequency value.

The operation of the motor speed control device of this embodiment configured as described above will be described below.

The FG multiplied signal obtained from FG2 is input to the first speed error detection means 6 and the second speed error detection means 7. In the second speed error detection means 7, an error of the FG signal frequency with respect to the reference frequency is detected, and the speed error detected by the second speed error detection means 7 is inputted to the motor drive circuit 5. 5, the motor 1 is driven with electric power according to the error between the FG signal frequency and the reference frequency. Motor 1. FG2. The second speed error detection means 7 and the motor drive circuit 5 constitute a speed control loop.

On the other hand, the first speed error detection means 6 detects the error of the FG signal frequency with respect to the reference frequency, and the maximum value/minimum value detection means 8 detects the error of the FG signal frequency with respect to the reference frequency, for example, at predetermined intervals.
The maximum and minimum values of the output of the first speed error detection means 6 are detected every 5 seconds. The variation range detection means 9 detects the difference between the maximum value and the minimum value, that is, the variation range of the error of the FG signal frequency with respect to the reference frequency during a predetermined period, and the average value detection means 10 detects the difference between the maximum value and the minimum value. The average value with respect to the minimum value, that is, the center value of fluctuation of the error of the FG signal frequency with respect to the reference frequency during a predetermined period is detected. Further, in the reference frequency setting means 1, the fluctuation range detection means 9 sets the fluctuation center value detected by the average value detection means 10 to the current reference frequency. The value subtracted from this value is set as a new reference frequency value, and as a result, the reference frequency value is corrected so that the center value of fluctuation of the error of the FG signal frequency with respect to the reference frequency becomes zero.

This will be explained using specific numerical values. For example, set the reference frequency to 1
00Hz1 Initial value of reference frequency is 100H2N Predetermined period is 0. After the motor 1 is started from a stopped state for 5 seconds, the rotational speed of the motor 1 becomes stable, and the FG signal frequency becomes a frequency close to the reference frequency of 100Hz, for example, 105H.
It is assumed that the state remains stable for 0.5 seconds or more with fluctuations of about ±IHz around z. That is, motor 1. FG
2. Since the speed control loop composed of the second speed error detection means 7 and the motor drive circuit 5 does not have an infinite loop gain in the DC region, the center value of the FG frequency is
+5Hz with respect to the second speed error detection means 7 reference frequency
It has an error of On the other hand, at this point, the maximum value
In the minimum value detection means 8, the maximum value of the error of the FG signal frequency with respect to the reference frequency is 6 Hz, and the minimum value is 4.
Hz, the fluctuation range detection means 9 detects the fluctuation range of the error of the FG signal frequency with respect to the reference frequency as 2 Hz during a predetermined period, and the average value detection means 10 detects the fluctuation range of the error of the FG signal frequency with respect to the reference frequency as 2 Hz. The center value of fluctuation during the predetermined period is detected to be 5 Hz. Here, in the reference frequency setting means 11, if the fluctuation range detected by the fluctuation range detection means 9 is 3 Hz or less, the fluctuation center value detected by the average value detection means 10 is subtracted from the current reference frequency value. When the value is set as a new reference frequency value, the reference frequency setting means 11 sets a value of 95Hz, which is obtained by subtracting the fluctuation center value of 5Hz from the current reference frequency value of 100Hz, since the fluctuation range is 2Hz and is less than 3H2. is set as a new reference frequency value.

As mentioned above, motor 1. FG2. Since the speed control loop composed of the second speed error detection means 7 and the motor drive circuit 5 does not have an infinite loop gain in the DC region, the center value of the FG frequency is determined by the second speed error detection Since it has an error of +5 Hz with respect to the reference frequency in the means 7, the FG signal frequency when the rotation speed of the motor 1 becomes stable after the reference frequency is changed from 100 Hz to 95 Hz by the reference frequency setting means 11 is The center value is LOOHz, which coincides with the reference frequency.

Therefore, according to the motor speed control device of this embodiment, the center value of the FG signal frequency in the steady state can be made to match the reference frequency without making the loop gain in the DC region of the speed control system infinite. can. In other words, the steady-state deviation can be reduced to zero.

Further, according to the motor speed control device of this embodiment, even when the loop gain in the DC region of the speed control system is very low, it is possible to make the center value of the FG signal frequency in the steady state coincide with the reference frequency. can.

Further, according to the motor speed control device of this embodiment, even if a load torque of a constant magnitude is applied to the motor and the center value of the FG signal frequency is about to change, the center value of the error of the FG signal frequency with respect to the reference frequency changes. Since the reference frequency value is corrected so that the value becomes zero, the center value of the FG signal frequency can be made to match the reference frequency even if a constant magnitude of load torque in the DC range is applied to the motor.

Further, in this embodiment, the first speed error detection means 6, the second
Speed error detection means 7. Maximum value/minimum value detection means 8. Fluctuation range detection means 9. When performing processing corresponding to the average value detection means 10 and the reference frequency setting means 11 using a microcomputer, the second
After performing the processing corresponding to the speed error detection means 7, and performing the processing equivalent to the second speed error detection means 7, the first speed error detection means 6I, the maximum value/minimum value detection means 8.
Fluctuation range detection means 9. Average value detection means 10. If the processing corresponding to the reference frequency setting means 11 is performed, the first speed error detection means 6. Maximum value/minimum value detection means 8.
Fluctuation range detection means 9. The processing time for performing the processing corresponding to the average value detection means 10 and the reference frequency setting means 11 does not become wasted time of the control system.

Note that in this embodiment, the FG signal frequency is, for example, 10
Assuming that the frequency is stabilized with fluctuations of about +2 Hz around 5 Hz, the maximum value/minimum value detection means 8 will detect F.
The maximum error value of the G signal frequency with respect to the reference frequency is 7.
The minimum value of Hzl is detected to be 3 Hz, the fluctuation range detecting means 9 detects that the fluctuation range of the error of the FG signal frequency with respect to the reference frequency during a predetermined period is 4 Hz, and the average value detecting means 10 detects that the FG signal frequency is 4 Hz. The center value of the fluctuation of the error with respect to the reference frequency during the predetermined period is detected to be 5 Hz. In this case, in the reference frequency setting means 11,
Since the fluctuation width is larger than 3 Hz, the reference frequency value will not be corrected as it is. In such a case, for example, in the reference frequency setting means 11, if the fluctuation range detected by the fluctuation range detection means 9 is larger than 3 Hz for 2 seconds or more, the threshold value 3 Hz for the fluctuation range is changed to 5 Hz,
If the fluctuation range is 5Hz or less, the average value detection means 10
If you change the value obtained by subtracting the fluctuation center value detected by from the current reference frequency value to set as the new reference frequency value, the new value 95Hz, which is obtained by subtracting the fluctuation center value 5H2 from the current reference frequency value 100Hz, will be set as the new reference frequency value. is set as a reference frequency value. Thereafter, when the rotational speed of the motor 1 becomes stable, the center value of the FG signal frequency becomes 100H2 as in the present embodiment, which coincides with the reference frequency. In this manner, the reference frequency setting means 11 may change the threshold value for the fluctuation range as necessary.

Further, each numerical value used in the explanation of this example is not limited to the above-mentioned value.

In this embodiment, the first speed error detection means 6 is FG.
A speed error detection means for detecting an error of the signal period with respect to the reference period, a second speed detection means 7 is a speed error detection means for detecting an error of the FG signal period with respect to the reference period, and a reference frequency setting means 11 is for setting the reference period. It may also be a reference period setting means.

Furthermore, although this embodiment is an example of a motor speed control device that controls the rotational speed of a motor, it is also applicable to general control devices such as a motor phase control device that controls the rotational phase of a motor.

As described in detail, according to the present invention, the loop gain in the DC region of the control system does not have to be made infinite by using a low-frequency compensation means or the like, or the loop gain in the DC region of the control system can be increased. Even if it is very low, the center value of the controlled variable in a steady state can be made to match the target reference value, and the steady state deviation can be made zero.

Further, even if a disturbance load of a certain magnitude is applied to the controlled object, the center value of the controlled variable can be made to match the target reference value.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a motor speed control device which is an embodiment of the control device of the present invention, Fig. 2 is a block diagram of a conventional motor speed control device, and Fig. 3 shows the gain of the low frequency compensation means. FIG. 1...Motor, 2...Frequency generator, 9.
...Motor drive circuit, 6...First speed error detection means, 7...Second speed error detection means, 8...
Maximum value φ minimum value detection means, 9... Fluctuation range detection means, 10... Average value detection means,

Claims (2)

[Claims] (1) A first error detection means for detecting an error between the controlled variable and a reference value; a second error detecting means for detecting an error between the controlled variable and the reference value; and an output of the second error detecting means. driving means for driving a controlled object according to the maximum value and minimum value for detecting the maximum value and minimum value of the output of the first error detecting means at predetermined intervals; fluctuation range detection means for detecting the difference between the maximum value and the minimum value; and average value detection means for detecting the average value between the maximum value and the minimum value; and reference value setting means for setting a value obtained by subtracting the average value from the reference value as a new reference value. (2) The control device according to claim 1, wherein the controlled object is a motor, and the controlled variable is the rotational speed or rotational phase of the motor.