JPH045042Y2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a magnetic recording device suitable for application to, for example, a VTR (video tape recorder).

BACKGROUND ART AND PROBLEMS Therewith, for example, in a VTR, the recording current of a video signal is adjusted to an optimum value at the time of manufacture, but this optimum value changes over time, for example due to wear of the video head. That is, as the head wears down, the recording efficiency increases and the optimum recording current decreases. On the other hand, the actual recording current tends to increase due to a decrease in head impedance due to head wear, and the synergistic effect of these causes the recording current to become excessive. As is well known, this results in overmodulation, increased crosstalk,
This causes problems such as deterioration of S/N.

In addition, in the so-called deep recording method, in which the audio signal is FM modulated and recorded in the deep layer of the magnetic layer, and the video signal is recorded in the surface layer, the deep FM audio signal area is eroded due to excessive video recording current, and the audio signal is This causes the problem of significant S/N deterioration of the signal.

Conventionally, it has been considered to estimate the wear state of the video head using a dummy head and perform real-time control of the video recording current, but if the wear of the video head and this dummy head are not equal, incorrect control may be performed. I had a problem.

Purpose of the Invention In view of these points, the present invention is designed to accurately detect the state of wear of the magnetic head (head impedance) and to accurately control the recording current to an optimum value.

Summary of the invention In order to achieve the above object, the present invention aims to supply an oscillation signal of a predetermined frequency to the magnetic head via the recording amplifier at the beginning of the recording mode, drive the magnetic head with a constant current, and drive the recording amplifier with a constant current. The output voltage is detected, and the output current of the recording amplifier is controlled to be constant according to the detected value.

Therefore, since a dummy head or the like is not used, the state of wear (head impedance) can be accurately detected, and the recording current can be accurately controlled to an optimum value.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to FIG. This example is an example applied to a VTR.

In the figure, a video signal S _V supplied to an input terminal 1 is supplied to a recording circuit 2 that performs FM modulation of a luminance signal, low frequency conversion of a chroma signal, etc., and a recording signal S _V ' obtained from this is supplied to a changeover switch. 3 is supplied to the A side terminal.

The B side terminal of this switch 3 is supplied with an oscillation signal S from an oscillator 4 whose level is constant and whose frequency is sufficiently low, for example, 100 to 200 kHz, relative to the resonance point of a rotating magnetic head for video signal recording, which will be described later. _O
is supplied. In this case, the reason why the frequency is set sufficiently low with respect to the resonance point is to drive the magnetic head using the oscillation signal S _O as a constant current drive.

Further, the signal obtained from the changeover switch 3 is supplied via a recording amplifier 5 and a rotary transformer 6 to rotating magnetic heads H _V1 and H _V2 for recording video signals. Note that T is a magnetic tape.

The recording amplifier 5 has a shunt 7, and the output current, that is, the recording current, can be controlled by the shunt 7. The shunt 7 is a shunt resistor 7
a, 7b and 7c, and NPN transistors 7d, 7e and 7f for switching, and resistor 7a and transistor 7d, resistor 7b and transistor 7e, and resistor 7c and transistor 7f are connected in series, respectively. are connected in parallel. In this case, the divided amount is determined by the on/off of the transistors 7d, 7e, and 7f, and the more transistors are turned on, the larger the divided amount is, and therefore the output current of the recording amplifier 5, that is, the recording current becomes smaller.

Further, the output voltage of the recording amplifier 5 is clamped by a clamp circuit 8 and then supplied to a peak detection circuit 9. Then, the detection output S _d is output from the comparator 10 ₁ ,
10 ₂ and 10 ₃ positive input terminals, respectively.

The negative input terminals of these comparators 10 ₁ , 10 ₂ and 10 ₃ are supplied with V ₁ , V ₂ and V ₃ from the voltage dividing circuit 11, respectively.
A reference voltage of (V ₁ <V ₂ <V ₃ ) is supplied. Therefore, the comparator ₁₀₁ outputs a high level "1" signal when the detection output _Sd exceeds _V1 , and the comparator ₁₀₂ outputs a signal of high level "1" when the detection output _Sd exceeds _V2 . Sometimes a high level “1” signal is output, and comparator 1
From 0 ₃ onwards, a high level "1" signal is output when the detection output S _d exceeds V ₃ .

The outputs of comparators 10 ₁ , 10 ₂ and 10 ₃ are supplied to input terminals S of latch circuits 12 ₁ , 12 ₂ and 12 ₃ , respectively. The output obtained at the inverting output terminal is supplied to the bases of transistors 7d, 7e and 7f via connection switches 13 ₁ , 13 ₂ and 13 ₃ and resistors 14 ₁ , 14 ₂ and 14 ₃ , respectively.

Also, the terminal 15 is connected to the time point t _O when the recording mode is set.
A detection pulse P _O (shown in FIG. 2 B) having a pulse width of a predetermined period T _O is supplied from (see FIG. 2 A),
This detection pulse P _O is supplied to the changeover switch 3 as a changeover control signal. And selector switch 3
is connected to the B side only during the period T _O of this detection pulse P _O , and is connected to the A side the rest of the time.

Further, the detection pulse P _O supplied to the terminal 15 is supplied to the mono multivibrator 16, and from the rising edge of the detection pulse P _O , the mono multivibrator 16 generates a pulse P _R (shown in FIG. 2C) of a predetermined pulse width. This pulse P _R is obtained from the latch circuit 1.
It is supplied to reset terminals R of 2 ₁ to 12 ₃ and reset at this timing. Further, this pulse _PR is supplied to the mono multivibrator 17,
Pulse P _R from this mono multivibrator 17
A pulse P _C of a predetermined pulse width is generated from the falling edge of
This pulse P _C is supplied to the clock terminals C of the latch circuits 12 ₁ , 12 ₂ and 12 ₃ , and the signals supplied to the respective input terminals S are latched at this timing.

Further, the detection pulse P _O supplied to the terminal 15 is supplied to the connection switches 13 ₁ to 13 ₃ as a control signal. And these connection switches 13 ₁ to 1
₃ are controlled in conjunction, and the period T _O of the detection pulse P _O
is turned off, and turned on during the other periods (see Figure 2E).

This example is configured as described above and operates as follows.

First, when the recording mode is set at time t _O ,
The detection pulse P _O is supplied to the terminal 15, the period selection switch 3 of T _O is connected to the B side, and the oscillation signal S _O from the oscillator 4 is sent to the magnetic head via the selection switch 3, the recording amplifier 5 and the rotary transformer 6.
Supplied to H _V1 and H _V2 . Note that during this T _O period, the connection switches 13 ₁ , 13 ₂ and 13 ₃ are off, so the transistors 7d, 7e and 7f are off, respectively, and there is no shunt in the recording amplifier 5, and the output current, that is, the recording current It is said to be in its maximum state.

As described above, since the oscillation signal S _O from the oscillator 4 has a frequency sufficiently low relative to the resonance points of the magnetic heads H _V1 and H _V2 , the magnetic heads H _V1 and H _V2 are driven with a constant current. Since the level of the oscillation signal S _O is constant, the output voltage of the recording amplifier 5 corresponds to the impedance of the magnetic heads H _V1 and H _V2 . That is, this output voltage is as shown in FIG.
As shown in Figure 2, it is almost constant at first, but as the magnetic head
When the head impedance decreases due to wear of H _V1 and H _V2 , it decreases in proportion to the impedance.

Further, at this time, the output of the clamp circuit 8 and the detection output S _d of the peak detection circuit 9 are as shown in FIGS. 3B and 3C, respectively.

By the way, the reference voltages V ₁ , V ₂ and V ₃ from the voltage dividing circuit 11 mentioned above are selected, for example, as shown in FIG. 3C. In this case, the magnetic head H _V1 ,
In a state where there is no wear on H _V2 and there is almost no drop in head impedance, the detection output S _d is greater than the voltage V ₃ and the comparators 10 ₁ , 10 ₂ and 1
The outputs of 0 ₃ are respectively high level "1". Also,
When the magnetic heads H _V1 and H _V2 are severely worn and the head impedance is greatly reduced, the detection output S _d becomes smaller than the voltage V ₁ and the comparator 10 ₁ ,
The outputs of 10 ₂ and 10 ₃ are respectively low level "0". Furthermore, in a state intermediate between , for example, the detection output S _d is between the voltages V ₂ and V ₃ , the output of the comparator 10 ₃ becomes a low level "0", and the output of the comparator 10 ₁ and 10 ₂ becomes a low level "0". The outputs of each are high level "1". In addition, in a state intermediate between and, for example, the detection output S _d is the voltage V ₁
and V ₂ , the output of the comparator 10 ₁ becomes a high level "1", and the outputs of the comparators 10 ₂ and 10 ₃ respectively become a low level "0".

The outputs of such comparators 10 ₁ -10 ₃ are latched by latch circuits 12 ₁ -12 ₃ , respectively. Therefore,
In this state, the inverting output terminals of the latch circuits 12 ₁ , 12 ₂ and 12 ₃ each have a low level “0”.
signal is obtained. Further, in this state, a low level "0" signal is obtained at the inverting output terminals of the latch circuits 12 ₁ and 12 ₂ , and a high level "1" signal is obtained at the inverting output terminal of the latch circuit 12 ₃ . In addition, in the state, the inverting output terminal of the latch circuit 12 ₁ has a low level “0”, and the latch circuit 12 ₂
A high level "1" signal is obtained at the inverting output terminals of and ₁₂₃ , respectively. Further, in this state, high level "1" signals are obtained at the inverting output terminals of the latch circuits 10 ₁ , 10 ₂ and 10 ₃ , respectively.

The above is performed within the period T _O of the detection pulse P _O ,
At time t ₁ when this period _TO ends, the changeover switch 3 is connected to the A side, and the recording signal from the recording circuit 2 is output.
S _V ' is supplied to the magnetic heads H _V1 and H _V2 via the changeover switch 3, the recording amplifier 5 and the rotary transformer 6, and actual recording starts from time _t1 (see FIG. 2F). In this case, connection switches 13 ₁ , 13 ₂ and 13 ₃ are respectively turned on at time t ₁ ,
The signals obtained at the inverting output terminals of the latch circuits 12 ₁ , 12 ₂ and 12 ₃ are transmitted through the transistors 7 d and 7 , respectively.
Supplied to the bases of e and 7f.

Therefore, for example, when the magnetic heads H _V1 and H _V2 are in the state, the transistors 7d, 7e and 7f
are respectively turned off, there is no shunting in the recording amplifier 5, and the recording current is maximized. magnetic head
When the states of H _V1 and H _V2 are high, the transistor 7f is on and the transistors 7d and 7e are off, respectively, and the current is shunted only through the resistor 7c, so that the recording current is slightly reduced. magnetic head
In the state of H _V1 and H _V2 , transistors 7e and 7f are respectively on and transistor 7d is off, and the current is shunted through resistors 7b and 7c, so that the recording current is made smaller than in the state. Further, when the magnetic heads H _V1 and H _V2 are in the state, transistors 7d, 7e and 7f
are all turned on and shunted through resistors 7a, 7b and 7c, so that the recording current is made even smaller than the state of. In this way, the head H _V1 ,
The recording current is made smaller as the wear condition of H _V2 becomes more severe and the head impedance decreases.

In this way, according to this example, the recording current is controlled to be close to the optimum value according to the wear state of the heads H _V1 and H _V2 , that is, changes in head impedance, so that the wear of the magnetic heads H _V1 and H _V2 is controlled. Overmodulation, increased crosstalk caused by
There are no problems such as S/N deterioration. Moreover, according to this example, the wear state of the magnetic heads H _V1 and H _V2 is detected from the magnetic heads H _V1 and H _V2 themselves,
There is no risk of erroneous control compared to, for example, a system that uses a dummy head or the like.

In this example, the recording current is controlled in four stages, but it is also possible to perform more detailed control. Further, the configuration of the flow divider 7 and the like may be different from that of the above embodiment.

Next, FIG. 4 shows another embodiment of the present invention. In FIG. 4, parts corresponding to those in FIG. 1 are given the same reference numerals, and detailed explanation thereof will be omitted.

In the figure, a signal obtained from a changeover switch 3 is supplied to magnetic heads H _V1 and H _V2 via a recording amplifier 5' whose gain is variable and a rotary transformer 6.

Further, the output voltage of this recording amplifier 5' is supplied to a peak detection circuit 9 via a clamp circuit 8.
This detection output S _d is supplied to a sample and hold circuit 18 . And this sample hold circuit 1
The hold output of 8 is supplied to the recording amplifier 5' via the connection switch 19 as a gain control signal.
In this case, the larger the hold output, the larger the gain of the recording amplifier 5' and the larger the recording current.

Further, the detection pulse P _O supplied to the terminal 15 is supplied to the sampling pulse forming circuit 20, and the sampling pulse P _S (shown in FIG. 2G) within the period T _O of the detection pulse P _O is output from this forming circuit 20. can get. This pulse P _S is the sample hold circuit 18
The signal supplied to its input side is sampled and held.

Further, the detection pulse P _O supplied to the terminal 15 is supplied to the connection switch 19 as a control signal, and this connection switch 19 controls the detection pulse P _O during the period T _O
It is turned off during this period, and turned on during other periods.

The example in Figure 4 is configured as described above, and the detection pulse
During the period TO of P _{O ,} the sample and hold circuit 18 holds a voltage corresponding to the state of wear of the magnetic heads H _V1 and H _V2 . and the time t ₁ at which the period T _O ends
The connection switch 19 is turned on from then on, and the gain of the recording amplifier 5' is set according to the hold output from the sample-and-hold circuit 18, that is, the wear state of the magnetic heads H _V1 and H _V2 , so that the recording current is optimized. controlled as follows.

In this way, also in the example in Figure 4, the head
The recording current is controlled to an optimum value depending on the wear state of H _V1 and H _V2 , and the same working effect as in the example in FIG. 1 can be obtained.

Incidentally, in addition to the above-described embodiment, the change in head impedance may be detected by detecting the change in the resonance point of the recording amplifier, and the recording current may be controlled based on this. Further, although the present invention is an example applied to a VTR, it can be similarly applied to other magnetic recording devices.

Effects of the invention According to the invention described above, since a dummy head or the like is not used, the state of wear can be accurately detected and the recording current can be accurately controlled. Therefore, problems such as overmodulation, increased crosstalk, and deterioration of S/N caused by wear of the magnetic head can be reliably eliminated.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram showing one embodiment of the present invention;
3 and 3 are explanatory views, respectively, and FIG. 4 is a configuration diagram showing another embodiment of the present invention. 1 is an input terminal, 2 is a recording circuit, 4 is an oscillator, 5
is a recording amplifier, 7 is a shunt, 8 is a clamp circuit,
9 is a peak detection circuit, 10 ₁ to 10 ₃ are comparators, 11 is a voltage dividing circuit, 12 ₁ to 12 ₃ are latch circuits, and H _V1 and H _V2 are rotating magnetic heads, respectively.

Claims (1)

[Claims for Utility Model Registration] A recording circuit to which a recording signal is input, an oscillator that outputs a signal for detecting recording current, and switching for selectively outputting an output signal from the recording circuit and an output signal from the oscillator. a switch, a recording amplifier that amplifies the output signal from the changeover switch, a rotary transformer that electrically connects the recording amplifier and the magnetic head, and a recorded signal from the oscillator that is reproduced by the magnetic head. A clamp circuit that clamps the signal after passing through the rotary transformer, and a detection circuit that detects the level of the output signal from the clamp circuit, and controls the gain of the recording amplifier based on the output signal from the detection circuit. A magnetic recording device characterized by: