JPH0452958Y2 - - Google Patents
Info
- Publication number
- JPH0452958Y2 JPH0452958Y2 JP2678687U JP2678687U JPH0452958Y2 JP H0452958 Y2 JPH0452958 Y2 JP H0452958Y2 JP 2678687 U JP2678687 U JP 2678687U JP 2678687 U JP2678687 U JP 2678687U JP H0452958 Y2 JPH0452958 Y2 JP H0452958Y2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- light
- layer
- edge
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 53
- 238000005530 etching Methods 0.000 claims description 9
- 239000002184 metal Substances 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 13
- 230000003287 optical effect Effects 0.000 description 8
- 239000011521 glass Substances 0.000 description 6
- 238000000149 argon plasma sintering Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000002265 prevention Effects 0.000 description 3
- 239000005083 Zinc sulfide Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910052984 zinc sulfide Inorganic materials 0.000 description 2
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010549 co-Evaporation Methods 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
- Exposure Or Original Feeding In Electrophotography (AREA)
Description
【考案の詳細な説明】
産業上の利用分野
本考案は電界発光を利用するELエツジエミツ
タに関するものであり、光プリンタ用の光ヘツド
や微小面発光素子として利用できるものである。[Detailed Description of the Invention] Industrial Application Field The present invention relates to an EL emitter that utilizes electroluminescence, and can be used as an optical head for an optical printer or a microscopic surface light emitting element.
従来の技術
ELエツジエミツタは、面発光デイスプレイ用
薄膜ELと同様な素子構造を有している。その具
体例について説明すると、第５図に示す様に、ま
ずガラス等の平面基板１上に、Al，Pd等の反射
率の大きい金属で下部金属電極２を形成する。次
にAl2O3，Y2O3等をターゲツトとし、スパツタ法
あるいは蒸着法により2000〜5000Åの第一絶縁層
３を成膜し、さらにその上にMn等の発光中心を
２〜10wt％含む硫化亜鉛等の発光層４を共蒸着
法ないし蒸着法で5000〜2000Å形成する。その上
に第二絶縁層５を第一絶縁層３と同じ要領で形成
し、上部金属電極６をAl等で形成してEL層７を
形成したものである。この様な構造を有すELエ
ツジエミツタを、光ヘツドのアレイとして使用す
る場合、素子端部より取り出す発光面の寸法に応
じて、上下金属電極６，２のうちのいずれかを等
ピツチのストライプ状電極にする。場合によつて
は硫化亜鉛発光層４も、前記ストライプ状電極に
合わせてストライプ状に加工する。Prior Art An EL edge emitter has an element structure similar to that of a thin film EL for surface emitting displays. To explain a specific example, as shown in FIG. 5, first, a lower metal electrode 2 is formed on a flat substrate 1 made of glass or the like using a metal having a high reflectance such as Al or Pd. Next, using Al 2 O 3 , Y 2 O 3, etc. as targets, a first insulating layer 3 with a thickness of 2000 to 5000 Å is formed by sputtering or vapor deposition, and 2 to 10 wt% of luminescent centers such as Mn are added thereon. A light emitting layer 4 containing zinc sulfide or the like is formed to a thickness of 5000 to 2000 Å by co-evaporation or vapor deposition. A second insulating layer 5 is formed thereon in the same manner as the first insulating layer 3, and an upper metal electrode 6 is formed of Al or the like to form an EL layer 7. When using an EL edge emitter with such a structure as an array of optical heads, one of the upper and lower metal electrodes 6 and 2 is arranged in stripes of equal pitch, depending on the dimensions of the light emitting surface extracted from the end of the element. Make it into an electrode. In some cases, the zinc sulfide light emitting layer 4 is also processed into a stripe shape to match the stripe electrode.
次に、光の取り出し部である端面を形成する
際、素子の端面、特にEL層の端面はできるだけ
鏡面に近い程、光の取り出し効率が良い。そこ
で、従来法として、まずダイシングにより端部と
切り出し、さらに端部を研磨し端面をなめらかに
していた。しかし、この方法はガラス基板が割れ
たり欠けたりしやすく、精度も限界があり、また
工数もかかるという問題点があつた。そのため、
他の方法として、端部を研磨せずに、エツチング
（例えば酸などのウエツトエツチング）を行つて
端面をなめらかにすることも行われていた。 Next, when forming an end face that is a light extraction portion, the closer the end face of the element, especially the end face of the EL layer, to a mirror surface, the better the light extraction efficiency. Therefore, as a conventional method, the ends were first cut out by dicing, and then the ends were polished to make the end surfaces smooth. However, this method has problems in that the glass substrate is easily broken or chipped, has limited accuracy, and requires a lot of man-hours. Therefore,
Another method has been to perform etching (for example, wet etching with acid) to make the end surface smooth without polishing the end portion.
考案が解決しようとする問題点
前記ウエツトエツチングによる端面形成で問題
となる点は、基板１とEL層７の各端面が同一面
でなくなることである。すなわち、EL層とガラ
ス基板とではエツチングレートが大きく異なるた
め、例えばEL層端面が容易にエツチングされて、
第５図に示すように基板端面より後退した形状と
なる。このため、EL発光時に、EL層７の端部よ
り出た光は、わずかに露出した基板１上を伝わつ
て基板端部へ到達する。このとき、光は散乱さ
れ、基板端部への到達効率が低下してしまう。ま
た、発光は基板１上のわずか１〜2μm程度の位置
で行われるので、基板端面でレンズ等で集光する
とき、レンズ面上での入射光の強度が、位置によ
り大きく変わり、レンズの入射光の強度分布がレ
ンズの光軸に対して著しく非対称となり、集光に
悪影響を及ぼすといつた不具合が生じる。Problems to be Solved by the Invention The problem with forming the end faces by wet etching is that the end faces of the substrate 1 and the EL layer 7 are not on the same plane. In other words, since the etching rates of the EL layer and the glass substrate are significantly different, for example, the end face of the EL layer can be easily etched.
As shown in FIG. 5, the shape is set back from the end surface of the substrate. Therefore, during EL emission, light emitted from the edge of the EL layer 7 travels on the slightly exposed substrate 1 and reaches the edge of the substrate. At this time, the light is scattered and the efficiency of reaching the edge of the substrate is reduced. In addition, since light emission occurs at a position of only about 1 to 2 μm on the substrate 1, when the light is focused by a lens etc. on the end face of the substrate, the intensity of the incident light on the lens surface varies greatly depending on the position, and the incident light on the lens The intensity distribution of the light becomes significantly asymmetrical with respect to the optical axis of the lens, causing problems such as adversely affecting light collection.
問題点を解決するための手段
本考案はELエツジエミツタにおいて、発光層
の端面近傍における下部電極の基板側の面と基板
上面との間に段差を設けたことを特徴とする。Means for Solving the Problems The present invention is characterized in that an EL edge emitter is provided with a step between the substrate-side surface of the lower electrode and the upper surface of the substrate in the vicinity of the end surface of the light-emitting layer.
作 用
上記のように、発光層の端面近傍における下部
金属電極の基板側の面と基板上面との間に段差を
形成すれば、発光層と基板上面との間隔寸法が大
きくなつて、発光層位置とレンズの光軸を略一致
できて、レンズへの入射光の光軸に対する対称性
が向上して、効率よく集光できると共に、発光層
の端面から生た光が基板上面で乱反射することが
防止できて、集光後の光量が増大する。かかる効
果は、基板の一部に所定高さの段差を形成するこ
とで実現できるものであり、必ずしも基板端部全
体をEL層端面と同一面にする必要がなく、この
ためエツチング時間を大幅に短縮できて、コスト
を低減することができる。Effect As described above, if a step is formed between the substrate-side surface of the lower metal electrode near the end surface of the light-emitting layer and the top surface of the substrate, the distance between the light-emitting layer and the top surface of the substrate increases, and the light-emitting layer The position and the optical axis of the lens can be approximately aligned, improving the symmetry of the incident light to the lens with respect to the optical axis, allowing efficient light collection, and allowing the light emitted from the end surface of the light emitting layer to be diffusely reflected on the top surface of the substrate. can be prevented, and the amount of light after condensation can be increased. This effect can be achieved by forming a step with a predetermined height on a part of the substrate, and it is not necessary to make the entire edge of the substrate flush with the edge of the EL layer, which greatly reduces the etching time. It can be shortened and costs can be reduced.
実施例
以下本考案の構造を図を用いて説明する。第１
図、第２図に異なる実施例の断面図を示す。第１
図に示す例では、基板１の上に、厚膜レジスト８
を光散乱防止層として形成して、下部金属電極２
の基板側面と基板１の上面との間に段差１０を形
成したものである。第２図は、基板１上に特別な
光散乱防止層を設けず、基板端部をドライエツチ
ング、反応性イオンエツチング等の手段で、所望
の段差までエツチングして、下部金属電極２の基
板側面と基板１の上面との間に段差１１を形成す
るものである。すなわち、従来のウエツトエツチ
ングに対して、本考案で使用するドライエツチン
グ等は異方性エツチングであり、かつガラス基板
１とEL層７とでエツチングレートに顕著な差が
ないので、比較的短時間でガラス基板もエツチン
グできて、ガラス基板１の端部に所定の高さの段
差１１を容易に形成することができる。EXAMPLE The structure of the present invention will be explained below using the drawings. 1st
FIG. 2 shows cross-sectional views of different embodiments. 1st
In the example shown in the figure, a thick film resist 8 is placed on the substrate 1.
is formed as a light scattering prevention layer to form the lower metal electrode 2.
A step 10 is formed between the side surface of the substrate 1 and the top surface of the substrate 1. In FIG. 2, a special anti-light scattering layer is not provided on the substrate 1, and the edge of the substrate is etched to a desired level difference by dry etching, reactive ion etching, etc., and the side surface of the substrate of the lower metal electrode 2 is etched. A step 11 is formed between the upper surface of the substrate 1 and the upper surface of the substrate 1. That is, in contrast to conventional wet etching, the dry etching used in the present invention is anisotropic etching, and there is no significant difference in etching rate between the glass substrate 1 and the EL layer 7, so it is relatively short. The glass substrate can also be etched in a short amount of time, and the step 11 of a predetermined height can be easily formed at the end of the glass substrate 1.
次に、第１図の実施例について、製造方法を第
３図に示す。まず、基板１上に、100〜1000μmの
厚さのポリイミド等の厚膜レジスト８を付着させ
る。この上に、Al，Pd等の下部金属電極２、第
一絶縁層３、発光層４、第二絶縁層５、上部金属
電極６を順次形成する。次に、端部から100〜
2000μm程度の幅を露光させる様に、レジスト等
でマスクパターン９を形成する。マスクパターン
９の形成は、上部金属電極６を成膜後に、基板を
ダイシングして適当な寸法に成形したのち行つて
もよい。次に、ドライエツチング、反応性イオン
エツチング、ウエツトエツチング等によりEL層
７をエツチングする。次にEL層７をマスクとし
て露光、現像するか反応性イオンエツチング、
O2プラズマアツシヤー等で厚膜レジスト８の端
部を除去して光散乱防止層を形成する。 Next, a manufacturing method for the embodiment shown in FIG. 1 is shown in FIG. 3. First, a thick film resist 8 made of polyimide or the like having a thickness of 100 to 1000 μm is deposited on the substrate 1 . On top of this, a lower metal electrode 2 made of Al, Pd, etc., a first insulating layer 3, a light emitting layer 4, a second insulating layer 5, and an upper metal electrode 6 are sequentially formed. Then 100~ from the end
A mask pattern 9 is formed using resist or the like so that a width of about 2000 μm is exposed. The mask pattern 9 may be formed after the upper metal electrode 6 is formed and the substrate is diced and formed into appropriate dimensions. Next, the EL layer 7 is etched by dry etching, reactive ion etching, wet etching, or the like. Next, using the EL layer 7 as a mask, exposure and development or reactive ion etching,
The ends of the thick film resist 8 are removed using an O 2 plasma assher or the like to form a light scattering prevention layer.
第２図に示す例では、基板１上に厚膜レジスト
８を形成する点を除いて、下部金属電極２の形成
以降EL層７の端部のエツチングまでは、第１図
と同様な手順で行う。次に露出した基板端部をド
ライエツチング、反応性イオンエツチング等でエ
ツチングし光散乱防止層とする。 In the example shown in FIG. 2, the steps from forming the lower metal electrode 2 to etching the end of the EL layer 7 are the same as in FIG. 1, except for forming the thick film resist 8 on the substrate 1. conduct. Next, the exposed edge of the substrate is etched by dry etching, reactive ion etching, etc. to form a light scattering prevention layer.
第４図は本考案に係るエツジエミツタの光の取
り出し状態の略図を示す。EL発光層４より発す
る光は、基板端部に設けられたレンズ１２等に入
射するが、この入射光は直接光１３および基板１
上面での反射光１４の和である。基板１の屈折率
をNa、基板上の光伝達部分の媒体の屈折率をNe
とすると、基板上での反射率は
｜Na−Ne／Na＋Ne｜2
で表せる。基板上での反射を考慮して、レンズ面
上での入射光の強度を、前記段差寸法をパラメー
タとして計算した結果を第４図に示す。 FIG. 4 shows a schematic diagram of the light extraction state of the edge emitter according to the present invention. The light emitted from the EL light emitting layer 4 enters a lens 12 provided at the edge of the substrate, but this incident light is directly transmitted to the light 13 and the substrate 1.
This is the sum of the reflected light 14 on the upper surface. The refractive index of substrate 1 is Na, and the refractive index of the medium of the light transmission part on the substrate is Ne.
Then, the reflectance on the substrate can be expressed as |Na−Ne/Na+Ne| 2 . FIG. 4 shows the results of calculating the intensity of the incident light on the lens surface using the step size as a parameter, taking into account the reflection on the substrate.
この図より、段差のない場合、レンズ面上での
総光量は段差寸法1.0mmの場合に比較して約1/2に
低下するとともに、レンズ面上での光強度分布
は、基板面から離れるに従つて減少していく。こ
れに対し、段差寸法を1.0mmとした場合、基板面
から、1.0mmの平行面を中心にその上下でほぼ対
称な光強度を示すので、口径2.0mmのレンズを、
その中心を基板面から1.0mmの位置として基板端
部に設置すれば、効果的に光を取り出すことがで
きる。ここで、基板上での光の散乱防止、および
レンズへの入射光の対称性向上のためには、基板
端部全体をEL層端面と同一面にすることが最も
望ましいが、EL層の厚みよりも格段に厚い基板
をすべてエツチングするにはあまりに長時間を要
し、実用的でない。本考案によれば、上記のよう
に、基板に所定高さの段差を形成することがで
き、基板全体をエツチングしなくても多大な効果
があるので、エツチング時間を大幅に短縮でき、
コストを低減できる利点がある。 From this figure, when there is no step, the total amount of light on the lens surface is reduced to about 1/2 compared to when the step size is 1.0 mm, and the light intensity distribution on the lens surface moves away from the substrate surface. It decreases accordingly. On the other hand, if the step size is 1.0 mm, the light intensity will be almost symmetrical above and below a parallel plane of 1.0 mm from the substrate surface, so a lens with an aperture of 2.0 mm will
If it is installed at the edge of the substrate with its center 1.0 mm from the substrate surface, light can be extracted effectively. Here, in order to prevent light scattering on the substrate and improve the symmetry of incident light to the lens, it is most desirable to make the entire edge of the substrate flush with the end surface of the EL layer, but the thickness of the EL layer It would take too long to etch all of a board that is much thicker than that, making it impractical. According to the present invention, as described above, it is possible to form a step of a predetermined height on the substrate, and a great effect can be obtained without etching the entire substrate, so that the etching time can be significantly shortened.
This has the advantage of reducing costs.
考案の効果
以上の様に本考案によれば、基板１とEL層７
の間に段差１０，１１を設けることにより、基板
上での光の散乱を抑えて効果的に光を取り出すこ
とができる。光プリンタ用の光ヘツドとして使用
する場合、その光量がプリントスピードに直接影
響するので、本考案の工業的価値は大きい。Effects of the invention As described above, according to the invention, the substrate 1 and the EL layer 7
By providing the steps 10 and 11 between them, scattering of light on the substrate can be suppressed and light can be effectively extracted. When used as an optical head for an optical printer, the amount of light directly affects the printing speed, so the present invention has great industrial value.
第１図は本考案の一実施例であるELエツジエ
ミツタの断面図である。第２図は、他の実施例の
断面図である。第３図は実施例１のELエツジエ
ミツタの製造方法について説明する各段階の断面
図である。第４図は本考案の段差を設けたことの
効果を説明するための、レンズ面での入射光の強
度分布図である。第５図は従来のELエツジエミ
ツタの断面図である。
１……基板、２……下部金属電極、３……第一
絶縁層、４……発光層、５……第二絶縁層、６…
…上部金属電極、７……EL層、８……厚膜レジ
スト、９……マスクパターン、１０，１１……段
差、１２……レンズ、１３……直接光、１４……
反射光。
FIG. 1 is a sectional view of an EL edge emitter which is an embodiment of the present invention. FIG. 2 is a sectional view of another embodiment. FIG. 3 is a cross-sectional view of each step of the method for manufacturing the EL edge emitter of Example 1. FIG. 4 is an intensity distribution diagram of incident light on the lens surface for explaining the effect of providing the step according to the present invention. FIG. 5 is a sectional view of a conventional EL edge emitter. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Lower metal electrode, 3... First insulating layer, 4... Light emitting layer, 5... Second insulating layer, 6...
... Upper metal electrode, 7 ... EL layer, 8 ... Thick film resist, 9 ... Mask pattern, 10, 11 ... Step, 12 ... Lens, 13 ... Direct light, 14 ...
reflected light.
Claims (1)
したEL層を形成し、前記発光層の端面近傍に
おける下部電極の基板側の面と基板上面との間
に段差を設けたことを特徴とするELエツジエ
ミツタ。 (2) 前記段差を、基板と下部電極間に介在した厚
膜レジストによつて形成したことを特徴とす
る、実用新案登録請求の範囲第(1)項記載のEL
エツジエミツタ。 (3) 前記段差を、発光層の端面近傍に露出した基
板上面をエツチングにより薄くして形成したこ
とを特徴とする、実用新案登録請求の範囲第(1)
項記載のELエツジエミツタ。[Claims for Utility Model Registration] (1) An EL layer having a light emitting layer sandwiched between an upper electrode and a lower electrode is formed on a substrate, and the surface of the lower electrode on the substrate side near the end surface of the light emitting layer and the upper surface of the substrate are formed. EL edge emitters are characterized by having a step between them. (2) The EL according to claim (1) of the utility model registration, characterized in that the step is formed by a thick film resist interposed between the substrate and the lower electrode.
Etsujiemitsuta. (3) Utility model registration claim No. (1) characterized in that the step is formed by thinning the upper surface of the substrate exposed near the end surface of the light emitting layer by etching.
EL Edge Mitsuta described in section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2678687U JPH0452958Y2 (en) | 1987-02-24 | 1987-02-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2678687U JPH0452958Y2 (en) | 1987-02-24 | 1987-02-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63134495U JPS63134495U (en) | 1988-09-02 |
| JPH0452958Y2 true JPH0452958Y2 (en) | 1992-12-11 |
Family
ID=30828194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2678687U Expired JPH0452958Y2 (en) | 1987-02-24 | 1987-02-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0452958Y2 (en) |
-
1987
- 1987-02-24 JP JP2678687U patent/JPH0452958Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63134495U (en) | 1988-09-02 |
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