JPH0453336U - - Google Patents

Info

Publication number
JPH0453336U
JPH0453336U JP9478490U JP9478490U JPH0453336U JP H0453336 U JPH0453336 U JP H0453336U JP 9478490 U JP9478490 U JP 9478490U JP 9478490 U JP9478490 U JP 9478490U JP H0453336 U JPH0453336 U JP H0453336U
Authority
JP
Japan
Prior art keywords
code
synchronization code
period
coincidence detection
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9478490U
Other languages
Japanese (ja)
Other versions
JP2545004Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9478490U priority Critical patent/JP2545004Y2/en
Publication of JPH0453336U publication Critical patent/JPH0453336U/ja
Application granted granted Critical
Publication of JP2545004Y2 publication Critical patent/JP2545004Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Transceivers (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の構成を示すブロツ
ク図。第2図は基地局から送信されてくる信号の
フオーマツトの1例を示す模式図。第3図は本考
案の一実施例の作用の説明に供するタイミング図
。 1……アンテナ、2……アンテナ切替スイツチ
、3……受信機、6……送信機、39および40
……デコーダ、41および42……アンドゲート
回路、43……スイツチ、51……駆動制御回路
、52……送信制御回路、64および68……増
幅器、69……高周波電力増幅器。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a schematic diagram showing an example of the format of a signal transmitted from a base station. FIG. 3 is a timing diagram for explaining the operation of one embodiment of the present invention. 1...Antenna, 2...Antenna changeover switch, 3...Receiver, 6...Transmitter, 39 and 40
... Decoder, 41 and 42 ... AND gate circuit, 43 ... Switch, 51 ... Drive control circuit, 52 ... Transmission control circuit, 64 and 68 ... Amplifier, 69 ... High frequency power amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 同期コードと同期コード間に識別コードとメツ
セージコードとの対が複数挿入されたフオーマツ
トの送信信号を受信し所定コードの信号を送信す
る送受信端末装置であつて、受信同期コードのロ
ツクを検出して受信同期コードのロツク中受信同
期コードに対応して受信同期コード期間より僅か
に長い期間ロツク出力を発生する第1の信号発生
手段と、受信同期コードが予め設定してある同期
コードと一致することを検出したとき一致検出出
力を発生する第2の信号発生手段と、ロツク出力
と一致検出出力とを入力として論理積演算する論
理積演算手段と、論理積演算手段の出力が入力さ
れたとき予め指定した識別コードと対をなすメツ
セージコード長の期間所定コードの送信状態にす
る送信制御手段とを備えたことを特徴とする送受
信端末装置。
A transmitting/receiving terminal device that receives a transmitted signal in a format in which a plurality of pairs of an identification code and a message code are inserted between synchronization codes, and transmits a signal with a predetermined code, and detects that the received synchronization code is locked. The first signal generating means generates a lock output for a period slightly longer than the reception synchronization code period in response to the reception synchronization code while the reception synchronization code is locked, and the reception synchronization code matches a preset synchronization code. a second signal generation means that generates a coincidence detection output when the lock output and the coincidence detection output are detected; an AND operation means that performs an AND operation using the lock output and the coincidence detection output; 1. A transmitting/receiving terminal device comprising: transmission control means for maintaining a transmission state of a predetermined code for a period of a message code length paired with a specified identification code.
JP9478490U 1990-09-11 1990-09-11 Transmission / reception terminal device Expired - Lifetime JP2545004Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9478490U JP2545004Y2 (en) 1990-09-11 1990-09-11 Transmission / reception terminal device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9478490U JP2545004Y2 (en) 1990-09-11 1990-09-11 Transmission / reception terminal device

Publications (2)

Publication Number Publication Date
JPH0453336U true JPH0453336U (en) 1992-05-07
JP2545004Y2 JP2545004Y2 (en) 1997-08-25

Family

ID=31832999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9478490U Expired - Lifetime JP2545004Y2 (en) 1990-09-11 1990-09-11 Transmission / reception terminal device

Country Status (1)

Country Link
JP (1) JP2545004Y2 (en)

Also Published As

Publication number Publication date
JP2545004Y2 (en) 1997-08-25

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