JPH0454099U - - Google Patents

Info

Publication number
JPH0454099U
JPH0454099U JP9541890U JP9541890U JPH0454099U JP H0454099 U JPH0454099 U JP H0454099U JP 9541890 U JP9541890 U JP 9541890U JP 9541890 U JP9541890 U JP 9541890U JP H0454099 U JPH0454099 U JP H0454099U
Authority
JP
Japan
Prior art keywords
backup
circuit board
printed circuit
battery
sram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9541890U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9541890U priority Critical patent/JPH0454099U/ja
Publication of JPH0454099U publication Critical patent/JPH0454099U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Static Random-Access Memory (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図はこの考案の一実施例による揮
発性メモリバツクアツプを説明する図、第3図は
従来の揮発性メモリ搭載プリント基板を示す図、
第4図は従来のRAMカセツト型プリント基板を
示す図である。 図において、1はプリント基板、2はSRAM
、3はSRAMバツクアツプ用電気二重層コンデ
ンサ、4はコネクタ、5はメモリバツクアツプ用
小型プリント基板、6はNi−Cdバツテリーで
ある。なお、図中、同一符号は同一、または相当
部分を示す。
FIGS. 1 and 2 are diagrams illustrating volatile memory backup according to an embodiment of the invention, and FIG. 3 is a diagram showing a conventional volatile memory-mounted printed circuit board.
FIG. 4 is a diagram showing a conventional RAM cassette type printed circuit board. In the figure, 1 is a printed circuit board, 2 is an SRAM
, 3 is an electric double layer capacitor for SRAM backup, 4 is a connector, 5 is a small printed circuit board for memory backup, and 6 is a Ni-Cd battery. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 低消費電流のバツテリバツクアツプが可能なス
タテイツクランダムアクセスメモリSRAMと、
SRAMバツクアツプ用の電気二重層コンデンサ
を実装したプリント基板にNi−Cdバツテリー
の様な二次電池を実装したメモリバツクアツプ用
小型プリント基板を接続することにより、長期間
のメモリバツクアツプが可能なことを特徴とする
揮発性メモリバツクアツプ用プリント基板。
A static random access memory SRAM capable of battery backup with low current consumption;
Long-term memory backup is possible by connecting a small printed circuit board for memory backup equipped with a secondary battery such as a Ni-Cd battery to a printed circuit board mounted with an electric double layer capacitor for SRAM backup. A printed circuit board for volatile memory backup featuring:
JP9541890U 1990-09-11 1990-09-11 Pending JPH0454099U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9541890U JPH0454099U (en) 1990-09-11 1990-09-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9541890U JPH0454099U (en) 1990-09-11 1990-09-11

Publications (1)

Publication Number Publication Date
JPH0454099U true JPH0454099U (en) 1992-05-08

Family

ID=31834125

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9541890U Pending JPH0454099U (en) 1990-09-11 1990-09-11

Country Status (1)

Country Link
JP (1) JPH0454099U (en)

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