JPH0455836U - - Google Patents
Info
- Publication number
- JPH0455836U JPH0455836U JP1990098107U JP9810790U JPH0455836U JP H0455836 U JPH0455836 U JP H0455836U JP 1990098107 U JP1990098107 U JP 1990098107U JP 9810790 U JP9810790 U JP 9810790U JP H0455836 U JPH0455836 U JP H0455836U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- data transmission
- resistor
- serial data
- transmission line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Analogue/Digital Conversion (AREA)
- Noise Elimination (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
は本考案の具体的な一実施例を示す回路図、第３
図は本考案の具体的な他の実施例を示す回路図、
第４図は衛星放送チユーナ内蔵テレビのデジタル
音声処理システムの一例を示すブロツク図、第５
図は従来のアナログミユート回路の一例を示す回
路である。
４……ＰＣＭデコーダ、５……デジタルフイル
タ、６……Ｄ／Ａコンバータ、１１，２３……抵
抗、２１……スイツチ、２２……ＦＥＴ。
Fig. 1 is a circuit diagram showing an embodiment of the invention, Fig. 2 is a circuit diagram showing a specific embodiment of the invention, and Fig. 3 is a circuit diagram showing a specific embodiment of the invention.
The figure is a circuit diagram showing another specific embodiment of the present invention.
Figure 4 is a block diagram showing an example of a digital audio processing system for a television with a built-in satellite broadcast tuner.
The figure shows an example of a conventional analog mute circuit. 4...PCM decoder, 5...Digital filter, 6...D/A converter, 11, 23...Resistor, 21...Switch, 22...FET.
Claims (1)
デジタル音声回路において、１ビツトのシリアル
データ伝送ラインに直列に介挿された抵抗と、音
声ミユート時にオン制御され、前記抵抗の出力端
と接地間を結ぶ電路に介挿されたスイツチ回路と
を備えたことを特徴とする音声ミユート回路。 In a digital audio circuit having a 1-bit serial data transmission line, there is a resistor inserted in series with the 1-bit serial data transmission line, and an electric line that is turned on during audio muting and connects the output end of the resistor to ground. An audio mute circuit comprising an inserted switch circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990098107U JPH0455836U (en) | 1990-09-20 | 1990-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990098107U JPH0455836U (en) | 1990-09-20 | 1990-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0455836U true JPH0455836U (en) | 1992-05-13 |
Family
ID=31839029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990098107U Pending JPH0455836U (en) | 1990-09-20 | 1990-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0455836U (en) |
-
1990
- 1990-09-20 JP JP1990098107U patent/JPH0455836U/ja active Pending
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