JPH0456765A - Method for controlling wafer temperature - Google Patents

Method for controlling wafer temperature

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Publication number
JPH0456765A
JPH0456765A JP16658190A JP16658190A JPH0456765A JP H0456765 A JPH0456765 A JP H0456765A JP 16658190 A JP16658190 A JP 16658190A JP 16658190 A JP16658190 A JP 16658190A JP H0456765 A JPH0456765 A JP H0456765A
Authority
JP
Japan
Prior art keywords
wafer
temperature
temperature control
cooling
control block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16658190A
Other languages
Japanese (ja)
Inventor
Yutaka Saito
裕 斉藤
Yasumichi Suzuki
康道 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16658190A priority Critical patent/JPH0456765A/en
Publication of JPH0456765A publication Critical patent/JPH0456765A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体等の薄膜の形成・エツチング等ウェハ処
理装置における処理中ウェハoii*並びKii度プロ
ファイルを制御する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for controlling the oii* and Kii degree profiles of a wafer during processing in a wafer processing apparatus for forming and etching thin films of semiconductors and the like.

〔従来の技術〕[Conventional technology]

従来のクエ・・温度制御装置は、特開昭6386168
号公報に記載のように、ウェハ載置部に加熱素子と冷却
水路とを設け、載置部のウェハ裏面と接する部分くアル
ゴンガスを導入することでアルゴンガスによりウェハと
載置部との熱伝導を行わせ、ウェハ載置部の温度に近く
なるようウェハの温度を制御していた6その丸め、ウェ
ハを加熱するとは、加熱素子によりウェハ載置部を加熱
しなければならず、ウェハ載置部は冷却水路。
The conventional Que temperature control device is disclosed in Japanese Patent Application Laid-Open No. 6386168.
As described in the publication, a heating element and a cooling channel are provided in the wafer placement section, and argon gas is introduced into the portion of the placement section that is in contact with the back surface of the wafer. The temperature of the wafer was controlled so that it was close to the temperature of the wafer platform by conducting conduction. The storage area is a cooling waterway.

冷却水導入口、アルゴンガス導入口等をもつため、質量
が犬無くなり、所定の温度に載量部が上昇するのに時間
を要していた。ま九、加熱中のウェハを冷却するには、
加熱素子へO加熱手段を切)、その後に、冷却水導入口
より冷却水路に冷却水を流しこれによ)冷却するため、
ウェハ載置部が冷えるまでには、相当の時間を要する。
Since it has a cooling water inlet, an argon gas inlet, etc., there is no mass, and it takes time for the loaded part to rise to a predetermined temperature. Nine, to cool down the wafer while it is being heated,
In order to cool the heating element (turn off the O heating means), and then flow cooling water into the cooling waterway from the cooling water inlet,
It takes a considerable amount of time for the wafer platform to cool down.

そOため、ウェハ丸環装置でのウェハ錫塩時間が枚葉式
では一分ないし二分程度であるため、島埋中ウェハを加
熱から冷却又は、温度プロファイル制御するととができ
なかった。
Therefore, since the wafer tin salting time in the wafer rounding device is about 1 to 2 minutes in the single wafer type, it has been impossible to control the temperature profile of the wafer from heating to cooling during embedding.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来技術は、ウェハの加熱・冷却の丸めの温度制御
ブロック(ウェハ載置部)の質量及び加熱冷却の設定温
度になるまでの時定数について考慮されて訃らず、短時
間での設定温度の変更子温度プロファイル制御くけ追随
でき彦い問題があった。
The above conventional technology takes into consideration the mass of the rounding temperature control block (wafer mounting part) for heating and cooling the wafer and the time constant until the heating and cooling temperature reaches the set temperature. There was a problem that the changer temperature profile control could not be followed.

本発明の目的は、ウェハ沃塩装置のウェハの温を會短時
間に変更又は所定温度に設定することKある。
An object of the present invention is to change the temperature of a wafer in a wafer iodide apparatus within a short time or to set it to a predetermined temperature.

本発明の他の目的は、晃罵中ウェハの温度を処理O初期
から終了まで決められ九温度プロファイルに制御するこ
とにある。
Another object of the present invention is to control the temperature of the wafer during processing to a predetermined temperature profile from the beginning to the end of the process.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成する九めに、本発明はウェハ裏面に設け
る加熱・冷却のための温度制御ブロックの質量を小さく
し、さらに、加熱、冷却の切換えを瞬時に行わせるため
、加熱素子と冷却素子が同一素子で可能なベルティエ素
子とし、電流の方向を切換えることでウェハ裏Iに接す
る温度制御ブロック面を加熱面から冷却面への切換えを
可能とした。
Ninthly, in order to achieve the above object, the present invention reduces the mass of the temperature control block for heating and cooling provided on the backside of the wafer, and furthermore, in order to instantly switch between heating and cooling, the heating element and the cooling element are A Berthier element is used in which both can be used in the same element, and by switching the direction of current, it is possible to switch the surface of the temperature control block in contact with the back side of the wafer I from a heating surface to a cooling surface.

さらく、本発明のウェハ載置部は、ウェハに比べて大き
な質量を持ち、長時間対応の温度制御を行うペースブロ
ックとベルティエ素子より成る温度制御ブロックと温度
制御ブロック上に載量したウェハと温度制御ブロックと
の間の熱の伝達を真空中で可能とするための手段を設け
た。
Furthermore, the wafer mounting section of the present invention has a large mass compared to the wafer, and has a temperature control block consisting of a pace block and a Berthier element that perform long-term temperature control, and a wafer mounted on the temperature control block. Means were provided to allow heat transfer to and from the temperature control block in a vacuum.

〔作用〕[Effect]

ウェハ載置部の温度制御ブロックは、ベルティ工素子で
構成されるため、ペルティエ素子に電流を、例えば順方
向に流せば、温度制御ブロックのウェハKllする面は
加熱され、反対のベースブロックIIc接する面は冷却
される。ここでペースブロックはウェハに比べて質量が
二桁以上異なるため、ウェハを100℃加熱するに必要
な熱量ではペースブロックの温度は数置しか変動しない
、また、逆にウェハの温度が数百℃で、これを冷却する
場合には、温度制御ブロックのベルティエ素子に逆方向
C)’fllNを流すことによ)、ウェハに接する面は
冷却され、ウェハの熱量をうばうことでウェハを冷却す
る。この場合も、加熱の場合と同様でペースブロック側
への流入熱量ではペースブロックはほとんど!l!j上
昇しない、しかし、ウエノ・の温度制御として、多量の
ウェハを連続的と加熱又は冷却を行う場合は、ペースブ
ロックの温度は冷却、又は、加熱しつづけられ、ベルテ
ィエ素子の温度制御機能が低下するので、ペースブロッ
クには加熱源及び冷却機能を設けておく。また、ウェハ
処理の多くは減圧下(10−2Paから102Pa l
i度の真空域)で行われるため、温度制御ブロックのウ
ェハに接する面にガス導入機構を設けてガスによる熱の
伝達を行うか、温度制御ブロックのウェハに接する面に
静電吸着機能を設け、温度制御ブロックとウェハとの間
の熱の伝達を良くする。
The temperature control block of the wafer platform is composed of a Peltier element, so if a current is passed through the Peltier element, for example in the forward direction, the surface of the temperature control block that contacts the wafer Kll is heated and comes into contact with the opposite base block IIc. The surface is cooled. Since the mass of the pace block differs by more than two orders of magnitude compared to the wafer, the temperature of the pace block will vary by only a few places with the amount of heat required to heat the wafer to 100 degrees Celsius, and conversely, the temperature of the wafer will vary by several hundred degrees Celsius. In order to cool this, the surface in contact with the wafer is cooled by flowing C)'fllN in the opposite direction to the Berthier element of the temperature control block, and the wafer is cooled by absorbing the amount of heat from the wafer. In this case, as in the case of heating, the amount of heat flowing into the pace block side is almost the same as the pace block! l! However, when a large number of wafers are continuously heated or cooled to control the temperature of the wafer, the temperature of the pace block continues to cool or heat, and the temperature control function of the Berthier element decreases. Therefore, the pace block should be equipped with a heating source and cooling function. In addition, most of the wafer processing is performed under reduced pressure (10-2Pa to 102Pa
Since the process is carried out in a vacuum region of i degrees Celsius), a gas introduction mechanism is installed on the surface of the temperature control block in contact with the wafer to transfer heat through the gas, or an electrostatic adsorption function is installed on the surface of the temperature control block in contact with the wafer. , improving heat transfer between the temperature control block and the wafer.

この作用によプ、真空中でのウェハ処理中のウェハの温
度を短時間で制御可能とし、かつ、加熱から冷却又は冷
却から加熱への温度制御も短時間で可能となる。
Due to this effect, the temperature of the wafer during wafer processing in vacuum can be controlled in a short time, and the temperature can also be controlled from heating to cooling or from cooling to heating in a short time.

〔実y11例〕 以下1本発明の一実施例を第1図により説明する。第1
図は、ウェハ処理装!としてスパッタリング装!を表わ
しておシ、プロセスガスCI[&、及び、排気手R(図
示せず)をもつ真空容器1にスパッタリング成罵用のカ
ソード構体2とウェハ載置部3が設置される。カソード
構体2Fiターゲツト11上にプラス!12を閉じ込め
る念めの磁気装置4をもち、磁気装置4Fiヨーク13
と磁気コイル14及びその電源15で構成され、ターゲ
ット11を具備したバッキングプレ−116CIターゲ
ツト110反対費に設置されている。カソード構体2は
真空容器1に絶縁板17を介して電気的に浮かした状態
で設置され、ターゲット11の近傍にはアノード18が
真空容器に設置され、アノード18とカソード構体2の
バッキングプレート16との関にスパッタ電源19が設
置されている。ウェハ載置部3Fi、ペースブロック2
oと温度制御ブロック21が熱の伝導が良くなるように
m絖され、取付板22に設置されている0敗付板22は
絶縁板23を介して真空容器1Y−電気的に浮いた状態
で設置される。ベースブロック20には、加熱のための
ヒータ24とその電源25と冷却のための水路26と水
路26への冷却水の導入口27と排出口28とを具備し
ている。また、温度制御ブロック21にはペルテイニ素
子用O電源29が接続されており、ウェハ50■裏面に
ガスを導入するためのガス導入ポート31を設けている
。また、ウェハ50の上面にはウニI−の裏面にガスを
導入した時、ウェハ30を温度制御ブロック21に密着
させるための押え32が設置され、押え52には、スパ
ッタ成膜中のウニI・表面にプラズマ中の雰囲気ガス(
一般にはアルゴンガス)イオンを入射・衝突させるバイ
アス電源33が接続されている。
[11 Practical Examples] Hereinafter, one embodiment of the present invention will be described with reference to FIG. 1st
The diagram shows wafer processing equipment! As a sputtering device! A cathode structure 2 for sputtering and a wafer mounting section 3 are installed in a vacuum vessel 1 having a process gas CI [&, and an exhaust hand R (not shown). Plus on the cathode structure 2Fi target 11! It has a magnetic device 4 to confine the magnetic device 4Fi yoke 13.
It consists of a magnetic coil 14 and its power source 15, and is installed on a backing plate 116 having a target 11 opposite the CI target 110. The cathode structure 2 is installed in a vacuum container 1 in an electrically floating state via an insulating plate 17, and an anode 18 is installed in the vacuum container near the target 11. The anode 18 and the backing plate 16 of the cathode structure 2 A sputtering power supply 19 is installed at the junction. Wafer placement section 3Fi, pace block 2
The temperature control block 21 and the temperature control block 21 are wired to improve heat conduction, and the zero-loss plate 22 installed on the mounting plate 22 is connected to the vacuum vessel 1Y through an insulating plate 23 in an electrically floating state. will be installed. The base block 20 includes a heater 24 for heating, a power source 25 thereof, a water channel 26 for cooling, and an inlet 27 and an outlet 28 for introducing cooling water into the water channel 26. Further, the temperature control block 21 is connected to an O power source 29 for the Perteini element, and is provided with a gas introduction port 31 for introducing gas to the back surface of the wafer 50. Further, a presser foot 32 is installed on the upper surface of the wafer 50 to bring the wafer 30 into close contact with the temperature control block 21 when gas is introduced to the back surface of the sea urchin I-.・Atmosphere gas in plasma on the surface (
A bias power source 33 is connected which causes ions (generally argon gas) to enter and collide.

この構成で、スパッタ成腹中のウェハ表面に雰囲気ガス
イオンを衝突させるバイアススパッタ成膜を行った場合
、通常O成膜では、ウエノ・は成膜前に所定の温fLK
加熱し、ウェハ載置へ供給される。その後、バイアスス
パッタ成膜を行うため、ウェハには雰囲気ガスイオンが
衝突し、このエネルギは一般に数十〜数百Wあり、成員
の経過に伴い、ウェハのi!度は上昇し、LSIの配a
m形成の許容温室である450℃以上となる。このため
、この様な成膜では、ウェハ載置部を冷却しておいて、
ウェハの@度上昇を防いでいる。しかし、この様な構造
では、成膜前に所定の温IIL<加熱したウェハをウェ
ハ載置部へ供給すると、ウェハ載置部は冷却されている
ため、ウェハO温度が低下し、成膜初期の温度が漢を形
成すると必要な温度以下となり高品質の藁が得られなか
った。
With this configuration, when performing bias sputter film formation in which atmospheric gas ions collide with the wafer surface during sputter formation, in normal O film formation, the Ueno film is heated to a predetermined temperature fLK before film formation.
It is heated and supplied to the wafer holder. After that, to perform bias sputtering film formation, atmospheric gas ions collide with the wafer, and this energy is generally several tens to several hundred W, and as the wafer progresses, the i! As the temperature rises, LSI distribution a
The temperature is 450°C or higher, which is the permissible greenhouse temperature for m-formation. For this reason, in this type of film formation, the wafer mounting section must be cooled.
Prevents the temperature of the wafer from rising. However, in such a structure, if a heated wafer is supplied to the wafer platform at a predetermined temperature IIL before film formation, the wafer O temperature will drop because the wafer platform has been cooled, and the initial temperature of film formation will decrease. When the straw was formed, the temperature dropped below the required temperature and high quality straw could not be obtained.

本発明では、ウェハ30の裏11rKは、ペルティ工素
子(図示せず)を組込んた温度制御ブロックが設けられ
ているので、成膜前は、温度制御ブロック21のウェハ
50に接する夏を高温の状態に加熱しておき、バイアス
スパッタ開始と共にベルティエ菓子へ流す電流の方向を
切換え、iiL度制御ブロック21のウェハ50と接す
る面を低温の状11に冷却する。
In the present invention, the back side 11rK of the wafer 30 is provided with a temperature control block incorporating a Pelty element (not shown). The direction of the current flowing through the Berthier confectionery is switched at the start of bias sputtering, and the surface of the L degree control block 21 in contact with the wafer 50 is cooled to a low temperature state 11.

本実施例によれば、成膜の初期から成員中を通して、ウ
ェー・を加熱、冷却及び加熱から冷却、冷却から加熱へ
と所定の温度又は温度プロファイルに制御でき、高品質
の膜を形成することができる。
According to this embodiment, the wafer can be controlled to a predetermined temperature or temperature profile from heating to cooling and from heating to cooling and from cooling to heating from the initial stage of film formation through the member, and a high quality film can be formed. I can do it.

本発明の他の実施例を第2図により説明する。Another embodiment of the present invention will be described with reference to FIG.

第2図は第1図に比べてウニI・処理製蓋のウエノ・載
置部が異なる0本発明のウニ/・載置部3′は、加熱の
ためのヒータ24とその電源25と冷却のための水路2
6と水路26への冷却水の導入口27と排出口28を具
備したベースブロック20とベースブロック20に熱的
に伝導よく温度制御ブロック40が設置されている。温
度制御ブロック40にはペルティエ素子が具備されてお
り、その電源29が接続され、さらに、ウェハ裏面に接
する儒には導電体の上に高誘電率の絶縁物薄膜を具備し
た静電吸着電極41が熱的に伝導よく電気的に絶縁され
て設置されている。また、温度制御ブロック40の外周
部に円筒状の別の静電吸着電極42が配置され、電極4
2と静電吸着電極42に吸着用の電源43が接続される
。また、ウェハ30にバイアス電圧を印加するための接
触子44とノ(イアスミ源53が設置されている。第二
の実施例だよれば、ウェハ30とmx制御ブロック40
との熱の伝達効率を向上するため静電吸着電極41゜4
2を使用する丸め、第一の実施例で示したガスの導入が
不景となり、:り高真空域でのaX制御が可能となる。
Figure 2 shows that the sea urchin I/Ueno/mounting part of the processed lid is different from that in Figure 1. waterway 2
A base block 20 is provided with a cooling water inlet 27 and an outlet 28 for cooling water into the water passage 26, and a temperature control block 40 is installed in the base block 20 with good thermal conductivity. The temperature control block 40 is equipped with a Peltier element, to which the power source 29 is connected, and furthermore, an electrostatic adsorption electrode 41 having a high dielectric constant insulating thin film on a conductor is connected to the wafer backside. are installed in a thermally conductive and electrically insulated manner. Further, another cylindrical electrostatic adsorption electrode 42 is arranged on the outer periphery of the temperature control block 40, and the electrode 4
A power source 43 for attraction is connected to the electrostatic attraction electrode 42 and the electrostatic attraction electrode 42 . In addition, a contactor 44 and an insulator source 53 for applying a bias voltage to the wafer 30 are installed. According to the second embodiment, the wafer 30 and the mx control block 40
Electrostatic adsorption electrode 41゜4 to improve heat transfer efficiency with
2, the introduction of the gas shown in the first embodiment becomes difficult, and aX control in a high vacuum region becomes possible.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、ウェハ処理装置の真空中で処理中のウ
ェハの@度を蝮時間に所定O温tに制御することができ
、ウェハ処理の経過とともにウェハの温度プロファイル
を制御できるので、薄膜の結晶性や!i1.密!郷を向
上でき、高品質の獲を形成することができる。
According to the present invention, it is possible to control the temperature of the wafer being processed in the vacuum of the wafer processing apparatus to a predetermined temperature t during the wafer processing time, and the temperature profile of the wafer can be controlled as the wafer processing progresses. The crystallinity! i1. Secretly! It can improve the township and form high-quality catches.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のウェハ処理装置の縦断面図
、第2図は本発明の他の実施例のウエノ・載量部の縦断
面図である7 1・・・真空容器、2−・カンード構体、5.3′ ・
・・ウェハ載置部、20・・・ベースブロック、21.
40・・・温度制御ブロック、30・・・ウェハ 41
,42・・・静電吸着電極。 15\
FIG. 1 is a vertical cross-sectional view of a wafer processing apparatus according to an embodiment of the present invention, and FIG. 2 is a vertical cross-sectional view of a wafer loading section according to another embodiment of the present invention.7 1... Vacuum vessel; 2-・Cando structure, 5.3′・
. . . Wafer placement unit, 20 . . . Base block, 21.
40... Temperature control block, 30... Wafer 41
, 42... Electrostatic adsorption electrode. 15\

Claims (3)

【特許請求の範囲】[Claims] 1.ウェハ処理装置の処理ウェハの温度制御のためペル
ティエ素子を用いたことを特徴とするウェハ温度制御方
法。
1. A wafer temperature control method characterized in that a Peltier element is used to control the temperature of a processed wafer in a wafer processing apparatus.
2.ウェハを真空雰囲気中で処理する場合の温度制御と
して、ペルティエ素子の加熱又は冷却の熱量を前記ペル
ティエ素子と前記ウェハの裏面にガスを導入して行うこ
とを特徴とするウェハ温度制御方法。
2. A wafer temperature control method characterized in that temperature control when processing a wafer in a vacuum atmosphere is performed by introducing gas into the Peltier element and the back surface of the wafer to increase the amount of heat for heating or cooling the Peltier element.
3.請求項2において、前記ペルティエ素子と前記ウェ
ハの間の熱伝達のために静電吸着を用いるウェハ温度制
御方法。
3. 3. The method of controlling wafer temperature according to claim 2, using electrostatic adsorption for heat transfer between the Peltier element and the wafer.
JP16658190A 1990-06-27 1990-06-27 Method for controlling wafer temperature Pending JPH0456765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16658190A JPH0456765A (en) 1990-06-27 1990-06-27 Method for controlling wafer temperature

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16658190A JPH0456765A (en) 1990-06-27 1990-06-27 Method for controlling wafer temperature

Publications (1)

Publication Number Publication Date
JPH0456765A true JPH0456765A (en) 1992-02-24

Family

ID=15833931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16658190A Pending JPH0456765A (en) 1990-06-27 1990-06-27 Method for controlling wafer temperature

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Country Link
JP (1) JPH0456765A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997009462A1 (en) * 1995-09-06 1997-03-13 Minnesota Mining And Manufacturing Company Substrate fixture
DE10239486A1 (en) * 2002-08-21 2004-03-04 Carl Zeiss Smt Ag Production of a substrate for producing light conducting light glass rods used in illumination systems, involves preparing a substrate molded blank and coating a surface which corresponds to a first substrate outer surface
WO2006011712A1 (en) * 2004-07-28 2006-02-02 Joeun Technology Co., Ltd. Wafer having thermal circuit and its power supplier

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997009462A1 (en) * 1995-09-06 1997-03-13 Minnesota Mining And Manufacturing Company Substrate fixture
DE10239486A1 (en) * 2002-08-21 2004-03-04 Carl Zeiss Smt Ag Production of a substrate for producing light conducting light glass rods used in illumination systems, involves preparing a substrate molded blank and coating a surface which corresponds to a first substrate outer surface
WO2006011712A1 (en) * 2004-07-28 2006-02-02 Joeun Technology Co., Ltd. Wafer having thermal circuit and its power supplier
US7880122B2 (en) 2004-07-28 2011-02-01 Joeun Technology Co., Ltd. Wafer having thermal circuit and power supplier therefor

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