JPH0457893U - - Google Patents
Info
- Publication number
- JPH0457893U JPH0457893U JP1990099310U JP9931090U JPH0457893U JP H0457893 U JPH0457893 U JP H0457893U JP 1990099310 U JP1990099310 U JP 1990099310U JP 9931090 U JP9931090 U JP 9931090U JP H0457893 U JPH0457893 U JP H0457893U
- Authority
- JP
- Japan
- Prior art keywords
- switch circuit
- output
- circuit
- synchronization signal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002131 composite material Substances 0.000 claims description 4
- 230000010355 oscillation Effects 0.000 claims description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Television Systems (AREA)
- Processing Of Color Television Signals (AREA)
- Details Of Television Scanning (AREA)
- Color Television Systems (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
図は本考案の一実施例を示すマルチスキヤン処
理回路のブロツク図である。
３はＮＴＳＣ映像信号の倍速化クリアビジヨン
信号処理部、５は同期入力１５ＫHzのＲＧＢ原色
信号を３１ＫHzに変換するスキヤンコンバータ、
７はクリアビジヨン用倍速の複合同期信号発生部
、９は１５ＫHz同期信号の入力を検出する水平同
期周波数判別回路、１５は同期入力２４ＫHz〜３
１ＫHz対応のスキヤン機能をもつ水平／垂直発振
回路１１および水平出力回路１２、垂直出力回路
１３、映像信号出力回路１４からなるマルチスキ
ヤンモニタ部である。
The figure is a block diagram of a multi-scan processing circuit showing one embodiment of the present invention. 3 is a clear vision signal processing unit that doubles the speed of the NTSC video signal; 5 is a scan converter that converts the synchronized input 15KHz RGB primary color signal to 31KHz;
7 is a double-speed composite synchronization signal generator for clear vision, 9 is a horizontal synchronization frequency discrimination circuit that detects the input of a 15KHz synchronization signal, and 15 is a synchronization input of 24KHz to 3.
This is a multi-scan monitor section consisting of a horizontal/vertical oscillation circuit 11 having a scan function compatible with 1 KHz, a horizontal output circuit 12, a vertical output circuit 13, and a video signal output circuit 14.
Claims (1)
号を入力とする水平周波数約１５ＫHzの倍速化ス
キヤンコンバータの入力と出力とをそれぞれ第１
のスイツチ回路に接続し、また、同パーソナルコ
ンピユータ出力の複合同期信号と受像機のＮＴＳ
Ｃ複合映像信号とをそれぞれ第２のスイツチ回路
に接続し、同第２のスイツチ回路出力をＮＴＳＣ
映像信号の倍速化クリアビジヨン信号処理部とク
リアビジヨン同期信号発生部と約１５ＫHzの水平
周波数をもつ同期信号の入力を検出する水平周波
数判別回路とに接続し、同倍速化クリアビジヨン
信号処理部出力と前期第１のスイツチ回路出力と
をそれぞれ第３のスイツチ回路に接続し、前期ク
リアビジヨン同期信号発生部出力と前期第２のス
イツチ回路出力とをそれぞれ第４のスイツチ回路
に接続し、前期水平周波数判別回路出力を前期第
１、第４のスイツチ回路制御端子およびオアゲー
ト回路入力に接続し、同オアゲート回路の他方入
力のモード切り換え信号を前期第２のスイツチ回
路制御端子に接続し、同オアゲート回路出力を前
期第３のスイツチ回路制御端子に接続し、同第３
のスイツチ回路出力の映像信号と前期第４のスイ
ツチ回路出力の複合同期信号とをそれぞれマルチ
スキヤンモニタ部の映像出力回路と水平／垂直発
振回路とに接続してなることを特徴とするテレビ
受像機。 The input and output of a double-speed scan converter with a horizontal frequency of about 15 KHz, which receives RGB primary color signals output from a personal computer, etc., are connected to the first
It also connects to the switch circuit of the personal computer, and also connects the composite synchronization signal output from the personal computer and the NTS of the receiver.
C composite video signal is connected to a second switch circuit, and the output of the second switch circuit is converted to NTSC.
The video signal is connected to the double-speed clear vision signal processing section, the clear vision synchronization signal generation section, and the horizontal frequency discrimination circuit that detects the input of the synchronization signal having a horizontal frequency of about 15 KHz, and the output of the double-speed clear vision signal processing section and the previous period are connected to The first switch circuit output is connected to a third switch circuit, and the first clear vision synchronization signal generation section output and the second first switch circuit output are respectively connected to a fourth switch circuit, and the first half horizontal frequency discrimination circuit output is connected to the fourth switch circuit. is connected to the first and fourth switch circuit control terminals and the OR gate circuit input, the mode switching signal of the other input of the OR gate circuit is connected to the second switch circuit control terminal, and the OR gate circuit output is connected to the first and fourth switch circuit control terminals. Connect to the switch circuit control terminal of No. 3,
A television receiver characterized in that a video signal output from a switch circuit and a composite synchronization signal output from a fourth switch circuit are respectively connected to a video output circuit and a horizontal/vertical oscillation circuit of a multi-scan monitor section. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990099310U JPH0457893U (en) | 1990-09-21 | 1990-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990099310U JPH0457893U (en) | 1990-09-21 | 1990-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0457893U true JPH0457893U (en) | 1992-05-18 |
Family
ID=31841144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990099310U Pending JPH0457893U (en) | 1990-09-21 | 1990-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0457893U (en) |
-
1990
- 1990-09-21 JP JP1990099310U patent/JPH0457893U/ja active Pending
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