JPH0458563A - Method for manufacturing thin film semiconductor devices - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a thin film semiconductor device, and particularly to a method of manufacturing a polycrystalline silicon Fs film semiconductor device with a low trap density.

[Prior Art] A large number of dangling bonds exist in a non-single crystal semiconductor thin film such as an amorphous silicon thin film or a polycrystalline silicon thin film. For example, in polycrystalline silicon thin films, defects such as dangling bonds that exist at grain boundaries
It becomes a trap level for carriers and acts as a barrier to carrier conduction. (J, Y, W,
5eto, J., Appl, Phys., 46.
p5247 (1975)) Polycrystalline silicon thin film transistor ○N current engineering. . is expressed by the following formula.

Ion CC1-exp (-A-Nt, 2 /k
T)・・(1) Here, 1 is the crystal grain size, and Nt is the Tra existing at the grain boundary.
p density, k represents Boltzmann's constant, T represents temperature, and A represents proportionality constant. (J, Levinson, J, App
l, Phys, 53 (2), p1193, (
1982)). Adding hydrogen to reduce defects means reducing Nt in equation (1). Therefore, in order to improve the performance of polycrystalline silicon thin film transistors, it is necessary to reduce the defects. (J.

Appl, Phys, 53(2), pH 93(-19
82)).

[Problems to be Solved by the Invention] For this purpose, the defects are terminated with hydrogen, and the main methods include hydrogen plasma treatment, hydrogen ion implantation, or hydrogen injection from a plasma nitride film. Diffusion methods are known. In the hydrogen ion implantation method,
This method has the drawback of requiring an expensive device called an ion implantation device, and the method of diffusing hydrogen from a plasma nitride film has the drawback of forming an unnecessary nitride film. In addition, hydrogen plasma treatment method (T, 1. Ka
mins, IEEE Electron Devi
C e L e t t e r s, V o
1. E D L -1, NO, 8, pl 59.
(1980)) has the problem of shifts in transistor characteristics due to plasma damage.

An object of the present invention is to provide a hydrogenation method that is simple, solves process problems such as plasma damage, and is more suitable for mass production.

[Means for Solving the Problems] A method for manufacturing a thin film semiconductor device of the present invention includes: (1) A method for manufacturing a thin film semiconductor device having a non-single crystal semiconductor thin film, a gate insulating film, and a gate electrode. A step of forming a single crystal semiconductor thin film, a step of forming a gate insulating film, and forming a hydrogenated amorphous silicon thin film on the gate insulating film, followed by a film having a hydrogen diffusion coefficient lower than that of silicon dioxide. a step of hydrogenating the non-single crystal semiconductor thin film by heat treatment in a temperature range of 300° C. to 600° C. and growing the hydrogenated amorphous silicon thin film in a solid phase; The method is characterized in that it includes at least a step of removing a film having a diffusion coefficient lower than that of silicon dioxide, and a step of patterning the hydrogenated amorphous silicon thin film to form a gate electrode.

(2) The hydrogenated amorphous silicon thin film is characterized in that it contains phosphorus or boron as an impurity.

(3) The film having a hydrogen diffusion coefficient lower than that of silicon dioxide is a silicon nitride film.

(4) The film having a hydrogen diffusion coefficient lower than that of silicon dioxide is characterized in that it is made of a metal such as chromium or aluminum.

(5) A source part and a drain part are formed in a self-aligned manner using the gate electrode as a mask.

[Example] In FIG. 1(a), 1-1 is an amorphous insulating substrate.

A quartz substrate, a glass substrate, or the like is used. Si
A Si substrate covered with O2 may also be used. If a quartz substrate or a Si substrate covered with SiO2 is used, it can withstand a high temperature process of 1200'C, but if a glass substrate is used, it is limited to a low temperature process of about 600°C or less due to its low softening temperature. Ru. Further, a glass substrate is sometimes used by coating it with an oxide film or a nitride film to prevent impurities from seeping out from the substrate. First, an a-3i film 1 is deposited on an amorphous insulating substrate 1-1.
Deposit -2. It is desirable that the a-3i film 1-2 is uniform, does not contain minute crystallites, and does not have any nuclei for crystal growth. The deposition method is EB (Elect
ron beam) evaporation method, sputtering method, CVD method, optical CVD method, and plasma CVD method. plasma CVD
This method is often used to produce photovoltaic elements, photodiodes, photosensitive drums, and the like.

a-3i: To deposit the H film, silane gas (SiH
z) as helium gas (Ho) or hydrogen gas (H2)
dilute it to an appropriate concentration and apply a high-frequency voltage to decompose and deposit it. In the case of plasma CVD method, the substrate temperature is 50°C.
Films can be formed even at temperatures below 0°C.

If disilane gas or trisilane gas is used instead of the silane gas, it becomes possible to form a film even at a lower substrate temperature. Further, if hydrogen plasma or argon plasma treatment is performed immediately before the deposition, cleaning of the substrate surface and film formation can be performed continuously. After that, 400℃
Annealing is performed at ~500°C to release hydrogen from the amorphous silicon thin film.

Next, the silicon thin film 1-2 is grown in a solid phase. As a solid phase growth method, furnace annealing using a quartz tube is convenient. As the annealing atmosphere, nitrogen gas, hydrogen gas, argon gas, helium gas, etc. are used. lXl0-6 to l
Annealing may be performed in a high vacuum atmosphere of
shall be. In such low-temperature annealing, only crystal grains having a crystal orientation with a small activation energy for crystal growth grow selectively, and moreover, they grow slowly and to a large size. Figure 1 (
In b), 1-3 indicates a silicon thin film grown in a solid phase.

Note that the formation of the silicon thin film 1-2 and the solid phase growth may be performed continuously without breaking the vacuum.

Further, the silicon thin film 1-2 may be a poly-8i film formed by a low pressure CVD method, an MBE method, or the like.

Next, the solid-phase grown silicon thin film 1-3 is patterned by photolithography to form an island shape as shown in FIG. 1(C).

Next, as shown in FIG. 1(d), a gate oxide film 1-4 is formed. The method for forming the gate oxide film is a method below 500°C such as LPCVD method, photoexcitation CVD method, plasma CVD method, ECR plasma CVD method, high vacuum evaporation method, plasma oxidation method, or high pressure oxidation method. There is a low temperature method. The gate oxide film formed by the low-temperature method becomes denser and has an excellent antinode with fewer interface states by heat treatment.

When using a quartz substrate as the amorphous insulating substrate 1-1,
This can be done by a thermal oxidation method. The thermal oxidation method includes a dry oxidation method and a wet oxidation method, and the oxidation temperature is 1000
The dry oxidation method is more suitable because the film quality is excellent, although the temperature is higher than 0.degree. Note that FIG. 1(d) describes an example in which a gate oxide film is formed by a thermal oxidation method.

Next, as shown in FIG. 1(e), plasma CVD
Using a device, a p-type or p-type hydrogenated amorphous silicon thin film 1-5 is produced by glow discharge decomposition of a mixed gas of phosphine gas (PH3) and silane gas or diborane gas (B2Hs) and silane gas. Form a film. Disilane gas (Si2
Hs) or trisilane gas (Si3He) may also be used. Further, the mixed gas may be diluted with hydrogen gas. A film thickness of 2,000 to 5,000 people is suitable.

By changing the flow rate ratio of the gas during film formation, the amount of impurities such as phosphorus and boron and the amount of hydrogen contained in the hydrogenated amorphous silicon thin film 1-5 can be controlled. The impurity is about 1 to 10 atomic%, and the hydrogen is about 1 to 20 atomic%.
A thin film of hydrogenated amorphous silicon containing approximately tomic% is formed.

Subsequently, a cap film 1-6 made of a material having a hydrogen diffusion coefficient smaller than that of silicon dioxide is formed. As the material, a metal film such as chromium or aluminum, a nitrogen silicon film, or the like is used.

Metal films such as chromium and aluminum can be easily formed using methods such as EB evaporation and sputtering.

The film thickness may be approximately 1000 Å or more. A suitable method for forming a silicon nitride film at low temperatures is to perform glow discharge decomposition of a mixed gas of silane gas and ammonia gas (NH3) using plasma CVD.

Next, 300'C to 600°C in N2 gas atmosphere.
Anneal at a temperature of The hydrogenated amorphous silicon thin film has three distinct hydrogen desorption peaks depending on the heat treatment temperature, and the peak on the low temperature side is from 3oo'C to 450'C.
is known to exist in When heat treatment is performed at the above temperature, impurity-doped hydrogenated amorphous silicon thin M1-
At the same time as hydrogen is desorbed from 5, in-phase growth occurs, and 1-5 becomes an impurity-doped solid phase grown silicon film. Hydrogen is released, but since the diffusion coefficient of hydrogen in the cap film 1-6 is smaller than that in the gate oxide M1-4 made of a silicon dioxide film (SiC) a), the released hydrogen is absorbed into the gate oxide film. 1-4 and diffuses into the silicon thin film 1-3.

A schematic diagram is shown in Figure 2. 2-1 is an insulating substrate, 2-2 is a silicon thin film, 2-3 is a gate oxide film, 2-4 is an impurity-doped hydrogenated amorphous silicon thin film, and 2-5 has a hydrogen diffusion coefficient smaller than that of silicon dioxide. This is a cap film made of a film.

In the figure, hydrogen ions are represented by black circles. The arrows indicate the movement of hydrogen ions in the anil.

Therefore, in FIG. 1, hydrogen is bonded to dangling bonds and interface states existing in the silicon thin film 1-3, and the trap density is reduced. As a result, as shown in equation (1), . increases, and TPT characteristics are improved.

Next, as shown in FIG. 1(g), the cap Jl!
Remove 1-6. The nitride film is etched using hot phosphoric acid or the like. Metal films such as chromium and aluminum are etched using a mixture of phosphoric acid, nitric acid, and acetic acid.

Next, as shown in FIG. 1(h), the impurity-doped solid phase grown silicon film 1-5 is patterned by photolithography to form a gate electrode 1-7.

Subsequently, as shown in FIG. 1(i), the gate electrode 1-
Using 7 as a mask, impurity ions are implanted to form a source M region 1-8 and a drain region 1-9 in a self-aligned manner. As the impurity, P' or AS' is used when manufacturing an Nch transistor, and B' or the like is used when manufacturing a Pch transistor. Thereafter, the impurities are activated by irradiating the substrate with a lamp or an infrared lamp from the element side. Since the two-layer gate electrode absorbs the light energy of the lamp, the silicon thin film 1-3 is not heated. In addition to ion implantation, methods for adding impurities include laser doping, plasma doping, and other methods. In these methods, the impurity is activated when doped. The arrows 1-10 represent impurity ion beams. The impurity concentration is about 1 x 1015 to 1 x 10211 cm-3.

Subsequently, as shown in FIG. 1(j), an interlayer insulating film 1-
11 is stacked. As the interlayer insulating film material, an oxide film, a nitride film, or the like is used. The film thickness may be any thickness as long as the insulation is good, but it is usually from several thousand to several micrometers. A simple method for forming the nitride film is the LPCVD method or the plasma CVD method. For the reaction, a mixed gas of ammonia gas (NH3), silane gas, and nitrogen gas, or a mixed gas of silane gas and nitrogen gas, etc. is used.

Next, as shown in FIG. 1(k), contact holes are formed in the interlayer insulating film and the gate insulating film, contact electrodes are formed, and source electrodes 1-12 and drain electrodes 1l-
13. The source electrode and drain electrode are formed of a metal material such as aluminum. In this way, a thin film transistor is formed.

[Effects of the Invention] The conventional hydrogen plasma method has the problem that damage occurs due to charge-up of the gate oxide film caused by hydrogen ions excited by the high-frequency electric field and heating of the substrate, resulting in a shift in TPT characteristics and significant deterioration. there were.

The present invention solves the damage caused by such hydrogen plasma treatment and realizes the effect of hydrogenation on polycrystalline silicon by a simpler method.

In the TPT manufacturing process, after forming the gate oxide film, a hydrogenated amorphous silicon thin film doped with phosphorus or boron is formed, and on top of that a nitride film or metal film, etc., has a hydrogen diffusion coefficient higher than that of silicon dioxide. Layer small films and heat at 300℃~6
Since the annealing is carried out at a temperature of 00°C, hydrogen is released from the hydrogenated amorphous silicon thin film, hydrogen permeates through the gate oxide film and diffuses into the polycrystalline silicon thin film, terminating dangling bonds of grain boundaries, etc. The same effect as hydrogen plasma can be obtained. Further, unlike the hydrogen plasma method, a high frequency electric field and heat treatment are not performed at the same time, so no damage occurs.

On the other hand, the hydrogenated amorphous Si/con thin film was heated at 400°C.
Since it is annealed at a temperature of ~600°C, in-phase growth occurs. Furthermore, since it contains impurities, it grows to a larger crystal grain size and has a very low specific resistivity. In the present invention, such an in-phase grown silicon thin film having a very low specific resistivity is used as the gate electrode.

Therefore, when the present invention is applied to an active matrix substrate, it has a great effect on reducing the wiring resistance of the gate line.

It is also effective in simplifying the process since there is no need to newly form a film to be the material of the gate electrode.

When a thin film transistor is made according to the present invention, excellent characteristics can be obtained. Compared to conventional thin film transistors, O
The N current increases and the FF current decreases. In addition, the threshold voltage is also reduced, and transistor characteristics are greatly improved.

Since it is possible to fabricate thin film transistors with excellent characteristics on an amorphous insulating substrate, sufficient high-speed operation can be achieved even when applied to an active matrix substrate in which a driver circuit is integrated on the same substrate. Since the gate wiring resistance is also extremely low, it is expected to have a great effect on increasing the area of the substrate.

Furthermore, it has great effects on reducing power supply voltage, reducing current consumption, and improving reliability. In addition, since it is possible to manufacture by a low-temperature process at 600° C. or lower, this is highly effective in reducing the cost and increasing the area of active matrix substrates.

When the present invention is applied to a contact image sensor in which a photoelectric conversion element and its scanning circuit are integrated on the same chip, it is possible to increase the reading speed, increase the resolution, and increase the gradation. produce an effect. Once high resolution is achieved, it will be easier to apply it to a contact type image sensor for color reading. Of course, this has great effects in reducing power supply voltage, reducing current consumption, and improving reliability.

Also, since it can be produced by a low-temperature process,
Close-contact image sensor chip can be made longer,
- A reading device for large facsimile machines such as A4 size or A3 size can be realized using a book chip. Therefore, it is possible to avoid the troublesome and unreliable technique of joining two sensor chips, and the mounting yield is also improved.

In addition, it can also be applied to high-definition liquid crystal televisions or thermal heads with drive circuits integrated on the same substrate.

In addition to quartz and glass substrates, sapphire substrates (
A 1203) or MgO・Al2O3゜BP,
Crystalline insulating substrates such as CaF2 can also be used.

Although the above embodiments have been explained using thin film transistors as an example, the present invention can also be applied to elements using thin films such as ordinary MO3h run transistor polar transistors or heterojunction bipolar transistors. Further, the present invention can also be applied to elements using S○ engineering technology, such as three-dimensional devices.

In the example, a case was explained in which a plasma CVD apparatus was used as a method for forming an amorphous semiconductor thin film.
Other methods such as B evaporation method, sputtering method, and low pressure CvD method can also be used. Furthermore, although the description has been made assuming that in-phase growth and gate oxidation are performed in the same chamber, there is no problem in using separate chambers as long as the substrate is not exposed to the atmosphere.

[Brief explanation of drawings]

FIGS. 1(a) to 1(k) are process cross-sectional views showing an embodiment of the present invention. FIG. 2 is a cross-sectional view showing the movement of hydrogen ions in an amorphous silicon thin film doped with impurities due to annealing. 1-1; Insulating substrate 1-3; Silicon thin film 1-4; Gate oxide film 1-5: Impurity-doped amorphous silicon thin film Cap film and above Figure 1 (g) Figure 1 (a) Diagram 1 (b) ) Figure 1 (d) Figure 11 (e) Figure 1 (f)

Claims (5)

[Claims] (1) A method for manufacturing a thin film semiconductor device having a non-single crystal semiconductor thin film, a gate insulating film, and a gate electrode, which includes a step of forming a non-single crystal semiconductor thin film on an insulating substrate, a step of forming a gate insulating film, and a step of forming a gate insulating film on an insulating substrate. A process of forming a hydrogenated amorphous silicon thin film on the gate insulating film, and then forming a film with a hydrogen diffusion coefficient lower than that of silicon dioxide;
Hydrogenating the non-single crystal semiconductor thin film by heat treatment in a temperature range of °C and growing the hydrogenated amorphous silicon thin film in solid phase, and removing the film in which the hydrogen diffusion coefficient is lower than that of silicon dioxide. and patterning the hydrogenated amorphous silicon thin film to form a gate electrode. (2) The method for manufacturing a thin film semiconductor device according to claim 1, wherein the hydrogenated amorphous silicon thin film contains phosphorus or boron as an impurity. (3) The method for manufacturing a thin film semiconductor device according to claim 1, wherein the film having a hydrogen diffusion coefficient lower than that of silicon dioxide is a silicon nitride film. (4) The method for manufacturing a thin film semiconductor device according to claim 1, wherein the film having a hydrogen diffusion coefficient lower than that of silicon dioxide is a metal such as chromium or aluminum. (5) The method of manufacturing a thin film semiconductor device according to claim 1, wherein the source portion and the drain portion are formed in a self-aligned manner using the gate electrode as a mask.