JPH0461977U

JPH0461977U -

Info

Publication number: JPH0461977U
Application number: JP10548690U
Authority: JP
Priority date: 1990-10-05
Filing date: 1990-10-05
Publication date: 1992-05-27

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例の概略構成図、第２
図は第１図の信号波形図、第３図は従来例の概略
構成図である。１……画像処理装置、２……ＣＣＤ素子、３…
…ビデオカメラ、４，４_０……デジタル処理装置
、５……発振回路、６……駆動回路、８……分周
回路、９……Ａ／Ｄ変換回路、１０，１０_０……
デジタル処理回路。 Figure 1 is a schematic diagram of an embodiment of the present invention;
The figure is a signal waveform diagram of FIG. 1, and FIG. 3 is a schematic configuration diagram of a conventional example. 1... Image processing device, 2... CCD element, 3...
...Video camera, 4,4 ₀ ...Digital processing device, 5...Oscillation circuit, 6...Drive circuit, 8...Frequency dividing circuit, 9...A/D conversion circuit, 10,10 ₀ ...
Digital processing circuit.

Claims

[Claims for Utility Model Registration] A video camera equipped with a CCD element that converts the output of the CCD element into a video signal and outputs it, and a digital processing device that digitizes and processes the video signal from the video camera. , the video camera includes an oscillation circuit that generates a clock, and a drive circuit that creates a transfer clock or the like based on the clock of the oscillation circuit and outputs it to the CCD element, and the digital processing device includes the following: a frequency dividing circuit that divides the frequency of the clock from the oscillation circuit; an A/D conversion circuit that performs A/D conversion of a video signal from the video camera using the frequency divided clock from the frequency dividing circuit as a sampling clock; and the oscillation circuit. An image processing device comprising: a digital processing circuit that takes in and processes video signal data from an A/D conversion circuit using the clock provided from the circuit as a basic clock.